A Low-Complexity Receiver-Side Lookup Table Equalization Method for High-Speed Short-Reach IM/DD Transmission Systems

Abstract

In this paper, we demonstrate a receiver-side lookup table (Rx-side LUT) equalization method for high-speed short-reach intensity modulation and direct detection (IM/DD) transmission systems, which alleviates the computational complexity of neural network-based equalization algorithms. Compared to conventional pre-equalization techniques applied at the transmitter side, which utilize distortion correction values stored in LUTs derived from the transmitted symbols and their corresponding recovered counterparts, the Rx-side LUT relies solely on receiver-side data. The received data to be equalized serves as the index of the LUT, with a nearest-neighbor algorithm employed to find the element closest to the index and then return the corresponding equalization result from the table. With a lightweight lookup process, the proposed method releases the computation complexity of neural network-based equalization algorithms by replacing the computationally intensive operations performed during the inference phase. Experimental results indicate that compared to baseline fully connected neural network (FCNN) and gated recurrent unit (GRU) equalization, the Rx-side LUT could decrease the algorithm execution time by 25.5% and 34.6% for 100 GBaud and 22.8% and 36.9% for 112 GBaud PAM4 signals, respectively, while maintaining comparable system performance. The proposed scheme provides a low-complexity solution for high-speed, low-cost IM/DD optical interconnects.

1. Introduction

The rapid growth of data center intra-connects and interconnects (DCIs) traffic has driven a swift increase in the bandwidth requirements for short-reach optical communication systems [1]. Pulse amplitude modulation (PAM)-based intensity modulation and direct detection (IM/DD) systems remain the leading solution for high-speed DCIs due to their cost-effectiveness and high power efficiency [2]. However, the linear and nonlinear distortions caused by electro-optical components and transmission links pose a significant challenge to system performance [3]. Compensating for these distortions is quite essential. Digital signal processing-based compensation offers greater flexibility than optical-domain compensation methods, such as optical phase conjugation [4,5], phase-sensitive amplification [6], and photonic neural networks [7,8]. It can be reprogrammed or updated via software without requiring hardware modifications and is capable of addressing complex impairments that are difficult to compensate for using optical techniques [9]. Various DSP-based equalization techniques, including feedforward equalizer (FFE), Volterra nonlinear equalizer (VNLE) and FFE-DFE-Polynomial, have been extensively studied to mitigate the impact of signal distortion [10,11,12,13]. Nevertheless, these filter-based equalization algorithms still exhibit suboptimal performance, particularly in compensating for nonlinear distortions [14].

With the emergence and continuous advancement of artificial intelligence, machine learning-based equalization algorithms have attracted widespread attention in distortion compensation for optical communication systems. The integration of machine learning techniques with signal equalization enables the exploration of more complex mapping relationships and parameter estimation, offering a novel theoretical framework for optical communication signal processing [15,16]. This evolution has progressed from artificial neural network-based equalization [17], through deep neural network approaches [18], to more specialized methods based on recurrent neural networks (RNNs) [19]. Special RNN architectures such as long-short-term memory [20] and gated recurrent unit (GRU) [21] have been explored for signal equalization to address the gradient and short-term memory problems encountered in RNNs. These advancements have enhanced signal quality, but they also increase computational complexity by introducing extensive multiplication operations [22]. Numerous studies have investigated techniques for reducing the complexity of neural network-based equalization algorithms, covering key aspects across the training, inference, and hardware synthesis stages [23,24,25]. For the training process, techniques such as transfer learning [26] or generalization-improving approaches, including multi-task learning [27], data augmentation [28,29], and few-shot learning [30], can reduce the demand for large amounts of original training data. In the inference phase, network pruning [31] and quantization [32] are widely adopted to optimize neural network complexity. As for hardware synthesis, methods such as computation skipping [33], intermediate result memorization [34] and layer pipelining [35] are proposed to minimize the resource utilization. Although the above methods have reduced the computational complexity of each phase to a certain extent, extensive multiplication operations still persist, which limit the effectiveness of efforts to reduce the overall algorithm execution time.

On the other hand, employing the lookup table (LUT) algorithm has been demonstrated to be an effective method to reduce computational complexity. A joint LUT-based nonlinear pre-distortion and digital resolution enhancement scheme is proposed, where the signal errors induced by the transmission system are stored in LUTs and used as algorithm inputs for signal restoration [36,37]. Similarly, a modified nonlinear pre-distortion LUT method generates a pattern index by considering only high-order symbols, achieving a reduction in the number of patterns and improvement of LUT structure while maintaining system performance similar to traditional methods [38]. However, these studies are primarily limited to transmitter-side pre-distortion employing LUT, which requires transmitting signals through the entire link to obtain signal error information, thereby hindering the ability to adapt to dynamic channel variations and increasing operational complexity [39]. There are no reports on using the LUT method to reduce the computational complexity of neural network–based equalization algorithms in optical communication systems.

In this paper, we demonstrate a receiver-side LUT (Rx-side LUT) equalization method for high-speed short-reach IM/DD transmission systems to release the computational complexity of neural network-based equalization algorithms. Unlike conventional pre-equalization techniques applied at the transmitter side, which use distortion correction values stored in LUTs derived from transmitted and recovered symbols, the Rx-side LUT relies solely on receiver-side data. The received data to be equalized serves as the index of the LUT, with a nearest-neighbor algorithm employed to find the element closest to the index and then return the corresponding equalization result from the table. Experimental results show that the proposed method can effectively reduce the computational complexity and algorithm execution time while maintaining similar performance to the baseline equalization algorithms. To the best of our knowledge, this study represents the first attempt to employ the LUT method at the Rx-side to reduce the computation complexity of the neural network-based equalization algorithms.

This paper is structured as follows: Section 2 presents the schematic of the generation and equalization procedures of the proposed Rx-side LUT. Section 3 details the DSP procedures and experimental setup. Section 4 analyzes the performance of Rx-side LUT equalization. Section 5 gives conclusions and discussion.

2. Working Principle of Rx-Side LUT Equalization

The LUT pre-distortion method has been considered as an effective way to mitigate impairment [36,37]. In the common LUT-based pre-distortion method, a set of known input signals is first transmitted through the optical link, and the corresponding distorted signal samples are captured at the receiver. By comparing each distorted signal with its original (ideal) counterpart, appropriate correction values are computed to compensate for the channel impairments [38,40]. The correction values are then stored in the table, indexed by specific patterns of the distorted signals to adjust the following transmitted symbol sequences.

Different from the LUT pre-distortion method, the proposed Rx-side LUT method stores the equalization results of baseline equalizers. Received data that needs equalization serves as the index for the lookup process. A nearest-neighbor algorithm maps the index to the closest item in the table, retrieving the corresponding results as the equalization output. In this proposed approach, the computationally intensive operations typically performed during the inference phase of neural network-based equalizers and the tap coefficients iteration process of filter-based equalizers are replaced by a lightweight lookup process, leading to a substantial reduction in overall computational complexity.

Figure 1 illustrates the schematic diagram and workflow of the proposed Rx-side LUT. The entire algorithm involves two essential steps: Rx-LUT generation and Rx-LUT equalization. In the Rx-LUT generation step, an empty LUT is first generated. The original received signal sequence $X_1(n-k:n:n+k)$, stored in the first column of the table, is processed by the baseline equalizer to produce the output sequence $Y_1(n-k:n:n+k)$, which is then stored in the second column of the lookup table. The third column of the table is filled with $D_1(n-k:n:n+k)$, which corresponds to the pseudo-random binary sequence (PRBS) pattern of $X_1$ generated at the transmitter. In the step of Rx-side LUT equalization, as shown in Figure 1a,b, the distorted signal sequence to be equalized that denoted by $X_j(i-k:i:i+k)$ together with its corresponding PRBS $D_j(i-k:i:i+k)$ is used to identify the index m of each symbol from the table established in the first step, specifically referring to as $\mathrm{LUT}(m,2)$. Finally, all the obtained values, $Y_{LUT}\left(i\right)$, are combined into a vector, $y_{out}$, representing the Rx-LUT equalization results for $X_j(i-k:i:i+k)$. In this algorithm, the PRBSs $D_j(i-k:i:i+k)$ and $D_1(n-k:n:n+k)$ serve as references for locating the correct equalization value, rather than being used for BER calculation. As shown in Figure 1b, the size of the table is set to $N\times 3$, where N is the length of the data sequence. In the equalization process, a nearest-neighbor algorithm is employed to search the table and identify the closest matching item for each symbol in $X_j$. The process is carried out by minimizing the error term $e\left(i\right)$ for each symbol, defined as $e\left(i\right)=\mathrm{abs}(X_1\left(i\right)-X_j\left(i\right))$. The effectiveness of the Rx-side LUT method relies on simultaneously identifying the entry with the closest value while ensuring PRBS matching, as indicated by $D_1\left(i\right)=D_j\left(i\right)$.

3. Experiment Setup

To evaluate the performance of the proposed Rx-side LUT equalization method, a high-speed short-reach IM/DD experimental setup with detailed DSP procedures is established, as shown in Figure 2. Firstly, PRBS signals are generated by an arbitrary waveform generator (AWG, M8199A, Keysight, Santa Rosa, CA, USA) with a bandwidth of 59 GHz. After PAM4 mapping and raised cosine pulse shaping, the signals are resampled to achieve two samples per symbol. Subsequently, the resulting digital samples are then converted into analog electrical signals. As shown in Figure 2a,b, a fabricated chip-on-board hybrid-packaged silicon photonic-electric transmitter on the evaluation printed circuit board (PCB), which integrates a four-channel MZM chip with interleaved PN junction and a four-channel driver chip, is employed as the signal generator. The frequency response of the transmitter exhibits a −3 dB bandwidth of 32 GHz. At the receiver side, the received optical power (RoP) of the system is adjusted by a variable optical attenuator (VOA). The detected electrical signals after PDs are digitized using a digital storage oscilloscope (DSO, Keysight UXR 0594AP, Keysight, Santa Rosa, CA, USA). In the digital signal processing (DSP), the digitized samples are resampled to two samples per symbol after matched filtering. The data is subsequently processed by the Rx-LUT equalizer, after which the equalized output undergoes PAM4 demapping. Finally, the bit error rate (BER) is calculated to evaluate the performance of the processed signal.

The core principle of the Rx-side LUT proposed in this work is to use received data as the index, thereby replacing computationally intensive equalization operations. This approach is inherently compatible with coherent systems employing QPSK or 16-QAM modulation. The only required modification is an adaptation to the unique characteristics of coherent signals, namely the need to account for phase information, which is irrelevant in IM/DD systems. Specifically, the Rx-side LUT for IM/DD systems adopts an $N\times 3$ structure (Section 2). For coherent systems, since QPSK/16-QAM signals carry both amplitude and phase information, we only need to extend the LUT structure to $N\times 4$ by adding a fourth column to store the phase of the received signal. During the LUT generation phase, this column records the phase of the input coherent signal (e.g., QPSK symbols); during the equalization phase, the nearest-neighbor algorithm will simultaneously match both the amplitude (from the original first column) and phase (from the new fourth column) of the received signal to retrieve the corresponding equalization result. This modification ensures that phase-dependent distortions are properly compensated while retaining the low-complexity advantage of the Rx-side LUT.

4. Experimental Results and Discussion

The performance of the Rx-LUT method based on FCNN and GRU equalizers is evaluated, and the results are presented in Figure 3 and Figure 4. The employed FCNN model comprises one input layer, two hidden layers, and one output layer, as illustrated in Figure 3a. Each layer performs a linear transformation in which the input is multiplied by a weight matrix followed by the addition of a bias vector. Nonlinear activation functions are applied between adjacent layers to introduce nonlinearity into the network. This prevents the cascade of multiple layers from collapsing into an equivalent single linear transformation, thereby enhancing the network’s capacity to model complex relationships [41]. The architecture of the GRU model is illustrated in Figure 4a. Compared to the FCNN model, the GRU model introduces an additional GRU layer consisting of multiple GRU cells [42].

As shown in Figure 3b and Figure 4b, employing either an FCNN or GRU equalizer significantly improves performance across baud rates ranging from 56 GBaud to 80 GBaud, compared to the case without equalization. As the data rate increases beyond 70 GBaud, the performance of the FCNN equalizer degrades, achieving BER reduction down to the 20% soft-decision forward error correction (SD-FEC) $2.0\times {10}^{-2}$. In contrast, although the GRU equalizer also experiences a slight performance decline, it consistently maintains BER below the 7% hard-decision FEC (HD-FEC) threshold. When the Rx-side LUT method is employed, it maintains similar BER performance in both the FCNN and GRU equalization cases. By employing GRU and the GRU-based Rx-side LUT, the system consistently achieves performance below the HD-FEC threshold. This outperforms the cases utilizing FCNN and the corresponding FCNN-based Rx-side LUT.

The execution times of the four algorithms are further evaluated, with results presented in Figure 3c and Figure 4c. A personal computer equipped with an Intel® ${\mathrm{Core}}^{\mathrm{TM}}$ i7-10710U CPU running at 1.10 GHz featuring 12 logical cores and a maximum turbo frequency of approximately 1.6 GHz is employed for the data processing and algorithm execution time evaluation. The execution time is measured with a time-related function, and all data are evaluated on the same computer to ensure consistency and fairness in performance comparison. The floating point operations (FLOPs) of FCNN and GRU in the inference stage are $[2n_I{n}_{h_1}+2n_{h_1}{n}_{h_2}+2n_{h_2}+5(n_{h_1}+n_{h_2})]n$ and $6n_H(n_I+n_H)n$, respectively, where n denotes the length of the data sequence, $n_I$ is the number of neurons in the input layer of the FCNN, $n_H$ represents the number of hidden units in the GRU layer, and $n_{h_1}$ and $n_{h_2}$ represent the number of neurons in the first and second hidden layers, respectively. High-complexity algorithms involve a greater number of FLOPs, which in turn leads to longer execution time. The results in Figure 3c and Figure 4c indicate that employing the proposed Rx-side LUT reduces the execution time of both the FCNN and the GRU by 25%∼60% while maintaining comparable BER performance.

In FCNN and GRU equalization, each symbol sequentially propagates through the input layer and undergoes nonlinear activation at each hidden layer before reaching the output layer. The process entails a substantial number of FLOPs, which dominate the overall computational latency and contribute significantly to execution time. The proposed Rx-side LUT method bypasses the sequential computation process. The FLOPs of it can be denoted as $3L\times n$, where L is the length of LUT and n is the length of the signal sequence. Once the index is identified, the equalization result is retrieved through a single lookup operation. This eliminates most of the FLOPs, substantially reducing the execution time of the algorithm.

The effectiveness of the Rx-side LUT is further validated by varying the number of training epochs and the number of neurons in the hidden layers of the FCNN and GRU models, while keeping the learning rates fixed at $1\times {10}^{-3}$ and $5\times {10}^{-3}$, respectively. Figure 5a–d presents BER and execution time versus training epoch for 60 GBaud and 80 GBaud PAM4 signals, respectively.

At 60 GBaud, both the FCNN and the GRU equalizers can reduce the BER below the 7% HD-FEC threshold with enough training epochs, with the GRU demonstrating superior performance compared to the FCNN. At a data rate of 80 GBaud, increasing the number of FCNN training epochs fails to reduce the BER below the 20% SD-FEC threshold, whereas the GRU equalizer maintains the BER below the 7% HD-FEC limit. Meanwhile, both FCNN- and GRU-based Rx-side LUT equalizers achieve BER performance comparable to their respective baseline equalizers under the same training epoch condition. However, increasing the number of training epochs significantly extends the training time of both FCNN and GRU equalizers, whereas the overall execution time of the Rx-side LUT remains consistently low and unaffected. For the sake of fairness, the execution time of the FCNN and GRU algorithms shown in Figure 5 includes both the training and inference phases, while the execution time of the Rx-side LUT includes the table creation and equalization processes. The results show that the GRU-based Rx-side LUT trained under high epochs inherits the best BER performance without incurring further training time cost.

The impact of the number of hidden-layer neurons on system performance and algorithm execution time is shown in Figure 6, where the number of input-layer neurons and GRUs is fixed at 100. The neurons in the FCNN and GRU models are trained to capture the nonlinear characteristics of the data. When there are fewer than 30 neurons in the hidden layer, the FCNN requires fewer FLOPs and finishes faster than the Rx-side LUT. However, increasing the number of neurons in the hidden layers does not lead to further improvement in BER performance, while the algorithm’s execution time increases steadily. In contrast, the Rx-side LUT achieves a BER performance comparable to that of the baseline algorithm while maintaining a stable execution time independent of the number of hidden layer neurons. For the GRU model, performance is more sensitive to the number of units in the hidden layer, as illustrated in Figure 6c,d. With a small number of GRUs, the equalizer can only reduce the BER to below the SD-FEC threshold. However, as the number of units increases, the BER performance improves significantly, eventually reaching levels below the HD-FEC threshold. Similarly to the FCNN, the execution time of the GRU increases substantially with the number of hidden-layer units, owing to the growing number of sequential operations and the computational complexity of the internal gating mechanisms within each GRU cell. By employing Rx-LUT, the algorithm execution time remains within a few seconds and is largely independent of the number of GRUs in the hidden layer. The results demonstrate that the Rx-side LUT derived from the GRU model also preserves its superior equalization performance while substantially reducing the computational time for subsequent data processing. GRU can effectively model nonlinear and long-term dependencies, making it well suited for signal equalization in high-speed optical systems. Its gating mechanism adaptively controls information flow, enabling the network to retain essential temporal features while suppressing redundant or noisy information, thereby improving robustness against channel fluctuations.

By substituting the underlying baseline equalizer, the Rx-side LUT method can also be extended to filter-based algorithms such as FFE, DFE, Volterra and others. Figure 7 illustrates the performance of the Volterra equalizer when integrated with the proposed Rx-side LUT approach. The corresponding block diagram is also provided to depict their structural implementation. The output of the Volterra equalizer with a second-order kernel employed in this paper can be expressed as

$$y_n=\sum _{l_1=0}^{L_1-1}{\omega }_1\left(l_1\right)·x(n-l_1)+\sum _{l_1=0}^{L_2-1}\sum _{l_2=0}^{l_1}{\omega }_2(l_1,l_2)·x(n-l_1)x(n-l_2)$$

(1)

where $L_i$ is the memory depth of different orders, ${\omega }_i(l_1,l_2,\dots ,l_i)$ is the tap coefficients of different orders and $x\left(n\right)$ is the input signal. The Volterra equalization is implemented based on a feed-forward equalizer, where the FIR filter expands the input signal into a Volterra series to handle nonlinear distortion [3,11]. As shown in Figure 7b, the BER performance of Volterra-based Rx-side LUT closely approximates that of the original implementation without LUT integration. On the other hand, it suffers inferior BER performance compared to the cases of FCNN and GRU for lacking strong nonlinear characterization capabilities as neural network-based methods. Figure 7c shows that the Volterra takes much longer to execute because the filtered data sequence to be processed is used for training taps, meaning more FLOPs are needed to update the tap coefficients.

The FLOPs of Volterra in our implementations can be indicated by $t\times n\times (4m^2+4m+1)$, where t is the training epoch, n is the length of the signal sequence and m is the number of taps. Bypassing this sequential computation process with $e\left(i\right)=\mathrm{abs}(X_1\left(i\right)-X_j\left(i\right))$, the Rx-side LUT implementations reduce the algorithm execution time by more than 60% compared to their original counterparts without LUT integration. The FLOPs of the Rx-side LUT based on the filter equalizer can be denoted as $3L\times n$, which is much smaller than its baseline algorithms.

Figure 8 illustrates the system performance and algorithm execution time of the Rx-side LUT with respect to the number of taps and tap coefficient [43] in the Volterra equalizer when the signal is transmitted at a rate of 64 GBaud. When the number of taps is less than 40, the Volterra needs smaller FLOPs than the Rx-side LUT, resulting in shorter algorithm execution time. The BER of the Volterra equalizer decreases as the number of taps increases, while the Rx-side LUT achieves comparable BER performance based on it. However, increasing the number of taps significantly extends the execution time of the Volterra equalizer, whereas the overall execution time of the Rx-side LUT remains consistently low and unaffected. The optimal number of taps is 80 for Volterra, while further increasing the number of taps yields negligible performance improvement. As the tap coefficient $\alpha$ increases, the enhanced in-band noise decreases. However, filter-induced ISI increases with higher values of $\alpha$. Therefore, identifying an optimal value of $\alpha$ is essential to balancing these effects and achieving peak performance for the filter-based Rx-side LUT. For Volterra used in this paper, the optimal $\alpha$ is $1\times {10}^{-3}$.

We also evaluated the algorithm execution time of DFE and its Rx-side LUT variant across 56–80 GBaud PAM4 signals as shown in Figure 9. The DFE-based Rx-side LUT achieves an average time reduction of 51.9%, even higher than the reduction for neural network-based LUTs. This is because DFE’s tap coefficient updates (LMS algorithm) introduce significant sequential computation, which the Rx-side LUT completely bypasses. The DFE-based Rx-side LUT maintains BER within 5% of the standalone DFE across all baud rates. At 80 GBaud, both methods exhibit BER slightly above the 20% SD-FEC threshold, which aligns with DFE’s inherent limitation in nonlinear compensation, but the Rx-side LUT achieves this performance with half the execution time.

To further assess the robustness of the Rx-side LUT method, the algorithm is evaluated using different datasets captured independently from the oscilloscope. Figure 10 presents the performance of datasets 1–5 at 56 GBaud, 64 GBaud, and 75 GBaud, respectively, directly processed using Rx-LUTs based on FCNN and GRU equalizers that were trained on an independent dataset. The results demonstrate good system performance and consistent algorithm execution time among the different datasets, showing the robustness of the Rx-LUT.

The effectiveness of Rx-side LUT at high data rates beyond 100 GBaud is also evaluated; the results are given in Figure 11. In the experiment, a high-bandwidth (>90 GHz) silicon slow-light modulator [44] chip is employed instead of the hybrid-packaged silicon photonic-electrical transmitter module as given in Figure 2. The eye diagrams and related histograms before and after equalization for the 112 GBaud PAM4 signal are given in Figure 11a,b. The FCNN slightly improves the eye diagram quality, and the FCNN-based Rx-side LUT achieves comparable results. Residual unrecoverable symbols still cause skewness in the histogram. In contrast, the GRU produces a much clearer eye diagram, with its corresponding histogram exhibiting four well-separated peaks. Meanwhile, the GRU-based Rx-side LUT maintains similar performance.

In terms of algorithm execution time, the FCNN- and GRU-based Rx-side LUT decrease 25.5% and 34.6% at 100 GBaud and 22.8% and 36.9% at 112 GBaud in comparison to their baseline equalization algorithms, as shown in Figure 11c,d. Each sector of the pie chart represents the proportion of the total execution time occupied by each of the four algorithms. The proportion of execution time for each algorithm $P_i$ is calculated by $P_i=T_i/{\sum }_{i=1}^4{T}_i$, where $T_1$, $T_2$, $T_3$ and $T_4$ represent the algorithm execution time of FCNN, GRU, FCNN-based Rx-side LUT and GRU-based Rx-side LUT, respectively. Due to GRU’s elevated degree of complexity, it accounts for a greater proportion of the total algorithm execution time compared to FCNN. The table size of the Rx-side LUT is directly affected by the number of neurons in the hidden layer of the baseline neural network algorithms. As a result, the FCNN-based Rx-side LUT occupies a smaller proportion of time compared to the GRU-based Rx-side LUT, the reason for which is that FCNN has fewer neurons in the hidden layer than GRU.

The performance of employing convolutional neural networks (CNN) and Transformer as the baseline of Rx-side LUT is also evaluated, as given in

Table 1. Algorithm execution time in the inference phase of CNN, Transformer and Rx-side LUT based on them.

Equalization	Execution Time (s)	Percentage of Time Reduction (%)
CNN	0.328710	-
CNN-based Rx-side LUT	0.193491	41.1
Transformer	0.351095	-
Transformer-based Rx-side LUT	0.226950	35.3

. The results shown in Table 1 align with our original findings: the Rx-side LUT significantly reduces execution time for both architectures of CNN and Transformer. For the CNN with nine convolutional layers and 1 fully connected layer, the time reduction exceeds 40%. As for the Transformer with two self-attention layers and one feed-forward layer (which has higher baseline complexity), the time reduction also exceeds 35%. This confirms the Rx-side LUT’s ability to bypass computationally intensive inference operations (convolution in CNN, self-attention in Transformer) via lightweight lookups.

Traditional filter-based equalization algorithms rely on computationally intensive operations (matrix multiplications, recurrent state updates, and high-order polynomial calculations), which translate to significant resource demands on FPGA/ASIC [45]. FCNN requires large numbers of multiplier-accumulator (MAC) units and on-chip memory to store weights. For a 100 GBaud PAM4 FCNN with two hidden layers (128 neurons each), FPGA implementation typically consumes 5000 DSP slices (for MACs) and 2 MB of block RAM (for weights). GRU introduces additional recurrent logic (gates and state updates) on top of FCNN, increasing resource usage by 30% compared to FCNN for the same input size. As for Volterra, high-order terms require exponential growth in MAC units with filter length, making them impractical for high-speed signals on mid-range FPGAs. The Rx-side LUT’s design inherently addresses the resource constraints of FPGA/ASIC, offering advantages over traditional equalization algorithms. It stores precomputed “input-output” pairs, requiring only block RAM or SRAM (in ASIC) proportional to the table size. And the nearest-neighbor lookup uses simple comparators and a small arithmetic logic unit for distance minimization. The Rx-side LUT’s shift from computation to memory-based lookup makes it highly suitable for FPGA/ASIC deployment, with significantly lower resource consumption and latency compared to traditional equalizers. This aligns with the practical needs of high-speed, low-power optical interconnects.

In the proposed Rx-side LUT scheme, the LUT size is governed by the length of the signal data sequence processed by the baseline equalization. The lookup efficiency of the Rx-side LUT relies on the nearest-neighbor algorithm, which searches for the closest match to the input signal to be equalized among all LUT entries. While a larger LUT with more entries can better preserve the fine-grained equalization information from the baseline equalizer, thus making the Rx-side LUT’s performance more consistent with the baseline. Excessive LUT size may introduce unnecessary storage and lookup overhead. To address this, techniques such as clustering algorithms (e.g., k-means clustering) can be employed to reduce LUT size. Similar signal samples and their corresponding equalization results can be merged into clusters, with each cluster represented by a centroid entry in the LUT. This approach effectively reduces storage overhead and lookup time by decreasing the number of entries. However, it is important to note that aggressive clustering (i.e., excessive reduction in LUT entries) may lead to a slight degradation in equalization performance, as fine-grained information about signal distortions is lost. Thus, the optimal LUT size requires a trade-off between storage efficiency, lookup speed, and equalization accuracy.

5. Conclusions

In this paper, a low-complexity Rx-side LUT equalization method is proposed for high-speed short-reach IM/DD transmission systems. The computationally intensive operations performed during the inference phase of neural network-based equalizers and the tap coefficients iteration process of filter-based equalizers are replaced by a lightweight lookup process. Experimental results demonstrate the effectiveness of the proposed Rx-side LUT method for IM/DD systems in reducing the computational complexity and algorithm execution time while maintaining similar BER performance to its baseline equalization. We believe this scheme will provide a cost-effective solution for future optical interconnects.