Isolated High-Gain DC-DC Converter with Nanocrystalline-Core Transformer: Achieving 1:16 Voltage Boost for Renewable Energy Applications

Abstract

This paper presents an isolated DC-DC converter with high voltage gain that features an advanced inter-built nanocrystalline-core medium-frequency transformer (NC-MFT). The isolated DC-DC converter with an NC-MFT is specifically designed for applications such as interconnect photovoltaic (PV) systems, DC microgrids, DC loads, and DC buses, where voltage gain is one of the essential issues to consider. The NC-MFT inside the DC-DC converter is designed with a new approach that not only provides isolation but also contributes to achieving high efficiency and a higher step-up ratio. The high efficiency of the converters contributes to the integration of PV systems into DC microgrids. The converter yields a high voltage conversion ratio of 16.17. The experimental results obtained at 41.8 V/676 V and 275 W for the prototype revealed high efficiency (95.63% at full load). The experimental results validate the theoretical analysis and simulation, confirming that the converter achieves the main objective of high voltage conversion and high efficiency. These results will contribute to the interest in the use of this type of energy and its impact on the reduction in CO₂ emissions.

1. Introduction

The continuous and effective use of renewable energy sources is one of the key activities that can be used to minimize carbon dioxide emissions deriving from the energy conversion process. Governments, industries, and general consumers have a growing interest in solar energy, mainly photovoltaic (PV) [1]. From the point of view of enabling technologies, several challenging issues must be tackled to achieve high performance and further increase the penetration of renewable power options. One of these challenges is to efficiently increment the low voltage output of solar panel blocks to the required voltage levels of DC loads/buses [2].

PV systems are becoming an essential type of DC microgrid, and they can have a great impact on mitigating energy poverty in rural and geographically remote locations [3]. The interconnection voltage level of PV systems connected to a DC microgrid, more specifically to a DC bus, is around 380 V [4,5,6,7]. To reach this voltage level, the voltage output of a single panel, or a small group of panels, must be low (20 V to 60 V for a single panel) [8]. Therefore, this output voltage must be stepped up, which opens the door to the development of high-gain DC-DC interfaces, as shown in Figure 1, while keeping efficiency and performance high [4,5,6,7,8,9]. Converters interconnecting photovoltaic panels and DC and AC microgrids are shown in Figure 2. Finally, in the last few years, we have observed the development of both conventional converters [9] as well as restructured ones [4,5] with the aim of stepping up the solar panels’ voltage output [4,5,6,7].

The design of converters with a high step-up voltage ratio conversion for PV applications faces issues such as a high input current and the technique for increasing voltage. If this input current is handled only with electronic commutation devices, as shown in Figure 3, efficiency is jeopardized because of the greater losses and cost. Taking this into account, in recent years, there has been increasing interest in developing both isolated [5,9] and non-isolated DC-DC converters [4,6,7].

The configuration of non-isolated converters lacks medium- or high-frequency transformers to step up or step down the voltage at its input [4,6,7]. In this case, transformer issues, such as core saturation or efficiency, are put aside. Although this apparent advantage may benefit non-isolated converters, the lack of galvanic isolation between the solar panels and the DC buses is regarded as a drawback. In [4], two transformerless DC-DC configurations are presented. Both configurations follow the structure of conventional boost and buck–boost converters. As expected, the voltage conversion ratio obtained is lower than 10, 1 to 8.4 (45 V/380 V), and the efficiency is 94.86%, both verified with a 110 W lab prototype. In this case, a higher voltage conversion ratio results in lower efficiency due to the increase in the current at the input.

From a similar point of view, in [7], a DC-DC boost converter with 1 to 11.5 ratio (34 V/380 V) is presented. The results obtained with a 200 W lab prototype validate the ratio and demonstrate 93% efficiency. Also, in [6], a DC-DC converter with a voltage conversion ratio of 1 to 15.83 (24 V/380 V) is presented. Like in other proposals, the results were validated by using a lab prototype but, in this case, specified at 225 W and 91.6% efficiency. As can be noted in previous works, the higher the step-up ratio, the lower the efficiency. Therefore, the challenge is to attain a converter configuration that has a high step-up ratio and high efficiency at the same time.

On the other hand, an isolated converter includes a medium- or high-frequency transformer. The characteristics required for such a transformer are high efficiency, low core losses, low winding losses, high power density, low working temperature, and non-saturated transformer operation [5,9]. Achieving all these characteristics together is a design challenge. In this work, an MFT, designed with a new approach, was used as part of the DC-DC converter structure.

With regard to isolated converters, a DC-DC half-bridge boost converter with a voltage conversion ratio of 1 to 10 (40 V/400 V) and a 94.5% efficiency is presented in [5]. These results were validated with a 300 W lab prototype. A high step-down DC-DC converter with a 1 to 23 voltage conversion ratio and 92% efficiency is presented in another approach [9]. These results are corroborated using a lab prototype specified at 110 W.

Some of the previous proposed converters attain efficiencies close to 95% but at the cost of obtaining a low voltage conversion ratio of 1 to 10. On the other hand, the efficiency of those proposed converters achieving a voltage conversion ratio ≥15 is lower than 92%. In these types of converters, the step-up ratio vs. efficiency relationship is inadequate for today’s PV applications.

In this context, the research problem is to determine whether DC-DC converters can be designed as an enabling technology of photovoltaic systems exhibiting a voltage conversion ratio ≥15 while keeping efficiency ≥95%. A positive solution to this challenge may result in achieving advanced converters that can further improve the performance of photovoltaic systems installations. Improved enabling technology can be one of the major players in boosting the penetration of PV systems into power grids.

Full-bridge DC-DC converters featuring new nanocrystalline-core medium-frequency transformers not only achieve high efficiency but also a high voltage conversion ratio useful to both photovoltaic systems and DC microgrids. In this regard, this paper proposes the design, simulation, and construction of a lab DC-DC full-bridge prototype featuring a medium-frequency transformer with a nanocrystalline core. The result is an advanced structure achieving a high voltage conversion ratio, 16, along with efficiency ≥95%.

Section 1 presents the state of the art of the boost converters applied to PV systems presented as well as the impact of the results of such works. Section 2 details the structure and stages of the boost converter proposed in this paper as well as the calculation of the losses in the semiconductor devices, both in the rectifier and in the inverter. The performance of the boost converter was evaluated using the MATLAB-Simulink platform, as described in Section 3. Section 4 presents the experimental validation of the proposed boost converter. Finally, in Section 5, all results are discussed and compared with those of other proposed boost converters available in the contemporary literature, while conclusions are expressed in Section 6.

2. DC-DC Converter Structure

The specialized literature reports several proposed isolated and non-isolated converters designed for high efficiency and a high voltage conversion ratio useful for PV system applications [4,5,6,7,9]. Although the full-bridge configuration is a well-known structure, adding cutting edge MFTs featuring nanocrystalline cores into these designs can improve efficiency while achieving high voltage conversion ratios. The three main stages of the full-bridge DC-DC configuration featuring a nanocrystalline-core MFT are the MOSFET H-bridge, the MFT, and the diode bridge, as shown in Figure 4. Besides the insolation provided, the MFT also increases the transformer turns ratio (transformation relation). The ratio results in an increase in the output voltage level while keeping a low level of core losses and winding losses.

2.1. MOSFET H-Bridge

The H-bridge stage (see Figure 5) converts the DC power signal into an AC square power signal to feed the MFT. V_DC1 denotes the DC input voltage to the H-bridge, and V_in is the AC square wave voltage output of the above-mentioned bridge. Observe that V_in depends on the modulation signal m₁ as shown in Figure 5.

The H-bridge configurations found in electronic converters are generally used for either signal inversion or adding two-way signaling to DC-DC dual-active bridge converters [10], electric vehicles [11], and electronic transformers [12,13]. It is worth mentioning that the H-bridge configuration facilitates the replication of the results presented in this paper by other potential interested parties.

Figure 6 shows the modulation signals to the converter for the two-level voltage at the MFT. The signal to S1 and S4 is 180° out of phase from the main signal applied to S2 and S3. The control scheme is not complex, which turns into an advantage due to the ease of reproducing the results compared to other types of control techniques applied, such as robust control, which may lead to even more confusion if multilevel topologies are in use.

Losses in semiconductor devices (MOSFETs) are determined through Equations (1)–(4), where the conduction losses are $\left({I_{D\left(RMS\right)}}^2·R_{DS\left(ON\right)}\right)$ and the switching losses are $P_{ON}+P_{OFF}$.

$$P_{MOSFET}=\left({I_{D\left(RMS\right)}}^2·R_{DS\left(ON\right)}\right)+P_{ON}+P_{OFF}$$

(1)

$$I_{D\left(RMS\right)}=I_{D\left(ON\right)}·\sqrt{D}$$

(2)

$$P_{ON}=f_{sw}·I_{D\left(ON\right)}·V_{DD}{·t}_{ON}·{\displaystyle \frac{1}{2}}$$

(3)

$$P_{OFF}=f_{sw}·I_{D\left(ON\right)}·V_{DD}{·t}_{OFF}·{\displaystyle \frac{1}{2}}$$

(4)

where F_MOSFET are the losses through each MOSFET; I_D(RMS) is the RMS current of the waveform flowing through the MOSFET; I_D(ON) is the current through the MOSFET; D is the duty cycle of the MOSFET; R_DS(ON) is the turn-on resistance of the MOSFET; P_ON is the turn-on losses of the MOSFET; P_OFF is the turn-off losses of the MOSFET; f_SW is the switching frequency; V_DD is the blocking voltage across the MOSFET; t_ON is the time taken for the MOSFET to reach its on state; and t_OFF is the time taken for the MOSFET to reach its off state.

2.2. Medium-Frequency Transformer (MFT)

The selected MFT design method is key to optimizing the performance of the transformer and by extension the DC-DC converter. Most MFT designs are specified to operate at a frequency range of 600 Hz to 20 kHz [14,15,16,17,18,19,20]. The core materials mostly define the transformer performance, efficiency, and power density. Common core materials are ferrite, silicon steel, and more recently nanocrystalline. Silicon steel is widely used at frequencies lower than 2 kHz [18,19,20], while nanocrystalline materials are reported at a frequency range of 1 kHz to 10 kHz [14,15,20,21] and ferrite cores at frequencies greater than 10 kHz [16,17].

Table 1. Comparison of core materials used in MFT design.

Parameters	Silicon Steel	Nanocrystalline	Ferrite
Type	Grain-oriented	VITROPERM 500F	N87
Core	Laminate 0.19 mm	Laminate 0.02 mm	Block
Permeability	1000	15,000/150,000	2000
Frequency range	600 Hz–2 kHz	1 kHz–10 kHz	Above 10 kHz
Maximum density flow	1.5-2.0 T	1.2 T	0.4 T
Cost	Low	High	Low

shows a comparison of characteristics of core materials used in MFTs. Regarding the frequency operating ranges of nanocrystalline materials, recent research efforts have found that such materials exhibit high performance, high efficiency, and high power density at frequencies of 1 kHz [20] and 5 kHz. As a step forward in this direction, this paper presents a 20 kHz, high-power-density MFT prototype design, which was numerically simulated, built, and validated via lab experimentation.

The operation of silicon steel at a 2 kHz frequency is not an acceptable option in the proposed converter because at this specification, the transformer size increases [18]. This implies a lower power density than using nanocrystalline materials. Ferrites are a possible option for 20 kHz; however, there are two major drawbacks with regard to nanocrystalline materials: (1) low density flow [17], which implies a lower density power, and (2) lower permeability [17], which implies both a greater dispersion inductance and higher dispersion flow. Therefore, the nanocrystalline material is highlighted as an option for the MFT designed in this paper, specifically VITROPERM 500F. It should be mentioned that the methodology for the MFT design as well as its corresponding specifications are presented in [21]. The design parameters for the MFT are reported in

Table 2. Initial MFT design parameters.

Parameters	Value
Output power, Po	275 W
Conversion ratio	1:16.5
Input voltage, Vin	41 V
Output voltage, Vo	676.5 V
Output current, io	0.406 A
Frequency, f	20 kHz
Number of phases	1-phase
Core material	Nanocrystalline
Core type	Toroidal

.

Table 3. MFT design results.

Parameters	Value
Core material	Nanocrystalline (VITROPERM 500F, W423)
Core type	Toroidal
Core dimensions	30 × 20 × 10 mm
Number of primary winding turns (N1)	18
Number of secondary winding turns (N2)	303
Primary winding caliber	14 AWG
Secondary winding caliber	26 AWG
Dispersion inductance (Ld)	0.79 µH
Flow density (Bac)	0.5 T
Temperature increase	48.5 °C
Core losses (Pfe)	0.39 W
Core winding (Pw)	0.71 W
Efficiency	99.6%

summarizes the results of the MFT design. The flow density (B_ac) was calculated with (5), obtaining 0.5 T for a working frequency of 20 kHz [22]. The number of turns of the primary (N₁) and secondary (N₂) winding is determined with (6) and (7), respectively. The computation of the core losses (P_fe) yields 0.39 W, calculated with (8). In this regard, the analytical calculation of the winding losses (P_w) using (9) yields 0.71 W. The final efficiency achieved is 99.6%, obtained with (10) [21]. Based on these results, a litz wire is not required to achieve high efficiency at 20 kHz. Thus, using the conventional round shape copper wire, the results obtained are highly satisfactory. This is also valid for the lab prototype as shown in Section 4.

$$B_{ac}={\displaystyle \frac{P_t·{10}^4}{k_f{k}_{u}Jf{A}_p}}$$

(5)

In (5), P_t is the total power of the MFT, A_p is the product between the transversal section area (A_c) and the window area (W_a), f is the design frequency, J is the current density, k_u is the use factor, and k_f is the waveform factor (4.44 for sine waves and 4.0 for square waves).

$$N_1={\displaystyle \frac{V_{in}·{10}^4}{k_f{B}_{ac}f{A}_c}}$$

(6)

$$N_2={\displaystyle \frac{N_1·V_o}{V_{in}}}$$

(7)

$$P_{fe}=P_{fe1}·W_{fe}$$

(8)

where P_fe1 are the nanocrystalline materials losses (w/kg). In the design of the MFT, P_fe1 = 17 W/kg was selected. In this case, W_fe, the core weight (kg), is specified at 275 W.

$$P_w=P_p·P_s=(I_{in}^2·R_1)·(I_o^2·R_2)$$

(9)

P_p and P_s are the winding losses of the primary and the secondary winding, respectively, while R₁ and R₂ are the resistance of the primary and secondary winding.

$$Efficiency=\left[\left({\displaystyle \frac{{(P}_{fe}+P_w)·100}{P_o}}\right)·(-1)\right]+100$$

(10)

Finally, obtaining a highly efficient MFT is a key step in achieving a DC-DC converter with high efficiency. Therefore, the higher the MFT efficiency, the higher the efficiency of the DC-DC converter. In this work, the MFT losses obtained are 1.1 W (0.4%), which is far better than the losses obtained by other proposed converters. It should be noticed that the total DC-DC converter losses comprise the MTF losses and those of the MOSFET H diode bridges. The minimum MFT efficiency expected is 98%; otherwise, the final converter efficiency might not be as high as required for today’s PV applications.

2.3. Diode H-Bridge

In the load side of the full-bridge DC-DC converter is the rectifier diode bridge, as is depicted in Figure 7. In this work, the bridge was implemented with silicon carbide Schottky diodes due to their capability for high-frequency operation and working voltage of up to 1200 V. Additional advantages of using this type of diodes are the reduction in the specifications for the required heatsink, low commutation losses, and high efficiency. All these characteristics together lead to a high-performance converter.

The losses in the diodes are determined with (11)–(14).

$$P_{DIODE}=\left(V_F·I_{F\left(AVG\right)}\right)+\left({I_{F\left(RMS\right)}}^2·R_{D\left(ON\right)}\right)$$

(11)

$$I_{F\left(AVG\right)}={\displaystyle \frac{I_{MAX}+I_{MIN}}{2}}·\delta$$

(12)

$$I_{F\left(RMS\right)}=\sqrt{{\displaystyle \frac{{I_{MAX}}^2+{I_{MIN}}^2+\left({I_{MAX}·I}_{MIN}\right)}{3}}·\delta }$$

(13)

where F_DIODE is the losses in the diode; V_F is the driving voltage of the diode; I_F(AVG) is the current flowing through the diode; I_F(RMS) is the RMS current of the waveform flowing through the diode; δ is the duty cycle of the diode; R_D(ON) is the on resistance of the diode; I_MAX is the maximum value of current (in forward bias) that flows through the diode; and I_MIN is the minimum value of current (forward bias) flowing through the diode.

The losses in the two stages of the converter (rectifier and inverter) are determined considering the nominal operating conditions of the topology. Equation (1) for the losses of the MOSFETs is made up of two parts, the conduction and switching losses. Conduction losses correspond to the product of the square of P_ON (3) and P_OFF (4). The switching losses correspond to the sum of P_ON (3) and P_OFF (4). The values of I_D(ON), D, f_SW, and V_DD are determined in the dimensioning of the boost converter.

In this work, V_DD is the voltage of the power supply connected to the input of the MOSFET H-bridge, and I_D(ON) is the current demanded by the converter. D is the duty cycle to which the semiconductor devices are subjected. The values of R_DS(ON), t_ON, and t_OFF were obtained from the manufacturer’s data sheet.

To calculate P_DIODE (11), it is required to determine (12) and (13). I_MIN is the current value demanded by the load connected to the bridge, while I_MAX is twice I_MIN. V_F and R_D(ON) are considered the V_F-I_F characteristic curves of the diode at different temperatures. Therefore, the values of V_F and R_D(ON) are dependent on the temperature and the currents I_MIN and I_MAX. To obtain the final efficiency of the converter, it is essential to determine the output power (P_DCout), which is determined with Equation (14).

$$P_{DCout}=P_{DCin}-{(n}_M·P_{MOSFET})-(n_D·P_{DIODE})-P_{MFT}$$

(14)

where P_DCin is the input power of the converter, n_M is the number of MOSFETs used, n_D is the number of diodes, and P_MFT is the total losses of the medium-frequency transformer.

3. Simulation Results

The data used for the numerical simulation of the converter are reported in

Table 4. Data for simulation of cases of study.

Parameters	Value
VDC1	42 V
VDC2	672 V
iDC2	0.409 A
PoDC	275 W
VDC1	20 kHz

. The converter is devised for photovoltaic system applications; therefore, it can be interconnected to DC buses, DC microgrids, and/or DC loads. The interconnection interface steps the voltage input up from 42 V to 672 V, a ratio of 16. In all simulations, the converter is supplied by a DC source, and the load is 1680 Ω. Figure 8 shows the MATLAB-Simulink version R2022b scheme of the proposed converter. Figure 9 shows the block diagram of Figure 8.

The parameters of the MFT are reported in

Table 5. MFT simulation parameters.

Variable	Value
Po	275 W
f	20 kHz
R1	0.0084 Ω
R2	2.29 Ω
Ld1	0.79 µH
Ld2	90 µH
Rm	4299 Ω
Lm	24.2 mH

. In this work, a T equivalent model was used to determine the magnetization inductance and resistance (L_m, R_m), the primary and secondary winding dispersion inductances (L_d1, L_d2), and the resistance corresponding to the primary and secondary of the MFT windings (R₁, R₂). L_m and R_m were calculated with (15) and (16), respectively [23], and L_d1 and L_d2 were determined with (17) [24], whereas R₁ and R₂ were calculated with (18) and (19), respectively [21].

A nanocrystalline-core MFT has lower dispersion inductances in comparison to high-frequency ferrite-core transformers. Such low dispersion inductance is because nanocrystalline cores exhibit high permeability, ranging from 15,000 to 150,000, while ferrites have 4000, at most. It is a well-known fact that the greater the permeability, the lower the dispersion inductance. All this leads to lower dispersion flow, and as a consequence, a concentrated magnetic flow occurs at the transformer core, which allows minimum MTF losses. These characteristics mean that greater converter efficiency can be obtained by using nanocrystalline MFT cores instead of ferrite.

$$L_m={\displaystyle \frac{{\mu }_r{\mu }_0{N}_1^2{A}_c}{l_c}}$$

(15)

where µ_r is the relative permeability of the core material, µ₀ is the vacuum permeability, and l_c is the mean length of the core [23].

$$R_m={\displaystyle \frac{V_{in}^2}{P_{fe}}}$$

(16)

$$\begin{array}{cc}{L}_d={\mu }_0{\displaystyle \frac{N_{L1}^2}{h_{\omega }}}{m}_1& [{MLT}_{iso}{m}_1{d}_{iso}+{MLT}_{pri}{\displaystyle \frac{\left(m_1-1\right)\left(2m_1-1\right)}{6}}{d}_{ins1}+{MLT}_{sec}{\displaystyle \frac{m_1\left(m_2-1\right)\left(2m_2-1\right)}{6m_2}}{d}_{ins2}\\ & +{MLT}_{pri}{\displaystyle \frac{\sin \left(\frac{2{∆}_1}{\alpha \delta }\right)4\alpha {\delta }^2\left(m_1^2-1\right)+4d_{pri}\left(2m_1^2+1\right)}{24{\left(\sin \frac{2{∆}_1}{\alpha \delta }\right)}^2}}\\ & -{MLT}_{pri}{\displaystyle \frac{\alpha {\delta }^2\left(\frac{4{∆}_1}{\alpha \delta }\right)\left(2m_1^2+1\right)-8d_{pri}\left(1-m_1^2\right)\cos \left(\frac{2{∆}_1}{\alpha \delta }\right)}{24{\left(\sin \frac{2{∆}_1}{\alpha \delta }\right)}^2}}\\ & +{MLT}_{sec}{\displaystyle \frac{m_1}{m_2}}{\displaystyle \frac{\sin \left(\frac{2{∆}_2}{\alpha \delta }\right)4\alpha {\delta }^2\left(m_2^2-1\right)+4d_{sec}\left(2m_2^2+1\right)}{24{\left(\sin \frac{2{∆}_2}{\alpha \delta }\right)}^2}}\\ & -{MLT}_{sec}{\displaystyle \frac{m_1}{m_2}}{\displaystyle \frac{\alpha {\delta }^2\sin \left(\frac{4{∆}_2}{\alpha \delta }\right)\left(2m_2^2+1\right)}{24{\left(\sin \frac{2{∆}_2}{\alpha \delta }\right)}^2}}+{MLT}_{sec}{\displaystyle \frac{m_1}{m_2}}{\displaystyle \frac{8d_{sec}\left(1-m_2^2\right)\cos \left(\frac{2{∆}_2}{\alpha \delta }\right)}{24{\left(\sin \frac{2{∆}_2}{\alpha \delta }\right)}^2}}]\end{array}$$

(17)

where:

${\mu }_0$= vacuum permeability dins1 = insulation distance between the layers of the primary winding dins2 = insulation distance between the layers of the secondary winding m1 = number of layers in the primary winding m2 = number of layers in the secondary winding MLTiso = mean length of the isolation distance MLTpri = mean length turns of primary portion MLTsec = mean length turns of secondary portion

diso = isolation distance NL1 = turns per layer hw = winding height dpri = thickness of the primary winding dsec = thickness of the secondary winding ∆1 = penetration ratio of the primary winding, ${∆}_1={\displaystyle \frac{d_{pri}}{\delta }}$ ∆2 = penetration ratio of the primary winding, ${∆}_2={\displaystyle \frac{d_{sec}}{\delta }}$ $\alpha ={\displaystyle \frac{1+j}{\delta }}$ where $\delta$ is the skin depth

$$R_1={MLT}_1·N_1·{\displaystyle \frac{\mu \Omega }{{cm}_1}}·{10}^{-6}$$

(18)

$$R_2={MLT}_2·N_2·{\displaystyle \frac{\mu \Omega }{{cm}_2}}·{10}^{-6}$$

(19)

MLT₁ and MLT₂ are the mean lengths of the primary and secondary windings, respectively. µΩ/cm₁ and µΩ/cm₂ are the resistance per centimeter of the primary and secondary winding conductors, respectively.

The simulation results are depicted in Figure 10a–d. In Figure 9, observe that the input and output MTF voltages are 40.92 V and 675.9 V, respectively; this results in a turns ratio of 16.5. Then, Figure 9 shows the input and output MFT currents, 6.76 A and 0.406 A, respectively. This yields an efficiency of 99.22%. Next, Figure 9 depicts both the input and output converter voltages, which are the result of a load of 1680 Ω, and input/output converter voltages of 42 V/672 V, respectively. Finally, Figure 9 presents the input and output converter currents, 6.73 A and 0.403 A, respectively. The converter efficiency is 95.81%. Various other simulations were performed at distinct frequencies (1 kHz, 5 kHz, 10 kHz, 20 kHz, and 50 kHz) focusing on determining the frequency at which the highest converter efficiency is obtained. This frequency is 20 kHz.

Figure 11 shows the efficiency of the boost converter obtained in the simulation with respect to different load levels. The maximum efficiency is 95.81%. The total converter losses are 4.19%, which is the sum of 0.78% from the MTF plus 3.41% from the MOSFET H. The simulation results confirm that the nanocrystalline-core MFT achieves high converter efficiency. Also notice that the MFT losses are low using square waves at 20 kHz. The MFT high step-up ratio, in addition to its galvanic isolation, makes this proposed converter a very attractive solution in PV system applications.

4. Experimental Results

To validate the design and simulation results, a lab prototype of the full-bridge DC-DC converter with a high-efficiency nanocrystalline-core MFT was implemented and tested. The specifications of this lab prototype are reported in

Table 6. Parameters of the lab prototype.

Parameter	Value
Conversion ratio	1:16
VDC1	42 V
VDC2	672 V
PoDC	275 W
Load	1680 Ω

. Observe that the prototype was tested at 275 W, with a DC input voltage of 42 V and a load of 1680 Ω. The lab prototype is designed to achieve a voltage conversion ratio of 1 to 16.

Figure 12 depicts a block diagram of the experimental setup. The converter is fed with a DC variable voltage source. The supplied signal to the MOSFET H-bridge is a square wave at 20 kHz generated with a DSP PICOLO S28335 (TexasInstrument, Dallas, TX, USA).

Figure 13 shows the lab prototype and the experimental setup. The 20 kHz nanocrystalline-core MFT was constructed according to the specifications listed in

Table 7. Design specifications for the MFT featuring a nanocrystalline core.

Variable	Value
Core	T60006-L2030-W423
Core manufacture	Vacuumschmelze
Core dimensions	30 × 20 × 10 mm
Winding type	Copper wire (round)
N1	18 turns
N2	303 turns
Primary winding caliber	14 AWG

. At this frequency, the commutation losses of the MOSFET H-bridge increases, and converter efficiency drops.

However, if a MFT is designed at frequencies below 20 kHz, the efficiency is still about 95%. In this case, the power density is lower than required, and the size of the transformer can be increased to comply with the amount of power specified.

Figure 14 depicts both the voltage and the current MTF waveforms. Observe that the input voltage is 41.6 V, the output voltage is 697 V, the input current is 6.83 A, and the output current is 0.400 A. The final MFT efficiency is 98.12%, which is high compared to other nanocrystalline-core MFTs reported in the literature.

Figure 15a–c show the voltage and current inputs and outputs of the boost converter at 25%, 50%, and 75% load. Figure 16 shows the input and output voltages as well as the currents of the DC-DC converter at full load. Notice that the input voltage of the converter is 41.8 V, while its respective output voltage is 676 V. The input current of the converter is 6.9 A, and the output current is 0.408 A. The full-bridge DC-DC converter efficiency is 95.62% at a power of 275 W.

Figure 17 shows the efficiency of the boost converter obtained in the laboratory with respect to different load levels; the highest efficiency obtained is 95.6% at full load.

The experimental results obtained validate the high values of the transformer turns ratio, efficiency, and voltage step-up ratio (1:16) of the DC-DC converter design. These results are very encouraging for the use of the proposed converter as an interface to connect PV systems to DC microgrids, DC buses, and/or loads.

5. Discussion

A review of research papers was thoughtfully carried out to compare our proposal to other similar works also featuring DC-DC converters with a voltage conversion ratio >8 and high efficiency. Considering this,

Table 8. Comparison between the proposed converter and others that also exhibit high voltage gain.

Parameter	[4]	[5]	[7]	[6]	[9]	Proposed Converter
Voltage gain	8.4	10	11.5	15.8	23	16
Efficiency	94.8%	94.5%	93%	91.6%	92%	95.6%
Galvanic insulation	No	Yes	No	No	Yes	Yes
Prototype power	100 W	300 W	200 W	225 W	110 W	275 W
Switching frequency	100 kHz	46 kHz	50 kHz	50 kHz	100 kHz	20 kHz
Raised voltage	Yes	Yes	Yes	Yes	No	Yes

presents the characteristics of five different proposed converters.

Referring to Table 8, ref. [4] presents a high voltage gain converter (8.4) with an input voltage of 45 V and an output voltage of 380 V. This design is based on boost and buck–boost converters. However, this proposed converter was validated with a lab prototype specified at 100 W and does not provide galvanic isolation because no transformer is included. The reported converter efficiency is 94.8%. In comparison, the voltage conversion ratio in our proposed converter is 90.5% greater than that reported in [4], and our converter is slightly more efficient (0.8%).

In [5], a voltage conversion ratio very close to [4] is reported but with the advantage of providing internal galvanic isolation. The results were validated using a lab prototype specified at 300 W. The primary and secondary testing voltages are 40 V and 400 V, respectively. The reported efficiency is 94.5%, just 1.1% lower than that achieved in our work. However, the voltage conversion ratio of the converter is 60% lower than that obtained in our work.

In [7], a DC-DC converter design exhibiting a voltage conversion ratio of 1 to 11.5 is presented. The converter input/output voltage is 34 V/380 V. The reported efficiency is 93% and was validated with a 200 W lab prototype. The voltage conversion ratio achieved in our proposed converter is 39.13% greater, and the efficiency is slightly greater (2.6%). In summary, in [4,5,7], the reported efficiencies are closer to 95%, but the corresponding voltage conversion ratios reported are generally about 35% lower than in our work.

Moreover, refs. [6,9] presents proposed DC-DC converters for which voltage conversion ratios greater than 15 have been reported. Specifically, in [6], a voltage booster with a voltage gain of 15.8 is described. This converter was validated using a 225 kW lab prototype. The input/output voltages are 24 V/380 V with an efficiency of 91.6%. The voltage conversion ratio achieved is 0.2, lower than the ratio reported in our investigation. Also, the reported efficiency is 4% lower. In other work, ref. [9] presents a galvanic isolated DC-DC converter with a high voltage conversion ratio of 1 to 23. However, the efficiency of 92% achieved is low. In that work, compared to our proposed converter, a slightly higher voltage ratio was obtained but with 3.6% lower efficiency.

In summary, the full-bridge DC-DC converter featuring an MFT with a nanocrystalline core proposed in this paper contributes to increasing the efficiency of photovoltaic systems interconnected to DC microgrids, DC buses, and/or DC loads.

6. Conclusions

An isolated full-bridge DC-DC converter with a nanocrystalline-core MFT exhibiting a high voltage conversion ratio and high efficiency that is well suited for photovoltaic system applications is presented in this paper. The structure of the converter designed was obtained by modifying the basic full-bridge converter. The modifications represent (i) an introduction to a transformer with new design techniques, (ii) the combination of these new transformer designs with nanocrystalline materials, and (iii) the integration of these new transformer structures with the MOSFET H-bridge and rectifier diode bridge. The adaptation of these structures strengthens the development of new generations of full-bridge DC-DC converters producing a voltage gain of 16 and total converter losses of 4.4%.

The experimental results obtained from the lab prototype show that the converter handles a power of 275 W with an efficiency of 95.6% and provides a voltage gain of 16. The outstanding characteristics of the proposed converter make it a promising candidate for interconnecting a PV system to a DC microgrid or AC microgrid. In addition, bearing in mind that combined cycle CO₂ emissions emit 400 g/kWh and photovoltaic energy emissions of 32 g/kWh, when increasing the efficiency of this type of converter by 4%, the CO₂ emissions per kWh tend to increase by the same percentage, contributing to the minimum production objective of CO₂ emissions for 2050.