# Photovoltaic Inverter Reliability Study through SiC Switches Redundant Structures

^{1}

^{2}

^{3}

^{*}

## Abstract

**:**

## 1. Introduction

_{2}emissions and the greenhouse effect [1,2].

- The reliability analysis of the full bridge inverter with different structures showed that the system presented the best reliability and useful life using a passive parallel redundant structure.
- The redundancy of the switching components in the system with a passive parallel structure allowed a substantial increase of up to 75% in the reliability of the system.
- The use of SiC switches contributed to increased system reliability due to the material’s performance, such as lower internal resistance and better thermal conductivity. This contributed to reducing switching problems, losses, and, therefore, allows a better thermal balance, higher reliability, and longer useful life.

## 2. Reliability Theory

#### 2.1. Reliability

#### 2.2. Reliability Structures

#### 2.3. Standard MIL HDBK-217F

_{P}is the adjusted component failure rate, λ

_{b}is the component base failure rate, π

_{T}is the encapsulation temperature factor, π

_{S}is the electrical stress factor, π

_{C}is the construction factor, π

_{Q}is the quality factor, π

_{E}is the environmental factor, π

_{A}is the application factor, and π

_{CV}is the capacitance factor.

_{P}for each component.

_{T}, as shown in the table previously described.

_{T}, which has a considerable weight in the failure rate, is presented in (18) based on the Arrhenius model, which indicates the temperature acceleration in the component [6,9,10,11,12,14]:

_{a}is the activation energy in

_{e}V; k is Boltzmann’s constant, equal to 8.617 × 10

^{−5}

_{e}V/

^{o}K; K is the absolute temperature in Kelvin; and T

_{U}will be the temperature in use.

_{loss}in the components (8) [5,9,10,11,12,14]. It depends on the junction temperature T

_{j}for MOSFETs, and T

_{U}can be replaced by T

_{j}.

_{loss}is the sum of the static P

_{loss(static)}and dynamic losses P

_{loss(dynamic)}. θ

_{jc}is the junction thermal resistance of the package. R

_{DSon}is the internal resistance at the moment of ignition. I

_{rms}represents the effective current. I

_{avg}and V

_{avg}are the average current and voltage values, respectively.

_{S}, and it is a function of V

_{S}in (23). It also depends on the voltage stress ratio in which the component is stressed, which is the ratio of V

_{a}, the applied operating voltage, and the nominal voltage V

_{n}[9,10,12].

_{S}will assume is a function of the following conditions.

_{S}= 0.054 if the condition is satisfied: V

_{S}≤ 0.3.

_{S}= ${V}_{S}^{2.43}$ if the condition is satisfied: 0.3 < V

_{S}≤ 0.3.

_{b}on the inductor should be made using (24); it is directly dependent on the temperature T

_{HS}. Therefore, the hot spot temperature T

_{HS}(25) is obtained according to the temperature change in the component ΔT

_{d}, resulting in an average increase in T

_{a}. T

_{U}can be replaced by T

_{HS}and T

_{a}, according to the component to be analyzed [9,10,12].

_{o}and the nominal operating voltage V

_{n}. Substituting S and T

_{a}, the base failure rate for the capacitor, shown in (27), is calculated.

_{CV}for the capacitor depends directly on the capacitor value C and is expressed as follows [6,9,10,11,12].

^{6}h [9,10,21].

## 3. Power and Reliability Design

#### 3.1. Reliability Design

_{1}and S

_{2}and the other of S

_{3}and S

_{4}. These can generate four operating states and three different output voltage levels [10,13,14,23].

_{SW}

_{1}of the two MOSFETs in parallel is obtained as a single module that includes the reliability of R

_{S}

_{1}y R’

_{S}

_{1}, which is similarly performed for each of the MOSFET structures. Following this, the serial model should be used to estimate the overall reliability R

_{S}(t) of the inverter.

_{Sw}

_{1}of two parallel active switches presenting an equal failure rate of λ

_{S}

_{1}= λ’

_{S}

_{1}= λ

_{1}.

_{P}(t) from (32) in R(t) from (3) and integrating from 0 to t when t = ∞ to obtain (34).

_{SW}

_{1}(t) = R

_{SW}

_{2}(t) = R

_{SW}

_{3}(t) = R

_{SW}

_{4}(t) = R

_{1}(t), the two inductors R

_{Lf}

_{1}(t) = R

_{2}(t) and R

_{Lf}

_{2}(t) = R

_{3}(t), and, finally, the capacitor R

_{Cf}(t) = R

_{4}(t). The following assumption is considered. Parallel switch modules R

_{1}(t) are equal and have an equal failure rate, λ

_{SW}

_{1}= λ

_{SW}

_{2}= λ

_{SW}

_{3}= λ

_{SW}

_{4}= λ

_{1}. The inductor failure rate λ

_{Lf1}is λ

_{Lf1}= λ

_{2}for the inductor λ

_{Lf2}will be λ

_{Lf2}= λ

_{3.}Finally, the capacitor λ

_{Cf}= λ

_{4}. The block diagram is simplified, and (35) is obtained.

#### 3.2. Power Stage Design and Simulation

_{0}≤ f

_{res}≤ f

_{sw}. The resonant frequency f

_{res}was between 10 times higher than the grid frequency f

_{0}and 10 times lower than the switching frequency f

_{sw}.

_{f}

_{1}and L

_{f}

_{2}and the capacitor C

_{f}are considered. The output voltage V

_{g}in (38) is a function of the supply voltage V

_{PV}and the modulation index m of the inverter.

_{f}

_{1}is given by:

_{f}

_{1}is the inductor’s current ripple.

_{f}

_{2}, it is necessary to use the following relation:

^{®}using a unipolar modulation [5,10,26] and silicon carbide MOSFETs C3M0065090D (Manufacturer CREE) [5,14,24].

## 4. Reliability Results

_{max}are the maximum current values. T is the signal period. D is the duty cycle.

_{S}(t), MTBF, and R

_{S}(t) were calculated using the traditional standard MIL HDBK-217F. An ambient temperature of 35 °C and an environmental factor (GB) were considered.

^{6}h.

_{1}was on, the flowing current was 6.26 A

_{rms}, and the failure rate would be 12.349 failure/10

^{6}h for the single MOSFET. Case 2 (Active parallel redundant): MOSFETs S

_{1}and S’

_{1}in parallel were simultaneously active, the total current flowing was equal to Case 1, but this was divided between the two MOSFETs. As a result, 3.13 A

_{rms}will flow into each switch, causing the losses and failure rate in each MOSFET to be reduced, giving 5.962 failure/10

^{6}h for each pair of active switches. Case 3 (passive parallel redundant): S

_{1}and S’

_{1}were in parallel. State 0: Only S

_{1}was active, and S’

_{1}was on standby. State 1: S

_{1}failed and, consequently, was deactivated, and S’

_{1}was activated. Now, the equivalent failure rate of the pair of MOSFETs in passive parallel redundancy was equal to 3.08725 failure/10

^{6}h. This was because it presented a double redundancy.

## 5. Conclusions

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Conflicts of Interest

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**Figure 4.**Reliability structures in MOSFET: (

**a**) A single MOSFET system in serial; (

**b**) Redundant system active in parallel with two MOSFETs; (

**c**) Redundant system passive in parallel with two MOSFETs.

**Figure 6.**Active power injection filter with LCL filter. From top to bottom: average voltage (100 V/div) and average current (10 A/div).

Device | Failure Rate Equation |
---|---|

Diode | ${\lambda}_{p}={\lambda}_{b}\left({\pi}_{T}.{\pi}_{S}.{\pi}_{C}.{\pi}_{Q}.{\pi}_{E}\right)$ |

Transistor | ${\lambda}_{p}={\lambda}_{b}\left({\pi}_{T}.{\pi}_{A}.{\pi}_{Q}.{\pi}_{E}\right)$ |

Inductor | ${\lambda}_{p}={\lambda}_{b}\left({\pi}_{Q}.{\pi}_{E}.{\pi}_{T}\right)$ |

Capacitor | ${\lambda}_{p}={\lambda}_{b}\left({\pi}_{Q}.{\pi}_{E}.{\pi}_{CV}\right)$ |

Device | Arrhenius Model |
---|---|

Diode | ${\pi}_{T}=\mathrm{exp}\left(-3091\left(\frac{1}{{T}_{j}+273}-\frac{1}{298}\right)\right)$ |

Transistor | ${\pi}_{T}=\mathrm{exp}\left(-1925\left(\frac{1}{{T}_{j}+273}-\frac{1}{298}\right)\right)$ |

Inductor | ${\pi}_{T}=\mathrm{exp}\left(-\frac{0.11}{0.00008617}\left(\frac{1}{{T}_{{}^{HS}}+273}-\frac{1}{298}\right)\right)$ |

Capacitor | ${\pi}_{T}=\mathrm{exp}\left(-\frac{0.15}{0.00008617}\left(\frac{1}{{T}_{a}+273}-\frac{1}{298}\right)\right)$ |

Parameter | Value |
---|---|

P_{O} | 1 kW |

V_{g} | 127 Vrms |

V_{PV} | 200 V |

α | 3 |

L_{f}_{1} | 425 µH |

L_{f}_{2} | 141 µH |

C_{f} | 6.6 nF |

Device | λ_{b} | π_{T} | π_{A} | π_{Q} | π_{E} | π_{C} | π_{V} |
---|---|---|---|---|---|---|---|

Transistor (MOSFET) | 0.012 | 3.6 | 5.5 | 8 | 6 | - | - |

Inductor | 0.00003 | 1.82 | - | 3 | 6 | - | - |

Capacitor | 0.00037 | 1.209 | - | 10 | 10 | 0.35449 | 26.17 |

Failure/10^{6} h | Serial | Active Parallel | Passive Parallel |
---|---|---|---|

λ^{PM}(Each module) | 12.34900000 | 5.962000000 | 3.087250000 |

λ^{PI}(Ls) | 0.000983550 | 0.000983550 | 0.000983550 |

λ^{PC}(C) | 0.014092541 | 0.014092541 | 0.014092541 |

λ_{System}(Total) | 49.41100000 | 23.86400000 | 12.36500000 |

MTBF | 0.020238000 | 0.041904000 | 0.080873000 |

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## Share and Cite

**MDPI and ACS Style**

Villanueva, I.; Vázquez, N.; Vaquero, J.; Hernández, C.; López-Tapia, H.; Osorio-Sánchez, R.
Photovoltaic Inverter Reliability Study through SiC Switches Redundant Structures. *Technologies* **2023**, *11*, 59.
https://doi.org/10.3390/technologies11020059

**AMA Style**

Villanueva I, Vázquez N, Vaquero J, Hernández C, López-Tapia H, Osorio-Sánchez R.
Photovoltaic Inverter Reliability Study through SiC Switches Redundant Structures. *Technologies*. 2023; 11(2):59.
https://doi.org/10.3390/technologies11020059

**Chicago/Turabian Style**

Villanueva, Ignacio, Nimrod Vázquez, Joaquín Vaquero, Claudia Hernández, Héctor López-Tapia, and Rene Osorio-Sánchez.
2023. "Photovoltaic Inverter Reliability Study through SiC Switches Redundant Structures" *Technologies* 11, no. 2: 59.
https://doi.org/10.3390/technologies11020059