Interleaved Buck Converter for Inductive Wireless Power Transfer in DC–DC Converters

Abstract

The use of Inductive Wireless Power Transfer (IWPT) varies from low-power applications such as mobile phones and tablets chargers to high-power electric vehicles chargers. DC–DC converters are used in IWPT systems, and their design needs to consider the demand of high efficiency in the power transfer. In this paper, a DC–DC power converter for IWPT is proposed. Its topology uses a DC–AC converter in the transmitter circuit and an AC–DC converter in the receptor. The transmitter has an interleaved coupled-Buck converter that integrates two Buck converters connected to a half inverter bridge and a parallel resonant load. The control strategy implemented for the semiconductor switching devices allows two operating modes to obtain a sinusoidal output voltage with a low distortion that makes it suitable in high-efficiency power transfer systems. To obtain a DC output voltage, a full wave bridge rectifier is used in the receptor circuit. The proposed topology and the control strategy are validated with simulation and experimental results for a 15 W prototype.

1. Introduction

The increasing use of mobile and electronic devices as basic tools for daily activities has generated the need for novel technologies for battery recharging. The Wireless Power Transfer (WPT) has been considered as an option to make the battery recharging more convenient, safe, and automatic [1,2]. The WPT can be made through an inductive power transfer (IPT) and capacitive power transfer (CPT) [3,4,5]. Since IPT is applicable to many power levels and gap distances, its use has been considered in battery recharge topologies [6,7]; some of them include bidirectional data transfer [8]. Special attention should be paid to the design of intermediate conversion stages to obtain a sinusoidal signal with low distortion to be transferred.

Some proposed topologies imply a sinusoidal signal generated by cascade schemes with a DC–DC converter connected to resonant circuits [9,10]. These topologies are complex and limit the converter efficiency when the design parameters, for example, the gap distance and aligning between coils, change. The topologies also present some additional disadvantages: the use of energy storage elements that increase losses in parasitic elements and reduce the lifetime of the converters [11]; the need to employ complex control strategies for obtaining a specific output level and improving the Total Harmonic Distortion (THD) [12]; too high number of semiconductor devices used in some topologies [13].

The proposed scheme integrates two buck converters connected to a half inverter bridge to generate an AC signal that is processed by a parallel resonant circuit conformed by the output buck capacitor and a transmitter inductor. A burst Pulse Width Modulation (PWM) signal is used to control the semiconductor devices according to the symmetrical operation of the buck converters. The amplitude of the sinusoidal output voltage can be determined by the duty cycle D of its operation. Finally, a full wave bridge rectifier is used to obtain the desired DC output voltage. The proposed topology exhibits the following advantages: first, the generation of a sinusoidal signal with low THD in the DC–AC conversion stage increases the efficiency in the converter; second, a DC–AC proposed topology allows the reduction of switching and conduction losses, and, third, a simple control strategy with two PWM burst complementary signals is used to handle the output voltage level.

Simulation results obtained in Saber Sketch and experimental results for a 15 W prototype are provided in the article, validating the presented principle of operation.

2. Principle of Operation of Proposed Converter

2.1. Circuit Description

The proposed DC–DC converter is shown in Figure 1. The first buck converter is delimited with a red color. Its topology includes the switching device M_B1, the inductor L_B1, and the diode D_B1. The second buck converter, delimited by a blue color, is formed by M_B2, L_B2, and D_B2.

The output of the buck converters is connected to a half bridge inverter conformed by the semiconductor devices M_H2 and M_H1. To make the converter compact, the capacitor C_tx works as a filter for both buck converters and is also used in the parallel resonant circuit to operate together with the coupled inductor L_tx to obtain a sinusoidal waveform. The receptor has a resonant LC parallel circuit with the coupled inductor L_rx and capacitor C_rx; its output is connected to a full wave bridge rectifier (D_a, D_b, D_c, and D_d) to obtain the DC output voltage.

2.2. Principle of Operation

The principle of operation of the DC–DC converter is based on the generation of two PWM complementary signals, V_G1 and V_G3, that control the half inverter bridge and two burst PWM signals, V_G2 and V_G4, that control the operation of the buck converters, as shown in Figure 2.

The synchronization of the four signals generates a square output voltage V_buck with an amplitude determined by the duty cycle D of the buck converters operation in its continuous mode. During the first half of the time period T_HB, the top Buck converter generates the positive output voltage +V_Buck, and, during the second half of T_HB, the bottom Buck converter generates the negative voltage −V_Buck. The resonant circuit composed from C_tx and L_tx is used to obtain a sinusoidal output voltage with the same amplitude of V_buck and a peak amplitude V_txpk defined by Equation (1), where V_in is the input voltage of the converter:

$$V_{txpk}=\frac{4D{V}_{in}}{\pi }$$

(1)

The control signals of Figure 2 generate two operating modes:

• Mode I for the interval 0 < t < 0.5 T_HB. Figure 3 shows the equivalent circuit when M_B1 and M_H1 are in the on state. The current flows through the resonant load obtaining the positive half cycle of the expected sinusoidal signal. The peak amplitude is determined by the buck converter output voltage V_Buck, which is controlled through D of the PWM burst signal. In the rectifier, the diodes D_a and D_d are in the on state during the positive half cycle of the voltage v_rx.

A state-space representation for the DC–AC conversion in the form X’ = AX + BU may be used to model the circuit operation in Mode I. Considering x₁ = i_LB1, x₂ = i_LB2, x₃ = v_tx and x₄ = i_Ltx as the state variables, the system can be modeled according to Equation (2).

$$\left[\begin{array}{c}i{\prime }_{LB1}\\ i{\prime }_{LB2}\\ V{\prime }_{tx}\\ i{\prime }_{Ltx}\end{array}\right]=\left[\begin{array}{cccc}0& 0& 0& 0\\ 0& 0& \frac{1}{L_{B2}}& 0\\ 0& -\frac{1}{C_{tx}}& 0& -\frac{1}{C_{tx}}\\ 0& 0& \frac{1}{L_{tx}}& 0\end{array}\right]\left[\begin{array}{c}{i}_{LB1}\\ i_{LB2}\\ V_{tx}\\ i_{Ltx}\end{array}\right]+\left[\begin{array}{c}0\\ \frac{1}{L_{B2}}\\ 0\\ 0\end{array}\right]V_{in}$$

(2)

2.

Mode II for the interval 0.5 T_HB < t < 1 T_HB. Figure 4 shows the equivalent circuit when M_B2 and M_H2 are in the on state. The current through the resonant circuit flows in the opposite direction of Mode I to generate the negative half cycle of the sinusoidal signal. The output signal peak amplitude is determined by the voltage V_Buck, which is controlled through D of the PWM burst signal. In the rectifier, diodes D_b and D_c are in the on state during the negative half cycle of the voltage v_rx.

The state-space representation for the DC–AC converter that models the circuit operation of Mode II can be denoted as follows:

$$\left[\begin{array}{c}i{\prime }_{LB1}\\ i{\prime }_{LB2}\\ V{\prime }_{tx}\\ i{\prime }_{Ltx}\end{array}\right]=\left[\begin{array}{cccc}0& 0& -\frac{1}{L_{B1}}& 0\\ 0& 0& 0& 0\\ \frac{1}{C_{tx}}& 0& 0& -\frac{1}{C_{tx}}\\ 0& 0& \frac{1}{L_{tx}}& 0\end{array}\right]\left[\begin{array}{c}{i}_{LB1}\\ i_{LB2}\\ V_{tx}\\ i_{Ltx}\end{array}\right]+\left[\begin{array}{c}\frac{1}{L_{B1}}\\ 0\\ 0\\ 0\end{array}\right]V_{in}.$$

(3)

3. Simulation Results

To verify the principle of operation of the proposed DC–DC converter, a simulation in Saber was performed using the variables and calculated component parameters listed in

Table 1. Simulation variables and component parameters. PWM: Pulse Width Modulation.

Quantity	Value
Supply voltage Vin	25 V
Output voltage V0	10 V
Output power Po	15 W
Ripple voltage ΔVo	10% of Vo
Switching frequency of burst PWM signal fBurst	500 kHz
Switching frequency of inverter leg fHB	100 kHz
Inductors LB1 and LB2	130 µH
Capacitor Ctx	0.47 µF
Capacitor Crx	220 nF
Capacitor Cf	4.7 µF
Inductor Ltx	6.3 µH
Inductor Lrx	12 µH
Output load Ro	330 Ω

. The principal components are obtaining according to Equations (4)–(7) [14]. The simulation uses ideal components and does not consider parasitic components.

$$L_{B1}=L_{B2}=\frac{(V_{in}-V_o)}{\Delta I_o{f}_{Burst}}\approx 130\mu H$$

(4)

$$C_{tx}=\frac{1}{{\left(2\cdot \pi \cdot F_{HB}\right)}^2{L}_{tx}}\approx 0.47\mu F$$

(5)

$$C_{rx}=\frac{1}{{\left(2\cdot \pi \cdot F_{HB}\right)}^2{L}_{rx}}\approx 220nF$$

(6)

The control signals V_G1, V_G2, and V_G3, V_G4, that are used to activate M_B1, M_H1, M_B2, and M_H2 respectively, are shown in Figure 5. The switching frequency of the half bridge, signals V_G1 and V_G3, is 100 kHz, and the burst signals that commutate the semiconductor devices in the buck converters operate at 500 kHz, with a D = 0.6.

The correct energy transmission through the coupled inductors is verified in Figure 6 and Figure 7. The currents through inductors L_tx and L_rx, i_Ltx and i_Lrx, respectively, are shown in Figure 6 using a coupling factor of 0.5; it can be denoted that the peak-to-peak amplitude of i_Ltx and i_rtx are 12.32 A and 6.04 A, respectively. Figure 7 shows the voltage in inductor L_rx, v_rx, with an amplitude of 24.7 V.

Figure 8 analyzes the voltage and current in the output resistive load R_o, v_o, obtaining a DC level (average measure) of V_o = 10.304 V and I_o = 1.28 A.

4. Experimental Results

To validate the principle of operation of the proposed converter, a prototype with a maximum nominal power transmission of 15 W was implemented. The variables used in the experiment, the component parameters of the prototype, and the semiconductor device types are listed in

Table 2. Variables and component parameters of the experiment.

Quantity	Value
Source voltage Vin	25.0 V
Output voltage Vo	10.0 V
Switching frequency of burst PWM signal fBurst	500 kHz
Switching frequency of inverter leg fHB	100 kHz
Inductors LB1 and LB2	130 µH
Capacitor Ctx	0.47 µF
Capacitor Crx	220 nF
Capacitor Cf	4.7 µF
Inductor Ltx	6.3 µH
Inductor Lrx	12.0 µH
Output load Ro	330 Ω

and

Table 3. Types of semiconductor devices.

Device	Type
MOSFETs	CMF10120D
Diodes, DB1 and DB2	C2D10120
Diodes Da, Db, Dc and Dd	1N5822

.

A microcontroller STM32F051 was used to obtain the digital control signals at 100 kHz and 500 kHz with an interface implemented with drivers UCC2050 and UCC21530. The results of the experimental test bench were measured using a 100 MHz Mixed signal oscilloscopes MSO7012B and DS01012A from Agilent Technologies.

To validate the wireless energy transmission, inductors 760308111 and WE760308102142 of Wurth-Elektronics were used as transmitter and receptor inductors respectively. This type of inductors is designed with minimal losses and absorption (High Q) and it operates between 100 kHz and 200 kHz at powers up to 200 W. Mosfet CMF1020D was used with a trr of 138 ns with low capacitances, high blocking voltage of 1200 V with Low RDS(on) of 160 mΩ, and continuous drain current of 24A@25°. SiC Schottky diodes, C2D10120, were employed in the rectifier to operate at 100 kHz with low switching losses, and this device has the following parameters: I_F(AV) of 31 A with zero reverse recovery current, essentially no switching losses. The parameters indicated on each component ensure minimum switching and conduction losses, switching to the operating frequency and adequate power handling.

To achieve the switching frequency of 500 kHz, the digital signals V_G1, V_G2, V_G3, and V_G4 plotted in Figure 9 are used to control the semiconductor devices in the interleaved buck converter and were generated using the microcontroller STMicroelectronics STM32F108.

To validate the wireless energy transmission, the voltage v_tx in L_tx is plotted in Figure 10a with an amplitude of 30.8 V_pp. The voltage v_rx in L_rx is plotted in Figure 10b for a gap of 15 mm and in Figure 10c for 50 mm, with an amplitude of 24.8 V_pp and 19.2 V_pp, respectively. It can be denoted that the fundamental frequency is 100 kHz according to the switching frequency of V_G1 and V_G3. The rectified voltage in the output resistive load v_o is plotted in Figure 10d, where the average value is 10.1 V with a ripple voltage of 400 mV_pp that corresponds to 3.96% of V_o (<10% of V_o).

To find the optimal gap between the couple inductors, an analysis of the voltage v_rx in the receptor inductor versus the gap between the inductors was performed. Figure 11 shows the voltage in the receptor circuit according to a variation of D in the interleaved buck operation with different gap conditions. It was found that a maximum energy transfer takes place in the 12 mm to 20 mm gap range. With the results of Figure 11, the coupling factor between the inductors has been calculated, and the result is shown in Figure 12. It can be denoted for the optimal gap that the coupling factor is between 0.65 and 0.53.

To verify the high quality of voltage waveforms, the harmonic components in v_tx and v_rx were calculated as shown in Figure 13a,b, respectively. It can be denoted that there are no significant components in high frequencies. The measured THD was 3.5% for v_tx and 1.97% for v_rx, being the power rated at 15 W.

The efficiency of the converter is η = 85.1%, with an input power of 15 W and a total power loss of 2.23 W distributed in the components according to Figure 14. As can be seen, the principal losses occur in the diodes and the capacitors.

Typically, diode switching loss and power loss in the inductor core can be ignored, and only the copper loss in the inductor winding should be considered.

The main component losses are related by the following expressions:

Mosfet conduction losses:

$$P_{conduction}=\frac{V_o\cdot r_{DS}}{R_{L\min }}\cdot P_{o\max }$$

(7)

Mosfet switching losses:

$$P_{switching}=\frac{f_S\cdot C_{oMosfet}\cdot R_{L\min }\cdot V_{in\max }^2\cdot P_{o\max }}{V_o^2}$$

(8)

Diode conduction losses:

$$P_{conduction}=\left(1-\frac{V_o}{V_{in\max }}\right)\left(\frac{V_F}{V_o}+\frac{r_{diode}}{R_{L\min }}\right)\cdot P_{o\max },P_{rL}=\frac{r_L\cdot V_{in\max }^2}{R_{L\min }}\cdot P_{o\max }$$

(9)

Power losses in the filter capacitor:

$$P_{rC}=\frac{r_C\cdot R_L\cdot {\left(1-\frac{V_o}{V_{in\max }}\right)}^2}{12\cdot f_S^2\cdot L^2}\cdot P_{o\max }$$

(10)

The total power losses are given by

$$P_{total}=P_{conduction}+P_{switching}+P_{rL}+P_{rC}.$$

(11)

The parasitic parameters of each component, Mosfet (C_oMosfet), Diode (V_F, r_diode), Inductors (r_L), and Capacitors (r_C), impact on the total power losses.

Figure 15a shows the prototype in operation with a current demand of 450 mA. A thermal capture of the interleaved buck converter during operation is presented in Figure 15b, showing that main thermal losses take place in inductors L_B1 and L_B2 and MOSFET’s with temperatures of 41.5 °C and 44.5 °C.

5. Comparison of the Proposed Converter with Other DC–DC Topologies

Table 4. Comparison with other topologies.

	Topology	Proposed DC–DC Converter	Cascaded Buck-Boost Converter [9]	Contactless Electrical Energy Transmission System [15]	Bidirectional WPT EV Charger Using Self-Resonant PWM [16]	Capacitively Coupled Contactless Power Transfer System [17]	Capacitive Power Transfer [18]
Factor
Semiconductor devices transmitter-receptor		4	4(only in receptor)	2	4	2–4	2–4
Energy storage components		3	2	3	3	8	6
Switching frequency		500 kHz	20 kHz	67–140 kHz	20.3 kHz	840 kHz	1 MHz
Efficiency η		85.1%	74%	60–70%	88%	41%	80%
Output Power		15 W	40 W	4.5 W	6.6 kW	7.6 W	25 W
Advantages		The proposed topology and control method are simple and achieve high efficiency	This topology provides an optimal impedance for minimal power reflection	This topology allows bidirectional power flow through the inductances	The high power makes it suitable for electric vehicle applications	Zero Voltage Switching (ZVS) is used to reduce losses	The design algorithm ensures reduction of the system size
Major Drawbacks		Work in progress to achieve higher output power	Electromagnetic components could be reduced by increasing the switching frequency	The distortion in voltage waveforms avoids a higher efficiency in the system	Electromagnetic components could be reduced by increasing the switching frequency	The power efficiency is too low under heavy load conditions	Some losses may be compensated by using a ZVS

presents a comparison of the proposed topology with five different DC–DC converters [13,14,15,16]. The comparison includes the number of semiconductor devices, energy storage components (inductors and capacitors), the efficiency, and the output power. It can be denoted that the proposed DC–DC converter allows a reduction in the number of energy storage components, allowing a high-efficiency system and a control method that is simple and easy to be implemented. The proposed converter is possible to scale in power maintaining the same topology.

6. Conclusions

The principle of operation of a DC–AC converter for IWPT was presented. The proposed topology includes two buck converters that operate together with a half inverter bridge and a resonant circuit. A sinusoidal waveform with a low THD was obtained being suitable for wireless inductive power transfer. The proposed control strategy uses two PWM burst signals and two PWM complementary signals to synchronize the two buck converters operation, being a simple and effective control method to obtain the defined ideal waveforms. The proposed converter was validated with experimental results in a 15.0 W prototype using two coupled inductors with a gap of 15 mm to 50 mm, being suitable for portable devices battery recharge applications.