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Open AccessArticle

Implementation of Unbalanced Ternary Logic Gates with the Combination of Spintronic Memristor and CMOS

1
College of electronic information, Hangzhou Dianzi University, Hangzhou 310018, Zhejiang, China
2
School of Artificial Intelligence, Southwest University, Chongqing 400715, China
3
College of Electrical Engineering, Zhejiang University, Hangzhou 310027, Zhejiang, China
*
Authors to whom correspondence should be addressed.
Electronics 2020, 9(4), 542; https://doi.org/10.3390/electronics9040542
Received: 3 March 2020 / Revised: 22 March 2020 / Accepted: 23 March 2020 / Published: 25 March 2020
(This article belongs to the Section Circuit and Signal Processing)
A memristor is a nanoscale electronic element that displays a threshold property, non-volatility, and variable conductivity. Its composite circuits are promising for the implementation of intelligence computation, especially for logic operations. In this paper, a flexible logic circuit composed of a spintronic memristor and complementary metal-oxide-semiconductor (CMOS) switches is proposed for the implementation of the basic unbalanced ternary logic gates, including the NAND, NOR, AND, and OR gates. Meanwhile, due to the participation of the memristor and CMOS, the proposed circuit has advantages in terms of non-volatility and load capacity. Furthermore, the input and output of the proposed logic are both constant voltages without signal degradation. All these three merits make the proposed circuit capable of realizing the cascaded logic functions. In order to demonstrate the validity and effectiveness of the entire work, series circuit simulations were carried out. The experimental results indicated that the proposed logic circuit has the potential to realize almost all basic ternary logic gates, and even some more complicated cascaded logic functions with a compact circuit construction, high efficiency, and good robustness. View Full-Text
Keywords: spintronic memristor; unbalanced ternary logic; cascaded logic; circuit simulations spintronic memristor; unbalanced ternary logic; cascaded logic; circuit simulations
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MDPI and ACS Style

Zhang, H.; Zhang, Z.; Gao, M.; Luo, L.; Duan, S.; Dong, Z.; Lin, H. Implementation of Unbalanced Ternary Logic Gates with the Combination of Spintronic Memristor and CMOS. Electronics 2020, 9, 542.

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