BPR-TCAM—Block and Partial Reconfiguration based TCAM on Xilinx FPGAs
Abstract
:1. Introduction
2. Related Work
3. Emulating TCAMs with Memories on FPGAs
4. Block and Partial Reconfiguration TCAM (BPR-TCAM)
5. Evaluation
6. Conclusions and Future Work
Author Contributions
Funding
Conflicts of Interest
References
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KEY | PARAMETER | RULES | |||
---|---|---|---|---|---|
32 | 64 | 512 | 1024 | ||
40 | LUTS | 160 | 320 | 2560 | 5120 |
FFs | 145 | 209 | 1105 | 2129 | |
SLICES | 48 | 96 | 768 | 1536 | |
DELAY-V7 | 2.52 | 2.61 | 2.78 | 3.21 | |
DELAY-A7 | 4.70 | 5.25 | 5.38 | 6.00 | |
80 | LUTS | 320 | 640 | 5120 | 10,240 |
FFs | 225 | 289 | 1185 | 2209 | |
SLICES | 80 | 160 | 1280 | 2560 | |
DELAY-V7 | 4.24 | 4.79 | 5.32 | 5.82 | |
DELAY-A7 | 8.10 | 8.67 | 10.16 | 10.36 | |
120 | LUTS | 480 | 960 | 7680 | 15,360 |
FFs | 305 | 369 | 1265 | 2289 | |
SLICES | 128 | 256 | 2048 | 4096 | |
DELAY-V7 | 5.76 | 6.16 | 6.82 | 7.66 | |
DELAY-A7 | 11.40 | 12.18 | 13.53 | 14.98 |
Architecture | Device | Size | LUTRAMs | LUTs | FFs | BRAMs | Slices | Speed |
---|---|---|---|---|---|---|---|---|
HP-TCAM [21] | XC6VLX760 | 512 × 36 | 0 | 6546 | 2670 | 56 | 1637 | 118 |
Z-TCAM [22] | XC6VLX760 | 512 × 36 | 0 | 4462 | 2178 | 40 | 1116 | 159 |
UE-TCAM [24] | XC6VLX760 | 512 × 36 | 0 | 3652 | 1758 | 32 | 913 | 202 |
Syed [27] | XC6VLX760 | 512 × 36 | 0 | 3013 | 552 | 32 | 754 | 101 |
DURE-I [9] | XC6VLX760 | 512 × 36 | 4096 | 1605 | 1174 | 0 | 1668 | 335 |
PR-TCAM [8] | XC7A100T | 512 × 40 | 0 | 3574 | 0 | 0 | 1085 | 82 |
BPR-TCAM I | XC6VLX760 | 512 × 40 | 0 | 2560 | 793 | 0 | 768 | 219.2 |
Xilinx [33] | XC7V2000T | 512 × 128 | 8875 | 27,559 | 35,068 | 3 | 12,011 | 171 |
DURE-II [9] | XC6VLX760 | 1024 × 144 | 32,768 | 3039 | 2700 | 0 | 9654 | 175 |
BPR-TCAM II | XC6VLX760 | 1024 × 144 | 0 | 18,432 | 3029 | 0 | 4608 | 111.49 |
Jiang [30] | XC7V2000T | 1024 × 150 | 20,480 | 61,624 | 37,556 | 0 | 20,526 | 199 |
Architecture | Device | Size | N.Slices | N. Speed | Throughput | PA |
---|---|---|---|---|---|---|
HP-TCAM [21] | XC6VLX760 | 512 × 36 | 2981 | 118 | 4.25 | 0.73 |
Z-TCAM [22] | XC6VLX760 | 512 × 36 | 2076 | 159 | 5.72 | 1.41 |
UE-TCAM [24] | XC6VLX760 | 512 × 36 | 1681 | 202 | 7.26 | 2.21 |
Syed [27] | XC6VLX760 | 512 × 36 | 1522 | 101 | 3.64 | 1.22 |
DURE-I [9] | XC6VLX760 | 512 × 36 | 1668 | 335 | 12.06 | 3.7 |
PR-TCAM [8] | XC7A100T | 512 × 40 | 1085 | 57.4 | 2.3 | 1.08 |
BPR-TCAM I | XC6VLX760 | 512 × 40 | 768 | 219.2 | 8.77 | 5.85 |
Xilinx [33] | XC7V2000T | 512 × 128 | 12,083 | 120 | 15.36 | 0.65 |
DURE-II [9] | XC6VLX760 | 1024 × 144 | 9654 | 175 | 25.2 | 2.67 |
BPR-TCAM II | XC6VLX760 | 1024 × 144 | 4608 | 111.49 | 16.05 | 3.57 |
Jiang [30] | XC7V2000T | 1024 × 150 | 20,526 | 139 | 20.9 | 1.04 |
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Ullah, A.; Zahir, A.; Khan, N.A.; Ahmad, W.; Ramos, A.; Reviriego, P. BPR-TCAM—Block and Partial Reconfiguration based TCAM on Xilinx FPGAs. Electronics 2020, 9, 353. https://doi.org/10.3390/electronics9020353
Ullah A, Zahir A, Khan NA, Ahmad W, Ramos A, Reviriego P. BPR-TCAM—Block and Partial Reconfiguration based TCAM on Xilinx FPGAs. Electronics. 2020; 9(2):353. https://doi.org/10.3390/electronics9020353
Chicago/Turabian StyleUllah, Anees, Ali Zahir, Noaman A. Khan, Waleed Ahmad, Alexis Ramos, and Pedro Reviriego. 2020. "BPR-TCAM—Block and Partial Reconfiguration based TCAM on Xilinx FPGAs" Electronics 9, no. 2: 353. https://doi.org/10.3390/electronics9020353
APA StyleUllah, A., Zahir, A., Khan, N. A., Ahmad, W., Ramos, A., & Reviriego, P. (2020). BPR-TCAM—Block and Partial Reconfiguration based TCAM on Xilinx FPGAs. Electronics, 9(2), 353. https://doi.org/10.3390/electronics9020353