Article Versions Notes

Li J, Guo X, Luan J, Wu D, Zhou L, Huang Y, Wu N, Jia H, Zheng X, Wu J, et al. A 3GSps 12-bit Four-Channel Time-Interleaved Pipelined ADC in 40 nm CMOS Process. Electronics. 2019; 8(12):1551. https://doi.org/10.3390/electronics8121551

Li, Jianwen, Xuan Guo, Jian Luan, Danyu Wu, Lei Zhou, Yinkun Huang, Nanxun Wu, Hanbo Jia, Xuqiang Zheng, Jin Wu, and et al. 2019. "A 3GSps 12-bit Four-Channel Time-Interleaved Pipelined ADC in 40 nm CMOS Process" Electronics 8, no. 12: 1551. https://doi.org/10.3390/electronics8121551

Li, J., Guo, X., Luan, J., Wu, D., Zhou, L., Huang, Y., Wu, N., Jia, H., Zheng, X., Wu, J., & Liu, X. (2019). A 3GSps 12-bit Four-Channel Time-Interleaved Pipelined ADC in 40 nm CMOS Process. Electronics, 8(12), 1551. https://doi.org/10.3390/electronics8121551