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Electronics 2018, 7(9), 186;

EE-TCAM: An Energy-Efficient SRAM-Based TCAM on FPGA

Department of Computer Engineering, Chosun University, 309 Pilmun-daero, Gwangju 61452, Korea
Department of Electrical Engineering, CECOS University of IT & Emerging Sciences, Peshawar 25000, Pakistan
Author to whom correspondence should be addressed.
Received: 30 June 2018 / Revised: 18 August 2018 / Accepted: 7 September 2018 / Published: 10 September 2018
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Ternary content-addressable memories (TCAMs) are used to design high-speed search engines. TCAM is implemented on application-specific integrated circuit (native TCAMs) and field-programmable gate array (FPGA) (static random-access memory (SRAM)-based TCAMs) platforms but both have the drawback of high power consumption. This paper presents a pre-classifier-based architecture for an energy-efficient SRAM-based TCAM. The first classification stage divides the TCAM table into several sub-tables of balanced size. The second SRAM-based implementation stage maps each of the resultant TCAM sub-tables to a separate row of configured SRAM blocks in the architecture. The proposed architecture selectively activates at most one row of SRAM blocks for each incoming TCAM word. Compared with the existing SRAM-based TCAM designs on FPGAs, the proposed design consumes significantly reduced energy as it activates a part of SRAM memory used for lookup rather than the entire SRAM memory as in the previous schemes. We implemented the proposed approach sample designs of size 512 × 36 on Xilinx Virtex-6 FPGA. The experimental results showed that the proposed design achieved at least three times lower power consumption per performance than other SRAM-based TCAM architectures. View Full-Text
Keywords: SRAM-based TCAM; field-programmable gate array (FPGA); memory architecture; power-efficient SRAM-based TCAM; field-programmable gate array (FPGA); memory architecture; power-efficient

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Ullah, I.; Ullah, Z.; Lee, J.-A. EE-TCAM: An Energy-Efficient SRAM-Based TCAM on FPGA. Electronics 2018, 7, 186.

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