Edge-of-Chaos Kernel and Dynamic Analysis of a Hopfield Neural Network with a Locally Active Memristor

Abstract

Locally active memristors with an Edge-of-Chaos kernel (EOCK) represent a significant advancement in the simulation of neuromorphic dynamics. However, current research on memristors with an EOCK remains at the circuit level, without further analysis of their feasibility. In this context, we designed a memristor and installed it in a third-order circuit, where it showed local activity and stability under defined voltage and inductance parameters. This behavior ensured that by varying the input voltage and inductance, the memristor could effectively simulate various neural activities, including inhibitory postsynaptic potential and chaotic waveforms. By subsequently integrating the memristor with an EOCK into a Hopfield neural network (HNN) framework and substituting the self-coupling weight, we observed a rich spectrum of dynamic behaviors, including the rare phenomenon of antimonotonicity bubble bifurcation. Finally, we used hardware circuits to realize these generated dynamic phenomena, confirming the feasibility of the memristor. By introducing the HNN and studying its dynamic behavior and hardware circuit implementation, this study provides theoretical insights into and an empirical basis for developing circuits and systems that replicate the complexity of human brain functions. This study provides a reference for the development and application of EOCK in the future.

1. Introduction

Chaos theory, which originated in the work of Edward Lorentz in the 1960s, has become a fundamental field of nonlinear dynamics characterized by sensitivity to the initial conditions, aperiodicity, and the coexistence of determinism and randomness. These properties have led to the development of various chaotic systems, such as Lorentz, Chen, and Lu systems, each with unique dynamic behavior. Chaos theory has a wide range of applications, including secure communication [1,2], chaotic circuits [3,4], and image encryption [5,6]. For example, Feng first constructed a new fractional-order 3D Lorenz chaotic system and a 2D sinusoidally constrained polynomial hyperchaotic map (2D-SCPM) and then elaborately developed a multi-image encryption algorithm based on the new fractional-order 3D Lorenz chaotic system and 2D-SCPM (MIEA-FCSM). This algorithm generates the final ciphertext image through two rounds of scrambling and diffusion [7]. Abdullah et al. designed a fractional-order Arneodo chaotic excitation system with cubic nonlinearity and then used a singlet fractional-order sliding mode controller (FOSMC) to synchronize two fractional-order Arneodo chaotic systems with different initial conditions. A new secure communication system based on a single-chip microcomputer was designed and implemented using chaotic masking [8].

Since the concept of a memristor was first proposed by Professor Chua in 1971 [9], it has become a key element in the construction of artificial neural networks. Compared with resistors, capacitors, and inductors, memristors have catalyzed extensive exploration in countless fields due to their unique memory storage function, leading to research on applications such as neural networks [10,11,12] and chaotic circuits [13,14,15]. In terms of theory, memristors have enriched the study of complex dynamics in various systems [16,17]. Generally, memristors are divided into voltage-controlled memristors and current-controlled memristors; voltage-controlled memristors are widely used because of their significant advantages of low power consumption, high energy efficiency, and rich dynamic behavior. Zhang et al. designed a chaotic circuit for a convolutional neural network (CNN) system based on a voltage-controlled memristor [18]. Shi et al. proposed a voltage-controlled memristor with floating input for D-latch validation [19].

In recent years, the dynamic properties of memristors have attracted much attention, especially due to their interesting performance at the edge-of-chaos (EOC). The EOC is a special part of the locally active domain (LAD) [20]. A memristor located at the EOC is in a stable but unstable state, in which rich dynamic behavior is generated [21,22]. Chua solved the Turing instability and Smale phenomenon using memristors with EOC [23]. The Edge-of-Chaos kernel (EOCK) is a special part of EOC. It is a new physical concept proposed by Chua in 2022 [24], aimed at exploring the complex dynamics of circuit systems located at the threshold between order and disorder. The EOCK is a simple one-port circuit formed by connecting a negative resistance and a negative inductance. The existence of an EOCK not only solves some mathematical problems [25] but also can be used to induce periodic oscillations in oscillators [26]. The memristors with an EOCK reported in these articles can simulate rich neuromorphic behavior, so the EOCK is highly important in unlocking the mysteries of neuromorphic memristors.

Neural networks represent one of the most important fields in the application of memristors. Compared with traditional artificial neural networks, memristor-coupled neural networks provide a new direction for the study of the complex behavior of human brains because of their complex neuromorphic behavior [27,28,29]. To simulate the dynamic behavior of neurons, various neural networks and neuron models have been developed [30,31,32,33]. Hopfield neural networks (HNNs) are widely used because of their simple structure, high stability, and complexity. HNNs are often used in chaotic systems and for other complex behavior [34,35,36]. Memristor-coupled neural network chaotic systems integrate the advantages of memristors, neural networks, and chaotic systems, making them widely used in many fields, such as compression processing and data storage [37,38,39,40,41]. Yu applied an HNN with extreme multistability for video encryption [42], Kong applied an HNN with hyperchaos and multiscrolling for image encryption [43], and Ding et al. applied an HNN with multiple coexistences for medical image encryption and implemented it in hardware [44]. A memristor with an EOCK-coupled HNN will perform better in these fields because of its higher complexity.

At present, memristors without an EOCK are relatively mature at the circuit-simulation level [45]. However, research into memristors with an EOCK has just entered the circuit simulation stage, and feasibility analyses are insufficient. Therefore, this paper proposes a type of voltage-controlled memristor with an EOCK. First, the device was placed into a third-order circuit to observe the neural mentality behavior and then coupled with a neural network to study its dynamic characteristics and implement the hardware circuit. The work presented in this paper includes the following innovations and contributions:

(1)

A third-order circuit of a voltage-controlled memristor with an EOCK is proposed, which can produce a variety of different dynamic phenomena.

(2)

The memristor is coupled with an HNN to study the bifurcation behavior at different coupling intensities, and a rare antimonotonicity phenomenon is observed. When one variable in the coupling intensity is changed, bubble bifurcation can be observed. The feasibility is verified with an STM32 hardware board.

The rest of this article is arranged as follows: In Section 2, we design a memristor with an EOCK, analyze its tight hysteresis properties, locally active properties, and asymptotic stability, and then design a third-order memristor circuit. In Section 3, the kinetic phenomena of the memristor circuit, such as the period, chaos, damping spiking, and single-spike bursting, are analyzed. In Section 4, the memristor-coupled HNN model is proposed. The antimonotonicity and bubble bifurcation of the system are discussed by means of the Lyapunov exponent spectrum and bifurcation diagram. Then, the hardware implementation based on STM32 is described. The last part summarizes the article.

2. A Memristor Model and Memristive Circuit

Memristors are divided into voltage-controlled and current-controlled memristors. In general, a voltage-controlled memristor is defined as:

$$\left\{\begin{array}{c}{\displaystyle \frac{\mathrm{d}\mathrm{x}}{\mathrm{d}\mathrm{t}}}=\mathrm{g}(\mathrm{x},{\mathrm{v}}_{\mathrm{M}}),\\ {\mathrm{i}}_{\mathrm{M}}=\mathrm{G}(\mathrm{x}){\mathrm{v}}_{\mathrm{M}},\end{array}\right.$$

(1)

where x, i_M and v_M are the state variables, i.e., the current and input voltage of the memristor; $\mathrm{G}(\mathrm{x})$ is the memductance function, and the function g defines the equation of the memristor. Based on Chua’s expansion theorem, a general type of a locally active memristor with an EOCK is designed, and a general type of a locally active memristor is proposed:

$$\left\{\begin{array}{c}{\mathrm{i}}_{\mathrm{M}}=\mathrm{G}(\mathrm{x}){\mathrm{v}}_{\mathrm{M}}=0.01{\mathrm{x}}^2{\mathrm{v}}_{\mathrm{M}},\\ {\displaystyle \frac{\mathrm{d}\mathrm{y}}{\mathrm{d}\mathrm{x}}}=\mathrm{g}(\mathrm{x},{\mathrm{v}}_{\mathrm{M}})=10({\mathrm{x}}^4-25{\mathrm{x}}^2-10\mathrm{x}{\mathrm{v}}_{\mathrm{M}}-10{\mathrm{v}}_{\mathrm{M}}+15),\end{array}\right.$$

(2)

where x, i_M and v_M are the state variable, current and input voltage of the first-order memristor. current and input voltage of the first-order memristor, respectively. This type of memristor is chosen in this study because it has rich dynamic characteristics that can be obtained, and the equations are easy to obtain.

2.1. Hysteresis Loops

A sinusoidal voltage excitation of unit amplitude is applied to both ends of the voltage-controlled memristor used in this paper. The terminal voltage of the memristor is v_M, and the current flow is i; thus, the sinusoidal voltage equation applied is

$$\left\{\begin{array}{c}{\mathrm{v}}_{\mathrm{M}}=\mathrm{A}\sin (\mathrm{w}\mathrm{t}),\\ \mathrm{i}=\mathrm{G}(\mathrm{x})\mathrm{v}=0.01{\mathrm{x}}^2{\mathrm{v}}_{\mathrm{M}}.\end{array}\right.$$

(3)

When we let A = 7 and w = 800, 1000, 1200, 1500, the ODE45 algorithm can be employed to derive the planar voltammetry characteristic curves of the voltage-controlled memristor, as illustrated in Figure 1. The voltage-current characteristics of the memristor exhibit an inclined pinched hysteresis loop shape, as depicted in Figure 1. The area enclosed by the voltage-current characteristic curve clearly progressively diminishes with increasing w, which aligns with the fundamental behavior observed in locally active memristors.

2.2. Locally Active

To more clearly and conveniently observe the region where the first-order memristor appears locally active and asymptotically stable, we draw the DC V-I curve within a voltage range of −80 V < V < 80 V as shown in Figure 2. According to Figure 2, the DC V-I curve contains two stable negative slope domains, namely, the voltage ranges of 5.0206 V < V < 8.7815 V and 0.5266 V < V < 1.5 V, which are represented by the red curve. These two parts constitute the locally active domain (LAD).

2.3. Asymptotic Stability

According to Jin’s paper [46], whether the memristor is asymptotically stable can be determined. Equation (4) is Jacobi’s equation:

$$\mathrm{J}(\mathrm{Q})={\left[\begin{array}{cc}{\mathrm{J}}_{11}& {\mathrm{J}}_{12}\\ {\mathrm{J}}_{21}& {\mathrm{J}}_{22}\end{array}\right]}_{\mathrm{Q}},$$

(4)

where J₁₁, J₁₂, J₂₁, J₂₂ satisfy Equation (5), and their values are the same as the first-order Taylor series expansion coefficients of the voltage-controlled memristor. A general voltage-controlled memristor with an EOCK is considered asymptotically stable when J₂₁ < 0.

$$\left\{\begin{array}{c}{\mathrm{J}}_{11}={\mathrm{V}}_{\mathrm{M}}{\left.{\displaystyle \frac{\partial \mathrm{G}(\mathrm{x})}{\partial \mathrm{x}}}\right|}_{\mathrm{Q}}=\mathrm{V}{\left.{\displaystyle \frac{\partial \mathrm{G}(\mathrm{x})}{\partial \mathrm{x}}}\right|}_{\mathrm{Q}},\\ {\mathrm{J}}_{12}=\mathrm{G}(\mathrm{x}){\left.{\displaystyle \frac{\partial {\mathrm{v}}_{\mathrm{M}}}{\partial {\mathrm{v}}_{\mathrm{M}}}}\right|}_{\mathrm{Q}}=\mathrm{G}(\mathrm{x}),\\ {\mathrm{J}}_{21}={\left.{\displaystyle \frac{\partial \mathrm{g}(\mathrm{x},{\mathrm{v}}_{\mathrm{M}})}{\partial {\mathrm{v}}_{\mathrm{M}}}}\right|}_{\mathrm{Q}},\\ {\mathrm{J}}_{22}={\left.{\displaystyle \frac{\partial \mathrm{g}(\mathrm{x},{\mathrm{v}}_{\mathrm{M}})}{\partial {\mathrm{v}}_{\mathrm{M}}}}\right|}_{\mathrm{Q}}.\end{array}\right.$$

(5)

The red area in Figure 2 was analyzed for stability. Figure 3a shows that the memristor is asymptotically unstable in the range of 5.0206 V < V < 8.7815 V. As shown in Figure 3b, it is also asymptotically unstable in the range of 0.5266 V < V < 1.5 V.

2.4. Edge-of-Chaos Kernel

The EOCK is a novel physical concept introduced by Chua in 2022. It comprises a one-port circuit that integrates a negative inductor and a negative resistor connected in series. Since the negative resistance has feedback enhancement characteristics and nonlinear behavior and the negative inductance can change the stability of the circuit, even if the structure is simple, the combination of the two facilitates the production of an EOCK by the circuit, which thus exhibits complex dynamic behavior and further provides a theoretical basis for simulating complex neural network behavior. Figure 4 shows the circuit characteristics of the EOCK, defined by Chua in [24]. To test whether our defined memristor has an EOCK, only two conditions need to be satisfied:

$$\left\{\begin{array}{c}{\mathrm{J}}_{21}<0,\\ {\mathrm{J}}_{22}{\mathrm{J}}_{11}<0\end{array}\right.$$

(6)

.

2.5. A Memristive Circuit with an EOCK

Owing to the interaction between the memristor, capacitor, and inductor, the nonlinear characteristics of the whole circuit are enhanced, the dynamic behavior of the circuit is more complicated, and the memristor circuit exhibits rich multistable phenomena and chaotic behavior. Therefore, the use of a memristor with an EOCK significantly enhances the neurodynamics in the memristor circuit. Therefore, we use a combination of memristors, capacitors, and inductors to build a third-order circuit, as shown in Figure 5. The equation of state of the third-order memristor circuit in Figure 5 is

$$\left\{\begin{array}{c}{\displaystyle \frac{\mathrm{d}\mathrm{x}}{\mathrm{d}\mathrm{t}}}=10({\mathrm{x}}^4-25{\mathrm{x}}^2-10{\mathrm{v}}_{\mathrm{C}}-10\mathrm{x}{\mathrm{v}}_{\mathrm{C}}+15),\\ {\displaystyle \frac{\mathrm{d}{\mathrm{v}}_{\mathrm{C}}}{\mathrm{d}\mathrm{t}}}={\displaystyle \frac{({\mathrm{i}}_{\mathrm{L}}-0.01{\mathrm{x}}^2{\mathrm{v}}_{\mathrm{C}})}{\mathrm{C}}},\\ {\displaystyle \frac{\mathrm{d}{\mathrm{i}}_{\mathrm{L}}}{\mathrm{d}\mathrm{t}}}={\displaystyle \frac{{\mathrm{v}}_{\mathrm{i}\mathrm{n}}-{\mathrm{v}}_{\mathrm{c}}}{\mathrm{L}}},\end{array}\right.$$

(7)

where x, v_c, i_L and v_in denote the state variable of the first-order memristor, defined in (2), the voltage across capacitor C, the current through inductor L and the input voltage of the memristive circuit, respectively, x and v_C are the state variables of the memristive circuit; and v_out = v_c denotes the output voltage of the circuit.

We calculate the $\mathrm{V}-\mathrm{L}$ domain of the third-order 1-port circuit, as mapped in Figure 6. The diagram maps the different parameters of the third-order memristor circuit to the $\mathrm{V}-\mathrm{L}$ diagram to observe the changes in the stability of the memristor in this environment. In Figure 6, the blue color represents the open right half plane (RHP), the orange color represents the edge-of-chaos (EOC) domain, and the dark green color represents the locally passive domain. The RHP and EOC domains are collectively called the LAD. Figure 6 shows where the locally active, locally passive, EOC and RHP pole domains of the memristor circuit are located at different input voltages V and inductances $\mathrm{L}$.

In Figure 6a, the union of the orange domain and the blue domain is the locally active parameter set of the circuit over the voltage range of 5.0206 V < V < 8.7815 V, where the memristor is stable because its pole $\mathrm{p}=-{\mathrm{R}}_X/{\mathrm{L}}_{\mathrm{x}}<0$ on the open left half plane (LHP) [47]. Figure 6a shows that variations in the inductance L and voltage V change the position of the pole and the stability of the memristor circuit, thus destroying the stability of the memristor and leading to the appearance of the RHP pole domain. As a result, some of the equilibrium points of the circuit move from the EOC domain to the RHP pole domain and are no longer asymptotically stable. Notably, inductance L in the blue domain will make the memristor unstable, causing the memory circuit to oscillate. Similarly, in Figure 6b, in the union of the orange and blue domains, the memristor is locally active and stable. Figure 6b shows that inductance L in the blue domain changes the position of the pole and the stability of the memory circuit, thus destroying the stability of the memristor and causing the circuit to oscillate.

In this section, we first design a voltage-controlled memristor model and then study its tight hysteresis characteristics and local active and asymptotic stability characteristics. We analyze the mechanism of EOCK formation. Then a memristor circuit with EOCK is constructed, and L and V planes are plotted, including local active domain, RHP domain and EOC domain. Because the $\mathrm{V}-\mathrm{L}$ plane contains such a rich domain, it is easy to know that EOCK’s memristor oscillates due to changes in inductance and capacitance of the external environment.

3. EOCK and Neuromorphic Behaviors

In this section, we explore the neuromorphic behavior of locally active memristors with an EOCK. We observe different neuromorphic behaviors by varying the values of the input voltage v_in and the series inductance L in Figure 5. When we feed the memristor an adjustable DC input voltage, we observe some neuromorphic behavior, as shown in Figure 7, Figure 8, Figure 9 and Figure 10. For each diagram mentioned, each panel (a) in the diagram shows a time-domain waveform diagram and the neuromorphic behavior generated by the memristive circuit, and each panel (b) shows a phase orbit diagram, i.e., a two-dimensional projection of an attractor in three-dimensional space. v_out = v_c in Figure 7, Figure 8, Figure 9 and Figure 10.

When we adjust the value of the DC voltage v_in added to the memristor circuit to 0.807V, we observe the neuromorphic behavior of phasic spiking in Figure 7a, with a pulse amplitude of −4.468 V. Figure 7b depicts a two-dimensional projection of the attractor onto v_out and i_L. It shows a light blue trajectory from the initial state $(\mathrm{x}(0),{\mathrm{v}}_{\mathrm{c}}(0),{\mathrm{i}}_{\mathrm{L}}(0))=(0,0.2,0.35)$ to an asymptotically stable equilibrium point $\mathrm{Q}(\mathrm{x},{\mathrm{v}}_{\mathrm{o}\mathrm{u}\mathrm{t}},{\mathrm{i}}_{\mathrm{L}})=(-4.7976,0.8072,0.1857)$, with arrows indicating the direction of movement. When we further increase the DC input voltage from 0.807 V to 5.5 V, the memristor circuit generates a damping spike, as depicted in Figure 8a. Figure 8b shows a stable limit cycle, with a light green trajectory from the initial state $(\mathrm{x}(0),{\mathrm{v}}_{\mathrm{c}}(0),{\mathrm{i}}_{\mathrm{L}}(0))=(-3.56,0,0)$ to an asymptotically stable equilibrium point $\mathrm{Q}(\mathrm{x},{\mathrm{v}}_{\mathrm{o}\mathrm{u}\mathrm{t}},{\mathrm{i}}_{\mathrm{L}})=(-3.5673,5.5019,0.6999)$, and the arrows indicate the direction of movement. Finally, by increasing the voltage from 5.501 V to 8.72 V, a chaotic waveform can be observed, as shown in Figure 10b. The randomness of the chaotic waveform is very high. The figure shows a purple trajectory from the initial state $\left(\mathrm{x}\left(0\right),{\mathrm{v}}_{\mathrm{c}}(0),{\mathrm{i}}_{\mathrm{L}}(0)\right)=(-1.24457,8.7,0.135)$ to an asymptotically stable equilibrium point $\mathrm{Q}(\mathrm{x},{\mathrm{v}}_{\mathrm{o}\mathrm{u}\mathrm{t}},{\mathrm{i}}_{\mathrm{L}})=(-1.2447,8.732,0.1353)$, with arrows indicating the direction of movement.

According to the available data, we can easily calculate the Taylor series expansion coefficients in (5) as ${\mathrm{J}}_{11}=-0.0732$, ${\mathrm{J}}_{21}=-1930$, and ${\mathrm{J}}_{22}=379$. Because ${\mathrm{J}}_{21}<0$ and ${\mathrm{J}}_{11}{\mathrm{J}}_{22}=-29.3<0$ satisfy (6), the memristor can be judged as having an EOCK. Similarly, when ${\mathrm{J}}_{11}=-0.3924$, ${\mathrm{J}}_{21}=-432.1$, ${\mathrm{J}}_{22}=256.7$, and ${\mathrm{J}}_{11}{\mathrm{J}}_{22}=-100.7$, ${\mathrm{J}}_{21}<0$ and ${\mathrm{J}}_{11}{\mathrm{J}}_{22}<0$. When ${\mathrm{J}}_{11}=-0.3919$, ${\mathrm{J}}_{21}=-427.4$, ${\mathrm{J}}_{22}=256.2$, and ${\mathrm{J}}_{11}{\mathrm{J}}_{22}=-100.4$ (${\mathrm{J}}_{11}=-0.217$, ${\mathrm{J}}_{21}=-177$, ${\mathrm{J}}_{22}=24.4$, and ${\mathrm{J}}_{11}{\mathrm{J}}_{22}=-5.317$) at ${\mathrm{V}}_{\mathrm{i}\mathrm{n}}$ = 5.501 V (${\mathrm{V}}_{\mathrm{i}\mathrm{n}}$ = 8.72 V), ${\mathrm{J}}_{21}<0$ (${\mathrm{J}}_{21}<0$), and ${\mathrm{J}}_{11}{\mathrm{J}}_{22}<0$ (${\mathrm{J}}_{11}{\mathrm{J}}_{22}<0$). The above calculations show that the memristor circuit containing an EOCK can generate damping-spike, single-spike-burst, pulse-spike, and chaotic waveforms.

If a voltage pulse signal with pulse amplitude U_m = 5.521 V, period T = 1 s, and different pulse duty cycle factors are used as the input voltage v_in, we can observe periodic bursts, as shown in Figure 11. In Figure 11, the upper part shows the input voltage of the pulse signal with different pulse duty ratios; the lower part shows the neuromorphic behavior generated by the memristor circuit. When we apply the pulse signal with pulse duty cycle D = 0.14 as the input voltage v_in, memristor circuit single-spike bursting is generated. When D is increased to 0.31 and 0.49, two-spike bursting and three-spike bursting occur, respectively. Figure 11 shows that the peak number can be changed by adjusting the pulse duty cycle D of the pulse signal. Therefore, we can use the pulse duty factor of the input voltage to control the neuromorphic behavior of the memory circuit. In addition, the memristor can be easily calculated as having an EOCK when V_in = 5.521 V.

This section vividly demonstrates the rich neuromorphic behavior of a memristor with an EOCK by using intuitive images so that we can more easily and quickly gain insight into the close and inseparable connection between the EOCK and neuromorphic behavior. The results further confirm the great potential and feasibility of using memristors containing an EOCK in the field of simulating neuronal neuromorphic behavior.

4. Proposed HNN and Its Hardware Implementation

4.1. The Dynamical Behavior of the HNN Model

To verify that the memristor model with an EOCK presented in this paper is rich and can possibly be applied in practice in the future, we put it into a carefully selected HNN to observe its characteristics. This study leverages the HNN model presented in [48], which comprises three interconnected neurons. The connectivity pattern of this network is delineated in Figure 12. Within the context of HNN systems, the self-coupling mechanism of the second neuron is augmented by incorporating a memristor with an EOCK, as defined in the current study, thereby replacing the conventional connection weight. The circuit equation of the HNN we are referencing is:

$${\mathrm{C}}_{\mathrm{i}}{\displaystyle \frac{\mathrm{d}{\mathrm{x}}_{\mathrm{i}}}{\mathrm{d}\mathrm{t}}}=-{\displaystyle \frac{{\mathrm{x}}_{\mathrm{i}}}{{\mathrm{R}}_{\mathrm{i}}}}+{\displaystyle \sum _{\mathrm{j}=1}^{\mathrm{n}}{\mathrm{w}}_{\mathrm{i}\mathrm{j}}}\tanh ({\mathrm{x}}_{\mathrm{j}})+{\mathrm{I}}_{\mathrm{i}}.$$

(8)

In this work, we set C_i = 1, R_i = 1, I_i = 0, and n = 0. In the analog computer implementation of the HNN, the synaptic weight w_ij is a resistance. Starting from the general connection topology, the synaptic weight matrix expression is as follows:

$$\mathrm{W}=\left[\begin{array}{ccc}{\mathrm{w}}_{11}& {\mathrm{w}}_{12}& {\mathrm{w}}_{13}\\ {\mathrm{w}}_{21}& {\mathrm{w}}_{22}& {\mathrm{w}}_{23}\\ {\mathrm{w}}_{31}& {\mathrm{w}}_{32}& {\mathrm{w}}_{33}\end{array}\right]=\left[\begin{array}{ccc}2.3& -1.2& 0.5\\ 2& {\mathrm{w}}_2^{\prime }\mathrm{w}\left(\phi \right)& 1.15\\ -5& 0& -1\end{array}\right].$$

(9)

In summary, the smooth nonlinear fourth-order differential equation describing the proposed memory HNN can be expressed as:

$$\left\{\begin{array}{c}{\stackrel{.}{\mathrm{x}}}_1=-{\mathrm{x}}_1+2.3\tanh ({\mathrm{x}}_1)-1.2\tanh ({\mathrm{x}}_2)+0.5\tanh ({\mathrm{x}}_3),\\ {\stackrel{.}{\mathrm{x}}}_2=-{\mathrm{x}}_2+2\tanh ({\mathrm{x}}_1)+{\mathrm{w}}_2^{\prime }\mathrm{w}({\mathrm{x}}_4)\tanh ({\mathrm{x}}_2)+1.15\tanh ({\mathrm{x}}_3),\\ {\stackrel{.}{\mathrm{x}}}_3=-{\mathrm{x}}_3-5\tanh ({\mathrm{x}}_1)-\tanh ({\mathrm{x}}_3),\\ {\stackrel{.}{\mathrm{x}}}_4=10({\mathrm{x}}_4^4-25{\mathrm{x}}_4^2+15-10\tanh ({\mathrm{x}}_2)-10\tanh ({\mathrm{x}}_2){\mathrm{x}}_4.\end{array}\right.$$

(10)

In the connection topology shown in Figure 12, the HNN model includes three state variables. However, the state equation represented by (9) involves four variables, with the fourth variable being related to the memory self-synaptic connection of the second state variable, which reflects the memory of the synaptic weight of the second neuron. Additionally, ${\mathrm{w}}_2^{\prime }\mathrm{w}({\mathrm{x}}_4)={\mathrm{w}}_2^{\prime }(\mathrm{a}-\mathrm{b}\tanh ({\mathrm{x}}_4))$ represents the self-synaptic weight ${\mathrm{w}}_{22}$ of the second neuron, where ${\mathrm{w}}_2^{\prime }$, a, and b are positive parameters associated with the memory synaptic weight $\mathrm{w}\left(\phi \right)$.

4.2. Dynamical Behavior Analysis

Based on (7) and (8), the dynamics of the HNN function parameters and memristor coupling strength are studied in this section by using the MATLAB2023 ODE45 algorithm. With the step size fixed at t = 0.01, the single-parameter bifurcation diagram and the Lyapunov exponent spectrum are drawn. The Lyapunov exponent spectrum is calculated using Wolff’s method with a time length of 800. The bifurcation and the Lyapunov exponent spectrum with initial conditions $\left(0.1,1,1,-0.1\right)$ and $\left(-0.1,1,1,-0.1\right)$ are drawn.

According to the formula ${\mathrm{w}}_2^{\prime }\mathrm{w}({\mathrm{x}}_4)={\mathrm{w}}_2^{\prime }(a-b\tanh ({\mathrm{x}}_4))$, there are three variable parameters. To analyze the dynamic behavior of ${\mathrm{w}}_2^{\prime }$, a and b, we numerically calculate the single-parameter bifurcation plot and the Lyapunov exponent spectrum. When ${\mathrm{w}}_2^{\prime }$ is fixed at 1.5 and a is fixed at 1, the single-parameter bifurcation plot and Lyapunov exponent spectrum as a function of b are as shown in Figure 13. The initial conditions are $\left(-0.1,1,1,-0.1\right)$. When b begins to increase in the [0,0.5] region, the dynamic behavior starts from chaos with a periodic window in the middle, then enters a four-period state, then enters a two-period state, and finally reaches a single-period state.

When $\mathrm{a}$ increases from 1 to 1.45, rich bifurcation behavior can be observed. Figure 14 shows the single-parameter bifurcation diagram and the Lyapunov exponent spectrum. A bifurcated trajectory with an initial state of $(0,1,1,0)$ begins with a one-period limit cycle and enters a two-period limit cycle at x = 1.085, then a four-period limit cycle at x = 1.135, and then chaos. The trajectory enters a cycle at x = 1.202, followed by chaos. The Lyapunov exponent spectrum and bifurcation diagram shown in Figure 15b are in good agreement.

When ${\mathrm{w}}_2^{\prime }$ increases from 1.6 to 2.5, rich bifurcation behavior can be observed. Figure 15 shows the single-parameter bifurcation diagram and the Lyapunov exponent spectrum. The bifurcation trajectory with the initial state of $(0,1,1,0)$ successively goes through 1-, 2- and 4-period limit cycles. Then, it enters a chaotic state, followed by antimonotonicity, bubble bifurcation, and finally, a chaotic state with periodic windows. To more intuitively illustrate the antimonotonicity of the HNN, we adjust parameter a to prove it. When a = 0.98, the system starts from two branches and subsequently bifurcates into three bubbles at a = 1. When a = 1.007, the three bubbles expand, and another bubble appears on the branch of each bubble. When a = 1.009, 1.011, 1.013, a chaotic pattern appears in every bubble, and the system returns to the period-2 pattern through reverse period-doubling bifurcation, as shown in Figure 16d–f. The unusual bubble bifurcation reveals the rich dynamic properties of the constructed memristor with an EOCK-coupled HNN system. When the bifurcation is in the periodic range, the system can be applied to a periodic oscillator to achieve stable periodic signal output. When the bifurcation is in the chaotic range, the high degree of unpredictability and complexity make the system an ideal choice for image encryption, as it can effectively resist various internal and external statistical analysis attacks and has high security. All these characteristics indicate that memristors with an EOCK-coupled HNN have broad application prospects in many fields.

4.3. Validation by STM32 Hardware Board

Tangible realization of hardware systems is instrumental in advancing the practical deployment of HNNs. In this study, we harness the capabilities of an STM32 microcontroller hardware platform to digitally implement the proposed HNN model. By leveraging this hardware setup, we successfully generate phase track diagrams that can be experimentally visualized and captured using an oscilloscope.

The STM32 hardware board central to our experimental framework encompasses a high-performance 32-bit STM32H750 microcontroller unit (MCU). In addition, it also has an 8563 digital-to-analog converter (DAC8563) and a pair of interface level switching circuits, which are integral parts of the system operation. Employing a mathematical model with a step size of 0.01, as dictated by the fourth-order Runge–Kutta algorithm, the DAC8563 is utilized to convert digital signals into an analog voltage sequence.

This sequence is then displayed and analyzed by an oscilloscope to visualize the experimental outcomes. A photographic representation of the STM32 hardware board is depicted in Figure 17. The continuous-time model of the HNN is developed in the C programming language and downloaded to the STM32 hardware board. Prior to this, the model parameters and initial conditions are meticulously set to match the numerical calculation results, ensuring seamless alignment between the theoretical predictions and experimental observations. Upon initiating the power supply and executing the program, the synchronized output of the two-channel analog voltage sequence is directed to the oscilloscope. This synchronization is essential for capturing and analyzing the dynamic behavior of the neural network with precision.

Parts of the bifurcation diagrams shown in Figure 13, Figure 14, Figure 15 and Figure 16 are selected to generate the phase track diagram; the pseudocode used is shown in Figure 18. Figure 19a–c show the phase track diagrams generated by the simulation software MATLAB2023, and Figure 19d–f show the phase track diagrams generated by the hardware circuit. These diagrams show strong consistency and verify the feasibility of the system.

The alignment between the simulation and hardware results provides a compelling affirmation of the numerical simulation results, underscoring the precision and operational viability of the STM32 hardware board. The demonstration not only validates the simulation model but also proves the ability of the STM32 board to effectively simulate the dynamics of complex neural networks, thus determining its practical applicability in neural computing.

5. Conclusions

To enrich the dynamic characteristics and increase the complexity, a memristor model is designed in this study. The characteristics of hysteresis, locally active asymptotic stability, and the EOCK are studied. Using the theoretical memristor model, we construct a third-order memristor circuit and analyze its neuromorphic behavior, such as phase-spike, damped-spike, single-spike-burst, and chaotic waveforms. To evaluate its potential for practical application, we introduce an HNN, create a memristor-coupled HNN model, and analyze the system through a bifurcation diagram, a Lyapunov index diagram, and a phase orbit diagram. The results show that the system has a rare antimonotonicity and bubble bifurcation phenomenon, indicating that the system has rich dynamic behavior. Finally, we use a single-chip microcomputer to implement the dynamic behavior of the system in hardware. This feasibility is unprecedented.

In short, our work is novel in two ways. First, we design a memristor with an EOCK. Furthermore, we design a memristor-coupled HNN and verify its feasibility. Our proposed memristor and neural network models have simple structures, which paves the way for subsequent simulation of complex brain-like nervous systems. In the future, we will strive to use memristors with an EOCK to build memristor-coupled neural networks with higher chaos performance to facilitate various engineering applications, including image encryption and image compression.