FPGA Accelerated Large-Scale State-Space Equations for Multi-Converter Systems

Liu, Jiyuan; Xu, Mingwang; Yang, Hangyu; Que, Zhiqiang; Gu, Wei; Tang, Yongming; Wang, Baoping; Li, He

doi:10.3390/electronics14193966

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Open AccessArticle

FPGA Accelerated Large-Scale State-Space Equations for Multi-Converter Systems

by

Jiyuan Liu

¹

,

Mingwang Xu

²,

Hangyu Yang

¹

,

Zhiqiang Que

³

,

Wei Gu

²

,

Yongming Tang

¹

,

Baoping Wang

¹ and

He Li

^1,4,*

¹

School of Electronic Science and Engineering, Southeast University, Nanjing 211189, China

²

School of Electrical Engineering, Southeast University, Nanjing 211189, China

³

Department of Computing, Imperial College London, London SW7 2AZ, UK

⁴

State Key Laboratory of Digital Sensing and Processing IC Technology, Nanjing 211189, China

^*

Author to whom correspondence should be addressed.

Electronics 2025, 14(19), 3966; https://doi.org/10.3390/electronics14193966

Submission received: 28 August 2025 / Revised: 27 September 2025 / Accepted: 29 September 2025 / Published: 9 October 2025

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Abstract

The increasing integration of high-frequency power electronic converters in renewable energy-grid systems has escalated reliability concerns, necessitating FPGA-accelerated large-scale real-time electromagnetic transient (EMT) computation to prevent failures. However, most existing studies prioritize computational performance and struggle to achieve large-scale EMT computation. To enhance the computational scale, we propose a scalable hardware architecture comprising domain-specific components and data-centric processing element (PE) arrays. This architecture is further enhanced by a graph-based matrix mapping methodology and matrix-aware fixed-point quantization for hardware-efficient computation. We demonstrate our principles with FPGA implementations of large-scale multi-converter systems. The experimental results show that we set a new record of supporting 1200 switches with a computation latency of 373 ns and an accuracy of 99.83% on FPGA implementations. Compared to the state-of-the-art large-scale EMT computation on FPGAs, our design on U55C FPGA achieves an up-to 200.00× increase in the switch scale, without I/O resource limitations, and demonstrates up-to 71.70% reduction in computation error and 51.43% reduction in DSP consumption, respectively.

Keywords: FPGA accelerator; hardware architecture; state-space equation

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MDPI and ACS Style

Liu, J.; Xu, M.; Yang, H.; Que, Z.; Gu, W.; Tang, Y.; Wang, B.; Li, H. FPGA Accelerated Large-Scale State-Space Equations for Multi-Converter Systems. Electronics 2025, 14, 3966. https://doi.org/10.3390/electronics14193966

AMA Style

Liu J, Xu M, Yang H, Que Z, Gu W, Tang Y, Wang B, Li H. FPGA Accelerated Large-Scale State-Space Equations for Multi-Converter Systems. Electronics. 2025; 14(19):3966. https://doi.org/10.3390/electronics14193966

Chicago/Turabian Style

Liu, Jiyuan, Mingwang Xu, Hangyu Yang, Zhiqiang Que, Wei Gu, Yongming Tang, Baoping Wang, and He Li. 2025. "FPGA Accelerated Large-Scale State-Space Equations for Multi-Converter Systems" Electronics 14, no. 19: 3966. https://doi.org/10.3390/electronics14193966

APA Style

Liu, J., Xu, M., Yang, H., Que, Z., Gu, W., Tang, Y., Wang, B., & Li, H. (2025). FPGA Accelerated Large-Scale State-Space Equations for Multi-Converter Systems. Electronics, 14(19), 3966. https://doi.org/10.3390/electronics14193966

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

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FPGA Accelerated Large-Scale State-Space Equations for Multi-Converter Systems

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