Channel Temperature Measurement of GaN HEMT Used in Kilowatt-Level Power Amplifier

Round 1

Reviewer 1 Report

Comments and Suggestions for Authors

The paper demonstrate the novelty of modified bias circuit for KW-level GaN HEMT devices and the trap time constant has been extracted. There are couple things can be improved:
1. how the component values in the modified bias circuit are determined? is it scalable to different level of power?

2. the extracted 3 micro second trap time is device specific or generalizable across devices?

3. the organization of the paper has problem. section 3.1.1 follow direct to 2.2 in page 4. but section 3 title shows in page 6. 

4. the logic connection between the analysis in 2.1 and experiment is weak. 

Author Response

Comments 1: how the component values in the modified bias circuit are determined? is it scalable to different level of power?

Response 1: Thank you for pointing this out。Based on your opinion, I added "The resistance and capacitance values of the modified bias circuit were selected based on the oscillation frequency observed without the bias circuit, and this method is scalable to different power levels" to the conclusion of 2.2.1.

The resistance and capacitance values of the modified bias circuit were selected based on the oscillation frequency observed without the bias circuit. As shown in Figure 1, the oscillation frequency measured under no-bias conditions was approximately 4×10⁷ Hz. According to the formula for the real part of the input impedance:

where  and  are both approximately 50 nF, and the transconductance  of the kW-level GaN HEMT chip used in the experiment is about 100 A/V, the calculated negative resistance is approximately –0.5 Ω. Therefore, a resistance of 0.5 Ω was selected.

Since the oscillation frequency is 4×10⁷ Hz and the actual capacitor structure is a series RLC network, four capacitors were chosen based on characteristic frequency points provided in the capacitor datasheet—specifically 10⁶ Hz, 10⁷ Hz, 10⁸ Hz, and 10⁹ Hz—to cover the oscillation frequency. The simulated S₁₂ parameters are shown in Figure 2.Based on the above analysis, this method is scalable to different power levels.

Figure 1. The gate voltage oscillation caused by the negative resistance effect without bias stabilization circuit (with a frequency of approximately4×10⁷Hz）

Figure 2. The S12 parameters of different capacitors

Comments 2: the extracted 3 micro second trap time is device specific or generalizable across devices?

Thank you for pointing this out. I added relevant explanations in 4.Results and Discussion.

The extracted 3 microsecond trap time constant is generalizable across measured devices. However, for different GaN HEMTs, the trap time constants are not universally 3 microseconds.

 

Comments 3: the organization of the paper has problem. section 3.1.1 follow direct to 2.2 in page 4. but section 3 title shows in page 6. 

Thank you for pointing this out。Apologies for this error—this was due to mistakenly labeling Section 2.2.1 as Section 3.1.1. These errors have been corrected in the manuscript.

Comments 4: the logic connection between the analysis in 2.1 and experiment is weak. 

Thank you for pointing this out。I added relevant explanations in 4.Results and Discussion.

Apologies for not clearly stating the experimental conditions. The pulse widths used at hotplate temperatures of 45°C, 60°C, and 80°C were 8μs, 9μs, and 10μs, respectively. At these pulse widths. At these pulse widths, the max channel temperature of the power amplifier is 180°C, as shown in Figure 7(a). In previous studies addressing gate voltage issues, a pulse width of 3μs was used.

Figure 8(a) presents the drain current versus channel temperature curves fitted using data measured at the same time point under hotplate temperatures of 45°C, 60°C, and 80°C, along with the fitting curve from Equation (6). Figure 8(b) shows the drain current versus temperature curves fitted using drain current and channel temperature data taken at the same time point within the 3μs to 10μs interval under the same hotplate temperatures, also accompanied by the fitting curve from Equation (6).

A comparison between Figure 8(a) and Figure 8(b) indicates a trap time constant of 3μs. Within the time range of 3μs to 10μs, the relationship between drain current and temperature aligns with the characterization by Equation (6) in Section 2.1, thereby validating the analysis in Section 2.2.2 and Figure 3.

 

Based on your feedback, I have revised the relevant sections of the manuscript and highlighted the changes in yellow. Thank you for your valuable suggestions.

Reviewer 2 Report

Comments and Suggestions for Authors

This article proposes for the first time an electrical temperature measurement method for kW level gallium nitride high electron mobility transistors (GaN HEMTs), filling the gap in electrical temperature measurement technology at this power level. Traditional methods often rely on optical temperature measurement or 3D modeling and simulation, while the method proposed in this paper indirectly reflects channel temperature by measuring drain current, which has higher practicality and convenience. By modifying the gate bias circuit, the impact of gate leakage current on gate voltage has been reduced, thereby stabilizing gate bias and improving temperature measurement accuracy.

1. The experiment was mainly conducted at a pulse width of 3 μ s, and the effects of temperature measurement accuracy and trap effects at other pulse widths have not been fully explored.
2. The theoretical model ignores certain secondary factors (such as contact resistance, lead resistance, etc.) in the derivation process, which may have a certain impact on temperature measurement accuracy in practical applications.

Author Response

Comments 1: The experiment was mainly conducted at a pulse width of 3 μ s, and the effects of temperature measurement accuracy and trap effects at other pulse widths have not been fully explored.

Thank you for pointing this out. I added relevant explanations in 4.Results and Discussion.

Apologies for not clearly stating the experimental conditions. The pulse widths used at hotplate temperatures of 45°C, 60°C, and 80°C were 8μs, 9μs, and 10μs, respectively. At these pulse widths. At these pulse widths, the max channel temperature of the power amplifier is 180°C, as shown in Figure 7(a). In previous studies addressing gate voltage issues, a pulse width of 3μs was used.

Figure 8(a) presents the drain current versus channel temperature curves fitted using data measured at the same time point under hotplate temperatures of 45°C, 60°C, and 80°C, along with the fitting curve from Equation (6). Figure 8(b) shows the drain current versus temperature curves fitted using drain current and channel temperature data taken at the same time point within the 3μs to 10μs interval under the same hotplate temperatures, also accompanied by the fitting curve from Equation (6).

A comparison between Figure 8(a) and Figure 8(b) indicates a trap time constant of 3μs. Within the time range of 3μs to 10μs, the relationship between drain current and temperature aligns with the characterization by Equation (6) in Section 2.1, thereby validating the analysis in Section 2.2.2 and Figure 3.

 

Comments 2: The theoretical model ignores certain secondary factors (such as contact resistance, lead resistance, etc.) in the derivation process, which may have a certain impact on temperature measurement accuracy in practical applications.

Thank you for pointing this out.

You are absolutely correct. In the derivation of the formula describing the relationship between drain current and temperature, certain secondary factors such as contact resistance and threshold voltage were neglected. In reality, both contact resistance and threshold voltage vary with temperature, which indeed influences the drain current.

During the initial theoretical phase of this project, the primary objective was to validate the feasibility and effectiveness of the electrical thermometry method for kW-level GaN HEMTs. Omitting these secondary factors helped clarify the fundamental behavior of how drain current changes with temperature.

We have now initiated experimental measurements of contact resistance and threshold voltage in GaN HEMTs across different temperatures, with the goal of developing a more accurate and comprehensive drain current model.

Thank you once again for your insightful comments.

 

Based on your feedback, I have revised the relevant sections of the manuscript and highlighted the changes in yellow. Thank you for your valuable suggestions.

Reviewer 3 Report

Comments and Suggestions for Authors

This paper proposes an electrical measurement method for channel temperature estimation in kilowatt-level GaN HEMTs. Several issues remain: 

1. The pulse width is chosen as 3 μs. What is the rationale for this choice? Is this time constant related to device dimensions, fabrication process, or test conditions (e.g., voltage, current density)?

2. Figure 6 shows the difference in drain current waveforms before and after circuit modification. Could the authors estimate the drain current reduction attributable to trap effects versus that caused by self-heating?

3. Is there any measured waveform data of the actual gate current available? Including such data would strengthen the analysis.

4. The proposed method relies on a k-value obtained from fitting at a baseline temperature of 45 °C. Is this k-value independent of ambient temperature or device bias conditions? If devices from different process nodes are used, would a new calibration be required?

Author Response

Comments 1: The pulse width is chosen as 3 μs. What is the rationale for this choice? Is this time constant related to device dimensions, fabrication process, or test conditions (e.g., voltage, current density)?

Thank you for pointing this out。I added relevant explanations in 4.Results and Discussion.

Apologies for not clearly stating the experimental conditions. The pulse widths used at hotplate temperatures of 45°C, 60°C, and 80°C were 8μs, 9μs, and 10μs, respectively. At these pulse widths. At these pulse widths, the max channel temperature of the power amplifier is 180°C, as shown in Figure 7(a). In previous studies addressing gate voltage issues, a pulse width of 3μs was used.

Figure 8(a) presents the drain current versus channel temperature curves fitted using data measured at the same time point under hotplate temperatures of 45°C, 60°C, and 80°C, along with the fitting curve from Equation (6). Figure 8(b) shows the drain current versus temperature curves fitted using drain current and channel temperature data taken at the same time point within the 3μs to 10μs interval under the same hotplate temperatures, also accompanied by the fitting curve from Equation (6).

A comparison between Figure 8(a) and Figure 8(b) indicates a trap time constant of 3μs. Within the time range of 3μs to 10μs, the relationship between drain current and temperature aligns with the characterization by Equation (6) in Section 2.1, thereby validating the analysis in Section 2.2.2 and Figure 3.

Comments 2: Figure 6 shows the difference in drain current waveforms before and after circuit modification. Could the authors estimate the drain current reduction attributable to trap effects versus that caused by self-heating?

Thank you for pointing this out. I added relevant explanations in 4.Results and Discussion.

The results in Figure 6 show that, within the 3μs pulse width, the combined effects of trap trapping and self-heating led to a total drain current decrease of 12 A. This allows for a comparative assessment of the impact of gate bias. The individual contributions of self-heating and trap trapping are illustrated in Figure 8(a). Taking the test results of the 45 °C environmental hot stage as an example, the fitted curve indicates that self-heating accounts for a current reduction of 7 A, meaning that trap trapping is responsible for the remaining 5 A decrease.

Comments 3: Is there any measured waveform data of the actual gate current available? Including such data would strengthen the analysis.

Thank you for pointing this out。For the kW-level GaN HEMT tested in this study, no gate current waveform was measured due to the excessively high power level, which made it impractical to characterize the gate current with available equipment. However, the gate current was measured on a 100 W GaN HEMT fabricated using the same process. Under the conditions of a gate voltage of 0 V and a drain voltage of 70 V, the gate current was observed to increase linearly over time within a pulse width of 4 μs.

The blue line represents the gate current, and the white line represents the gate voltage.

Comments 4: The proposed method relies on a k-value obtained from fitting at a baseline temperature of 45 °C. Is this k-value independent of ambient temperature or device bias conditions? If devices from different process nodes are used, would a new calibration be required?

Thank you for pointing this out。I added relevant explanations in 4.Results and Discussion.

The k-value is independent of ambient temperature. As shown in Figure 8, the drain current remains consistent at a given channel temperature, regardless of the hotplate temperature. However, the k-value is dependent on the drain bias voltage. Therefore, recalibration would be required if a different drain bias voltage is applied or if devices from a different process node are used, in order to accurately determine the k-value.

 

Based on your feedback, I have revised the relevant sections of the manuscript and highlighted the changes in yellow. Thank you for your valuable suggestions.

Round 2

Reviewer 1 Report

Comments and Suggestions for Authors

Thank you for the revision. the paper becomes much clearer. You may consider to add some of the response to the paper for clarity. It also would be better if the conclusion can be further developed and emphasize the significance of the channel temperature measurement.

Author Response

Comments 1: You may consider to add some of the response to the paper for clarity. It also would be better if the conclusion can be further developed and emphasize the significance of the channel temperature measurement.

Response： Thank you for pointing this out。I added relevant explanations in 5.Conclusions.

As you correctly pointed out, the conclusion failed to state that the purpose of this method is to enable rapid and accurate monitoring of the channel temperature within the operating pulse of GaN HEMTs in an electrical laboratory setting. This monitoring is crucial to prevent the degradation of output characteristics or even thermal breakdown damage caused by excessively high channel temperatures.

Thank you very much for your valuable feedback.