A Recursive Trigonometric Technique for Direct Digital Frequency Synthesizer Implementation
Round 1
Reviewer 1 Report
Comments and Suggestions for AuthorsSome recommendations for improving the manuscript "A Recursive Trigonometric Technique for Direct Digital Frequency Synthesizer Implementation":
Please, check that you have followed all the template requirements for the manuscript formatting!
Please, check that you have explained all abbreviations – e.g. LUT, etc. (it is accepted that at the first appearance of the abbreviation, it should be clarified for the reader).
There is no "Related works" section in the publication, although the introduction is a brief overview of existing solutions.
"N is the resolution" (line 32) – but formula (1) uses "n", not "N"! What is the relationship between the two designations?
It is not a good practice to cite multiple references at once - it is good to specify what is different about each of them! For example, [4-7], [8-11], [12-14], etc. – which, for example, is different in 4, which is not covered in 5, etc.
In my opinion, in equations (3) and (4), it is good to use the notation coefficient*theta, i.e. (n-1)*theta or (n+1)*theta (here, the Greek symbol must be written, not "theta)".
Formula (8) is incorrect - please, check it again! This formula is rather at n = m – 1 (not for n = m).
Please, reread the manuscript once again to eliminate all unclear sentences and small mistakes, such as:
Unclear sentence: "With the known frequency of each point generated by the DAC as well as the frequency of the target signal, since the signal is in the range of (0°, 360°)." (line 106, 107)
, and 3) The initial -> , and 3) the initial
In my opinion, it would be nice to provide sample MATLAB code to obtain the graphical dependencies in Fig. 7 and Fig. 8 in order to confirm the results. How did you get the number of iterations for the two methods (16 and 8) mentioned in the article?
(line 227) "denoted as K, is treated as a variable, as explained in reference [17]." – I think, it would be good to give a brief explanation here too!
Could you give an example of exactly how you use formula (10)?
Did I understand correctly - you used MATLAB to calculate the quantities in Table 1 - which of the numerical values ​​did you obtain and which did you borrow from other publications?
(Lines: 285, 286) "a comprehensive analysis will be undertaken in the Modelsim simulation environment, utilizing Verilog as the hardware description language" - can't MATLAB be applied in this case as well, which exactly requires the use of this software? Please, explain in the text what necessitates the use of different software products when plotting the graphical dependencies?
Line 332: "error peak of 6.47×10-12 around 279°" - how are these exact values ​​determined? (since they cannot be determined with such accuracy on the graph - is the code intended to output these values ​​in some way?) The question also applies to the other precision values in the article!
Please, specify each figure and the results in the tables with which software they were obtained!
Please, avoid breaking tables on two pages - for example, Table 3.
I recommend including additional references from the past three years (if applicable)!
By the way, https://www.mdpi.com/1424-8220/23/7/3683 - the authors have published a "similar" paper, which, however, is not cited in this one! There is overlap - dear authors, please, specify what is new in this article that is different from the article referenced above.
Comments on the Quality of English LanguageEnglish might be improved.
Author Response
Thank you very much for your valuable suggestions and constructive comments. We have addressed all your feedback in detail in the document titled “Summary of Change_electronics-3299200_Reviewer1”.
Author Response File: 
Author Response.pdf
Reviewer 2 Report
Comments and Suggestions for AuthorsThe article presents an interesting method of direct digital frequency synthesis (DDFS) as an alternative to the commonly used LUT-based or CORDIC-based approaches.
While it provides valuable information for readers interested in digital synthesis techniques, the manuscript has several shortcomings, including:
1) The manuscript lacks critical details, including a block diagram and a description of the hardware module implementation. Therefore, it is difficult to assess the technical merit of the proposed approach.
2) The authors propose a "quadrant transform" for generating cosine samples beyond the 90-degree range. However, implementing this transform may require memorizing sample values, which would contradict the ROM-free feature claimed by the authors.
3) The advantage over standard LUT-based approach is not demonstrated in the results presented in tables 5-6
4) There are some other published ROM-free implementations, e.g. "Phase-Adjustable Pipelining ROM-Less Direct Digital Frequency Synthesizer With a 41.66-MHz Output Frequency", IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 53, NO. 10, OCTOBER 2006
5) The presented DDFS implementation is reported to generate a waveform at 13.5 kHz, a relatively low frequency compared to other implementations, including the one mentioned above.
Comments on the Quality of English LanguageN/A
Author Response
Thank you very much for your valuable suggestions and constructive comments. We have addressed all your feedback in detail in the document titled “Summary of Change_electronics-3299200_Reviewer2”.
Author Response File: Author Response.pdf
Reviewer 3 Report
Comments and Suggestions for AuthorsThe authors are describing a recursive trigonometric technique for a numerically controlled oscillator applied in direct digital frequency synthesis. The topic is of interest to the readers of MDPI Electronics and the paper is decently well written and organized, but it lacks some important ingredients which should be reconciled before being accepted for publication.
My major concerns are the following:
The authors are comparing the power consumption their RT method and the other methods (LUT and CORDIC) without explanation how the power consumption is being characterized. Please give a detailed overview of your test setup how was the FPGA chip power consumption measured. I reckon the authors did not use just the numbers which the synthesis tool provides which are quite wrong and surely not authoritative.
In Table 3. the SNR and SFDR highly depend on the LUT size but it is not indicated for what LUT size the results are given. Please give results for multiple LUT sizes.
Please compare your work also to the reference:
- https://ieeexplore.ieee.org/document/9417063
Can the authors compare their work to the phase dithering and Taylor series correction techniques which are fairly standard nowadays.
It is nowadays quite often that the authors upload their work and Verilog/MATLAB source code to one of the public repositories such as GitHub, GitLab or Bitbucket. Please consider doing so and referencing the repository in your text.
Even though on lines 286-287 it is mentioned that there is a Verilog implementation that is simulated using Mentor's ModelSim it is unclear which results are obtained using this RTL simulations and which are coming from MATLAB. Please be specific and if possible use as much RTL results as possible. Also, ModelSim is spelled with capital S not Modelsim, see: https://en.wikipedia.org/wiki/ModelSim and https://eda.sw.siemens.com/en-US/ic/modelsim/
If Table 1 is MATLAB model generated, why are you having N/A in the third and the fourth row for 32-bit RMSE? Please regenerate those and write the values. In Table 1, you can also add 24-bit cosine RMSE, since there's space.
In almost all figures the axis labels, ticks and legend is too small and when printed cannot be read. Please uniform the axis label, ticks and legend font size on all figures to correspond to Figure 11.
Comments on the Quality of English LanguageOn line 155 there should be no capital T under enumeration: 3) the initial angle selection for the phase deviation.
There is a missing space typo in line 292 under "32-bitresolution" which should be "32-bit resolution" instead.
Author Response
Thank you very much for your valuable suggestions and constructive comments. We have addressed all your feedback in detail in the document titled “Summary of Change_electronics-3299200_Reviewer3”.
Author Response File: Author Response.pdf
Round 2
Reviewer 1 Report
Comments and Suggestions for AuthorsDear Authors,
I have read the authors’ responses to my comments in detail! I am satisfied with the responses and the corrections they made, marked in yellow (which also seem to satisfy the comments from other reviewers). Some of the comments are not colored in yellow, for example (the explanations of abbreviations), but this is not so important! I also really liked the insertion of Figure 4 by the authors.
Comments on the Quality of English Language
The quality of the English language is good.
Reviewer 2 Report
Comments and Suggestions for AuthorsThank you for answers to my comments.
Reviewer 3 Report
Comments and Suggestions for AuthorsThe authors have addressed almost all the issues I had. I suggest the authors to include the link towards their GitHub repository in the article itself: https://github.com/xxing2/DDFS_FPGA_RT and also to cite the paper mentioned in my review and compare to it in the actual text, but I leave this upon their decision.
