Next Article in Journal
Integrated Neural Network Approach for Enhanced Vital Signal Analysis Using CW Radar
Next Article in Special Issue
A Multiscale Simulation on Aluminum Ion Implantation-Induced Defects in 4H-SiC MOSFETs
Previous Article in Journal
Efficient SFC Protection Method against Network Attack Risks in Air Traffic Information Networks
Previous Article in Special Issue
Mobility Extraction Using Improved Resistance Partitioning Methodology for Normally-OFF Fully Vertical GaN Trench MOSFETs
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

A Geometrically Scalable Lumped Model for Spiral Inductors in Radio Frequency GaN Technology on Silicon

1
STMicroelectronics, 95121 Catania, Italy
2
Dipartimento di Ingegneria Elettrica Elettronica e Informatica (DIEEI), University of Catania, 95123 Catania, Italy
*
Author to whom correspondence should be addressed.
Electronics 2024, 13(13), 2665; https://doi.org/10.3390/electronics13132665
Submission received: 3 June 2024 / Revised: 2 July 2024 / Accepted: 5 July 2024 / Published: 7 July 2024
(This article belongs to the Special Issue Wide-Bandgap Device Application: Devices, Circuits, and Drivers)

Abstract

:
This paper presents a lumped scalable model for spiral inductors in a radio frequency (RF) gallium nitride (GaN) technology on silicon substrate. The model has been developed by exploiting electromagnetic (EM) simulations of geometrically scaled spiral inductors. To this aim, the technology substrate, i.e., the metal back-end-of-line along with dielectric and semiconductor layers of the adopted GaN process, has been validated by means of experimental data and then used to define the EM simulator set-up for the spiral inductors. The proposed model adopts a simple π-topology with only seven lumped components and predicts inductor performance in terms of inductance, quality factor (Q-factor) and self-resonance frequency (SRF) for a large range of geometrical parameters of the spiral (i.e., number of turns, metal width, inner diameter).

1. Introduction

Radio frequency (RF) integrated circuits (ICs) extensively employ inductive components (i.e., inductors and transformers) to implement crucial functionality, such as 50-ohm impedance matching at the input/output chip terminals, impedance matching in multi-stage amplifiers, tuned resonant load in the RF amplifiers, LC tank in voltage-controlled oscillators, LC filters, etc. [1]. For this reason, modern RF silicon technologies adopt a proper back-end-of-line (BEOL) with thick metals and thick intermetal oxides to reduce the resistive losses and the parasitic capacitances, respectively [2]. Typically, RF silicon technologies provide general purpose inductor devices into the process design kit (PDK). However, scalable models or stack-up descriptions of electromagnetic (EM) simulations are required for a customized inductor design [3,4].
In the last few years, GaN-based High-Electron-Mobility Transistors (HEMTs) have demonstrated excellent performance for high-power applications thanks to the wide bandgap and the crystal structure of GaN, which allow achieving both high voltage and high currents in a wide temperature operative range. Despite the vast literature available for GaN-based technologies, very few papers deal with inductive components (i.e., inductors and transformers) in RF GaN processes, either on silicon [5,6] or on SiC substrates [7,8,9]. Moreover, to the authors’ knowledge, very scarce literature is available for inductor modeling in GaN technologies since only in [6] has a lumped scalable model been proposed, whereas [9] presents an equivalent circuit extracted for a single geometry. Therefore, unlike silicon-based inductors and transformers [10,11,12,13,14,15,16,17,18], there is a lack of knowledge on the analysis, design and modeling of inductive devices in GaN technologies. This study aims to partially cover this gap.
This paper is organized as follows. Section 2 briefly describes the adopted RF GaN technology on a Si substrate. Section 3 summarizes the physical phenomena taking place in integrated spiral inductors with the aim of providing the reader with the main design guidelines. The proposed scalable lumped model for spiral inductors in RF GaN technology is detailed in Section 4, while its validation is reported in Section 5. Finally, the main conclusions are summarized in Section 6.

2. RF GaN Technology

The adopted technology is an RF GaN process fabricated on a thin silicon (Si) substrate, which has been developed by STMicroelectronics mainly for sub-6 GHz band power applications [19,20,21,22]. The process features 50 V HEMTs with a gate length of 0.5 µm. Since the technology has been specifically addressed to RF applications, transistors have been optimized for normally-on depletion operation, thus exploiting the total two-dimensional electron gas (2DEG) density at the AlGaN/GaN heterointerface. The technology also provides resistors and high-quality-factor (Q-factor) metal–insulator–metal (MIM) capacitors for the integration of biasing and matching networks, respectively, while allowing for the fabrication of polygonal/circular spiral inductors and interleaved/stacked transformers that are essential for advanced RF ICs [23,24,25,26,27,28,29]. To this aim, the technology BEOL provides three AlCu metals, two thick layers at the top of the stack, which are used for the inductor coil and the underpass, along with a lower thinner one to access the transistor terminals. The upper metal layers, namely MTL3 and MTL2, have equal thickness to avoid Q-factor degradation on one side and a bottleneck for the maximum current due to the underpass connection on the other side. Moreover, the two thick metals are suitable for the implementation of high-performance integrated transformers, especially for staked configurations. For the sake of completeness, Figure 1 shows the Scanning Electron Microscope (SEM) microphotograph of the upper metal layers (i.e., MTL3 and MTL2) as they are connected in the underpass region of a spiral inductor.
The adopted RF GaN technology enables the design and implementation of watt-level sub-6 GHz power amplifiers (PAs) for base station applications. The final target is replacing the traditional micromodule approach based on discrete components with a fully integrated system, thus achieving a significant reduction in cost and size. This study has been developed in the framework of the development of the above-described RF GaN technology with the aim of driving the implementation of a geometrically scaled library of spiral inductors for RF applications, while providing a reliable design tool for inductor customization into the PDK of the technology.

3. Integrated Inductor Physics: Design Guidelines

The design of integrated inductors is aimed at increasing both the Q-factor and the self-resonance frequency (SRF) of the component by minimizing the energy losses and the parasitic capacitances, respectively. Energy dissipation occurs into both the metal windings and the underneath layers (i.e., oxides, insulators, diffused semiconductors, etc.). On the other hand, the operative frequency range of the inductor is limited by the interwinding capacitances and especially by the area/perimeter capacitances of the spiral toward the substrate.
Figure 2 depicts the main EM phenomena taking place in an integrated spiral inductor [1]. The losses in the metal layers are mainly due to the current crowding, i.e., the non-uniform distribution of the current in a conductor, which is particularly exacerbated by the peculiar structure of a spiral inductor. Indeed, the current crowding is higher on the internal sides of the spiral where the magnetic field is at its maximum. This phenomenon is the result of the superimposition of the skin and proximity effects, and rises with the increase in the operative frequency, thus resulting in the frequency dependency of the inductor resistance [30]. Therefore, thick and highly conductive metal layers are mandatory to reduce the inductor series resistance, especially in the lower RF bands, since the effectiveness progressively degrades at higher frequencies. On the other hand, the use of “hollow” spirals is a common rule for high-frequency inductive components to avoid the losses in the inner turns [30,31].
Another significant impact on the performance of an integrated inductor is also due to the substrate losses. Indeed, both electric and magnetic fields are significant in the layers underneath the inductor. Specifically, two different mechanisms take place, as represented in Figure 2 using blue and green arrows. The vertical currents (blue arrows) injected into the substrate are the displacement currents (i.e., due to the electrical field and therefore related to the capacitive effects), while the horizontal currents (green arrows) flowing into the conductive substrate layers are magnetically induced currents (i.e., due to the time-varying electrical field according to the Faraday–Lenz law). Both electrically and magnetically induced currents increase at radio frequencies and their effect can be dominant with respect to the ohmic losses into the spiral, especially for large inductors. Specifically, in GaN technology, the bidimensional electron gas in the AlGaN/GaN heterojunction must be properly neutralized below the inductor footprint to avoid the flowing of magnetically induced eddy currents and consequent energy losses [22].
An important role in enlarging the operative frequency range of an integrated inductor or equally in increasing the maximum inductance value that can be used at a given working frequency is played by the minimization of the parasitic capacitances. Typically, the main contributions are due to the electrical coupling with the substrate, especially when its thickness is reduced for thermal reasons, such as in the adopted GaN technology. On the other hand, a thinned substrate helps in reducing the losses due to the displacement currents flowing toward the ground. The main parasitic capacitances are related to the overlap regions between the spiral and the underpass, especially for large-width metal inductors. When the metal spacing is higher than a few microns, the fringing winding capacitances are lower, but their contribution could become significant for inductors with a high perimeter/area ratio (i.e., low w, high n and dIN).

4. Geometrically Scalable Lumped Model Description

The model has been developed to predict the electrical performance of circular inductors for a large range of geometrical parameters to comply with circuit designer demands in RF IC optimization. A circular shape is preferred since it guarantees a better Q-factor performance than squared or polygonal shapes [1]. Although in nanoscale CMOS, the circular shape is forbidden [2,27,28,29], in the adopted GaN process, circular spirals can be manufactured without any process problems, which do occur in other technologies with wider lithography [16,32,33]. Due to the lack of a sufficiently high number of available fabricated inductors, model parameter extraction has been carried out by using 2D EM simulations of geometrically scaled circular inductors in the adopted GaN technology. To increase the accuracy of the simulations, the process substrate (i.e., the metal back-end-of-line along with dielectric and semiconductor layers of adopted GaN technology) has been validated by means of experimental data of microstrips fabricated in the three metal layers (i.e., MTL1, MTL2 and MTL3).
Figure 3 shows the micrograph of a MTL1 microstrip fabricated on the adopted GaN technology on a 60-µm thick silicon substrate. To achieve an accurate estimation of both the inductance and Q-factor, a frequency dispersity model of the silicon substrate has also been included in the EM simulations. Specifically, the Svensson/Djordjevic model has been used [34]. The comparisons between measured and EM-simulated scattering parameters, S21 and S11, are reported in Figure 4 for the sake of completeness. The EM simulated S-parameters are in good agreement with the measured ones over a wide frequency range, especially for S21. The errors are quite low and largely acceptable for our purpose.
As an example, a three-turn circular spiral inductor with the main geometrical parameters (i.e., the metal width, w, the inner diameter, dIN, and the metal spacing, s) is shown in Figure 5.
The proposed model adopts a simple π-topology, shown in Figure 6, which employs only geometrically scalable circuit parameters. The ideal inductor, L, is used to model the spiral and underpass inductances, as well as the magnetic coupling within the substrate. Two capacitors, CP1 and CP2 (whose values are different due to asymmetric inductor layout), are adopted considering the capacitive effects toward the substrate. Moreover, a further capacitor, CS, is exploited to account for other capacitive effects. Specifically, parasitic capacitances throughout the inductor turns along with the overlap between the spiral and the underpass are considered. Finally, ohmic and substrate losses are modeled by means of frequency-variable resistances, RS and RP, respectively.
The inductance value, L, is the sum of three contributions,
L = L C O I L + L U N D + L S U B ,
where LCOIL and LUND are the inductances of the spiral and the underpass, respectively, while LSUB is used to account for the induced magnetic field in the substrate in a simple way [35,36,37]. The first two terms of (1) can be calculated by using well-known closed form expressions available in the literature [38,39], whereas LSUB has been evaluated by using the following monomial formula:
L S U B = 4 π α n 2 d A V G 2 w
where dAVG is the average inductor diameter and α is a fitting coefficient of around 0.92.
It should be noted that LSUB is a negative value since a reduction in the total inductance is expected due to the induced magnetic field within the substrate.
Capacitive contributions (i.e., CS and CP1,2) determine the inductor SRF and can be extracted from EM data. The following scalable equation has been used for CS:
C S = 1 N O V E R ε M w 2 t M p ( n )
where NOVER is the number of overlaps between the spiral and the underpass (i.e., NOVER = n + 1.5), and εM and tM are the electric permittivity and the thickness of the intermetal (i.e., MTL3-MTL2) dielectric layer, respectively. It is worth noting that ε M w 2 / t M is the capacitance of a single overlap between the spiral and the underpass. To improve the geometrical scalability of (3), the fitting function p(n) has also been included, which adopts the second-order polynomial expression reported in (4).
p n = 0.9 ( n 2 3 n + 4 α )
Substrate capacitances, CP1,2, are calculated by means of the following equation:
C P 1,2 = C S U B A C O I L 2 1 + ( 1 + α ) e β w
where CSUB is the substrate capacitance per unit area, ACOIL is the coil area and β is an experimental coefficient estimated to be 3.53 × 104. The coil area, ACOIL, is given by the product of the width, w, and the spiral length, lCOIL, which is calculated as follows:
l C O I L = π n d i n + w + n 0.5 w + s
Since spirals are not symmetric, the capacitances CP1 and CP2 must be slightly different to properly model the two different values of the self-resonance frequencies of the inductor, SRF1 and SRF2, when terminal 1 or 2 is grounded, respectively. To account for this asymmetry, lCOIL is calculated with Equation (6) for CP1, while it is adjusted according to (7) for CP2.
l C O I L 2 = π n d i n + w + 7 12 n 0.5 w + s
It is worth noting that when the metal width, w, increases, the capacitance value given by (5) reduces to its ideal value since the fringing effects tend to be negligible.
The series resistance, RS, is modeled by using a roughly parabolic law according to Equation (8):
R s = R D C 1 + f r e q f R 0 f r e q 2 2 f R 0 f R M f R 0   2 f R M 1 1
where RDC is the overall dc resistance of the inductor, which can easily be calculated by using the metal sheet resistance for the number of squares (i.e., lCOIL/w), while fRM and fR0 are the frequencies for which RS assumes its maximum and zero, respectively. Since both fRM and fR0 cannot be easily predicted from the inductor geometrical parameters, the following empirical formulas have been used:
f R 0 1 2200 w · d i n · S R F
f R M 0.04 · S R F w 0.1 · n 0.23 · d i n 0.12
Finally, substrate losses are modeled by means of RP that is calculated by using the following expression:
R P = 1 6 ρ S i t S i π   d O U T 2 2 f 0 f r e q
where ρSi and tSi are the resistivity and the thickness of the silicon substrate, dOUT is the inductor outer diameter and f0 is equal to 3.5 GHz.

5. Model Validation

The proposed lumped model has been validated by comparison with the EM data of geometrically scaled inductors whose parameters are listed in Table 1. The model can predict the performance of circular inductors with 10-μm metal spacing, a number of turns from 1.5 to 6.5, a metal width from 10 µm to 100 µm, and inner diameters from 60 µm to 300 µm. Specifically, the large variability in the metal width is essential to demonstrate the soundness of the model not only for low-current inductors but also for high-current inductors required in the power amplifiers. The errors in low-frequency inductance, peak Q-factor, QMAX, and SRF are summarized in Table 2.
As an example of the very good estimation of inductor performance, comparisons for inductors 2, 6 and 10 are reported in Figure 7a, Figure 7b and Figure 7c, respectively. It is worth noting that since the model covers a very wide range of geometrical parameters in terms of n, w and dIN, the inductors selected for the comparison in Figure 7 represent very different geometries for a fair validation of the model. The prediction of the SRF for inductor 2 is less accurate than for the other inductors due to the fringing capacitance of the spiral that has a higher perimeter/area ratio. Generally, the model is more accurate with larger values of w. Indeed, the main aim is to guarantee very high accuracy for large-width inductors mainly used in PAs.
Figure 8 depicts the microphotograph of inductor 7 fabricated in the adopted RF GaN technology for on-wafer characterization [15]. Figure 9 compares the proposed model, the EM-simulated data and the experimental data for inductor 7. The agreement between measurements and EM simulations further confirms the soundness of the EM simulation set-up adopted to develop the inductor model, as defined in Section 4. Moreover, the comparison highlights the accuracy of the proposed lumped model with respect to the experimental measurements.
It is interesting to highlight some remarkable differences between this study and a recently published study [6] on a similar topic (i.e., modeling of GaN on Si inductors). Indeed, although a larger number of inductors with different shapes have been analyzed in [6], the model proposed here has been developed to cover a much wider range of the metal trace width. This circumstance is reflected in the explicit dependency of the model equations, specifically (2) and (5), on the layout parameter, w. Moreover, a considerable difference between the two studies concerns the modeling methodology itself. Indeed, a pure analytical approach has been followed in [6], using a lot of circuit elements to account for the several physical phenomena occurring in the metal and substrate layers. On the other hand, the proposed scalable model adopts a much easier equivalent circuit, consisting of only seven lumped components and starting from some theoretical considerations, exploits experimental coefficients for fitting.
It is worth briefly comparing this study with [6,9]. Despite its simplicity and wider geometrical scalability, the proposed model turns out to be broadly comparable to the model in [6] in terms of percentage errors in the main performance parameters. On the other hand, the model in [9] is more complex and accurate, exploiting customized parameter extraction from single inductor measurements, but it is not geometrically scalable. As already mentioned, the key feature of the proposed model is to predict inductor performance for a wide range of geometrical parameters with very good accuracy.

6. Conclusions

A simple yet effective lumped model for circular inductors has been developed in a 0.5-μm RF GaN technology for sub-6 GHz power applications. The model adopts only seven lumped components and is fully geometrically scalable. It demonstrates very good accuracy in the prediction of inductor performance (i.e., inductance, Q-factor and SRF) for a wide range of geometrical parameters. Both the geometrical scalability and network simplicity of the proposed model allow for its use in actual RF IC design. Thanks to its simplicity, the model can be used in other RF GaN technologies provided that proper tuning for the fitting parameters is performed to adapt it to a different BEOL. To the authors’ knowledge, this is the very first model for spiral inductors in RF GaN technology guaranteeing state-of-the-art accuracy for such a wide range of geometrical parameters.

Author Contributions

Conceptualization, S.S., G.S. and E.R.; validation, S.S. and G.S.; formal analysis, S.S.; methodology, S.S., G.S. and E.R.; project administration, E.R. and M.G.; supervision, E.R., G.S. and M.G.; writing—original draft, E.R.; writing—review and editing, E.R., S.S. and M.G. All authors have read and agreed to the published version of the manuscript.

Funding

This study was partially supported by STMicroelectronics under the Research Contract with the DIEEI titled “Progettazione e ottimizzazione di componenti passivi reattivi integrati per applicazioni 5G in tecnologia GaN on Si e relativa attività propedeutica per rilascio di un futuro design kit”.

Data Availability Statement

The data presented in this study are available on request from the corresponding author.

Conflicts of Interest

Authors Simone Spataro, Giuseppina Sapone and Marcello Giuffrida are employed by the company STMicroelectronics. The remaining authors declare that the research was conducted in the absence of any commercial or financial relationships that could be construed as a potential conflict of interest.

References

  1. Scuderi, A.; Ragonese, E.; Biondi, T.; Palmisano, G. Integrated Inductors and Transformers: Characterization, Design and Modeling for RF and MM-Wave Applications; CRC Press: Boca Raton, FL, USA; Taylor & Francis Group: Boca Raton, FL, USA, 2010. [Google Scholar]
  2. Ragonese, E.; Nocera, C.; Cavarra, A.; Papotto, G.; Spataro, S.; Palmisano, G. A Comparative analysis between standard and mm-wave optimized BEOL in a nanoscale CMOS technology. Electronics 2020, 9, 2124. [Google Scholar] [CrossRef]
  3. Salnikov, A.S.; Goryainov, A.E.; Dobush, I.M.; Kalentyev, A.A.; Garays, D.V. Approach to scalable modeling for planar inductor using EM simulation and a few samples measurement. In Proceedings of the 2017 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization for RF, Microwave, and Terahertz Applications (NEMO), Seville, Spain, 17–19 May 2017; pp. 55–57. [Google Scholar]
  4. Dobush, I.M.; Vasil’evskii, I.S.; Zykov, D.D.; Bragin, D.S.; Salnikov, A.S.; Popov, A.A.; Gorelov, A.A.; Kargin, N.I. Development of a 0.15 μm GaAs pHEMT process design kit for low-noise applications. Electronics 2021, 10, 2775. [Google Scholar] [CrossRef]
  5. Eblabla, A.; Li, X.; Wallis, D.J.; Guiney, I.; Elgaid, K. High-performance MMIC inductors for GaN-on-low-resistivity silicon for microwave applications. IEEE Microw. Wirel. Compon. Lett. 2018, 28, 99–101. [Google Scholar] [CrossRef]
  6. Montesdeoca, M.S.M.; Angulo, S.M.; Duarte, D.M.; Del Pino, J.; García, J.A.G.Y.; Khemchandani, S.L. An analytical scalable lumped-element model for GaN on Si inductors. IEEE Access 2020, 8, 52863–52871. [Google Scholar] [CrossRef]
  7. Chander, S.; Bansal, K.; Gupta, S.; Gupta, M. Design and analysis of high performance air-bridge spiral circular inductors for GaN MMICs up to Ku band. In Proceedings of the 2017 Devices for Integrated Circuit (DevIC), Kalyani, India, 23–24 March 2017; pp. 734–736. [Google Scholar]
  8. Chander, S.; Bansal, K.; Gupta, S.; Gupta, M. Design and analysis of spiral circular inductors for GaN based low noise amplifier (MMICs). In Proceedings of the 2015 International Conference on Microwave, Optical and Communication Engineering (ICMOCE), Bhubaneswar, India, 18–20 December 2015; pp. 292–294. [Google Scholar]
  9. Wang, H.-S.; He, W.-L.; Wang, R.-D.; Zhang, M.-H. A double-π equivalent circuit model for GaN on-chip inductors. In Proceedings of the IEEE International Conference on Solid-State and Integrated Circuit Technology, Hangzhou, China, 25–28 October 2016; pp. 811–815. [Google Scholar]
  10. Long, J.R.; Copeland, M.A. The modeling, characterization, and design of monolithic inductors for silicon RF IC’s. IEEE J. Solid-State Circuits 1997, 32, 357–369. [Google Scholar] [CrossRef]
  11. Kapur, S.; Long, D.E. Modeling of integrated RF passive devices. In Proceedings of the IEEE Custom Integrated Circuits Conference, San Jose, CA, USA, 19–22 September 2010; pp. 1–8. [Google Scholar]
  12. Cavarra, A.; Nocera, C.; Papotto, G.; Ragonese, E.; Palmisano, G. Transformer design for 77-GHz down-converter in 28-nm FD-SOI CMOS technology. In Applications in Electronics Pervading Industry, Environment and Society, ApplePies 2018; Saponara, S., De Gloria, A., Eds.; Lecture Notes in Electrical Engineering; Springer: Cham, Switzerland, 2019; Volume 573. [Google Scholar]
  13. Huo, X.; Chan, P.C.H.; Chen, K.J.; Luong, H.C. A physical model for on-chip spiral inductors with accurate substrate modeling. IEEE Trans. Electron Devices 2006, 53, 2942–2949. [Google Scholar] [CrossRef]
  14. Sia, C.B.; Ong, B.H.; Chan, K.W.; Yeo, K.S.; Ma, J.G.; Do, M.A. Physical layout design optimization of integrated spiral inductors for silicon-based RFIC applications. IEEE Trans. Electron Devices 2005, 52, 2559–2567. [Google Scholar] [CrossRef]
  15. Biondi, T.; Scuderi, A.; Ragonese, E.; Palmisano, G. Characterization and modeling of silicon integrated spiral inductors for high-frequency applications. Analog. Integr. Circuits Signal Process. 2007, 51, 89–100. [Google Scholar] [CrossRef]
  16. Ragonese, E.; Scuderi, A.; Biondi, T.; Palmisano, G. Scalable lumped modeling of single-ended and differential inductors for RF IC Design. Wiley Int. J. RF Microw. Comput.-Aided Eng. 2009, 19, 110–119. [Google Scholar]
  17. Biondi, T.; Scuderi, A.; Ragonese, E.; Palmisano, G. Analysis and modeling of layout scaling in silicon integrated stacked transformers. IEEE Trans. Microw. Theory Tech. 2006, 54, 2203–2210. [Google Scholar] [CrossRef]
  18. El-Gharniti, O.; Kerherve, E.; Begueret, J.-B. Modeling and characterization of on-chip transformers for silicon RFIC. IEEE Trans. Microw. Theory Tech. 2007, 55, 607–615. [Google Scholar] [CrossRef]
  19. Cerantonio, V.; Giuffrida, M.; Miccoli, C.; Chini, A.; Iucolano, F. From T-CAD simulations to large signal model for GaN RF device. In Proceedings of the 2020 AEIT International Conference of Electrical and Electronic Technologies for Automotive (AEIT AUTOMOTIVE), Turin, Italy, 8–10 November 2020; pp. 1–6. [Google Scholar]
  20. Giorgino, G.; Cioni, M.; Miccoli, C.; Gervasi, L.; Giuffrida, M.F.S.; Ruvolo, M.; Castagna, M.E.; Cappellini, G.; Luongo, G.; Moschetti, M.; et al. Study of 100V GaN power devices in dynamic condition and GaN RF device performances in sub-6GHz frequencies. Elsevier E-Prime Adv. Electr. Eng. Electron. Energy 2023, 6. [Google Scholar] [CrossRef]
  21. Vandendaele, W.; Leurquin, C.; Lavieville, R.; Jaud, M.A.; Viey, A.G.; Gwoziecki, R.; Mohamad, B.; Nowak, E.; Constant, A.; Iucolano, F. Reliability of GaN MOSc-HEMTs: From TDDB to threshold voltage instabilities (Invited). In Proceedings of the IEEE International Reliability Physics Symposium (IRPS), Monterey, CA, USA, 26–30 March 2023; pp. 1–8. [Google Scholar]
  22. Scandurra, A.; Testa, M.; Franzò, G.; Greco, G.; Roccaforte, F.; Castagna, M.E.; Calabretta, C.; Severino, A.; Iucolano, F.; Bruno, E.; et al. Isolation of bidimensional electron gas in AlGaN/GaN heterojunction using Ar ion implantation. Mater. Sci. Semicond. Process. 2023, 168, 107871. [Google Scholar] [CrossRef]
  23. Santhakumar, R.; Pei, Y.; Mishra, U.K.; York, R.A. Monolithic millimeter-wave distributed amplifiers using AlGaN/GaN HEMTs. In Proceedings of the IEEE MTT-S Int. Microwave Symposium Digest, Atlanta, GA, USA, 15–20 June 2008; pp. 1063–1066. [Google Scholar]
  24. Korndorfer, F.; Muhlhaus, V. Lumped modeling of integrated MIM capacitors for RF applications. In Proceedings of the Microwave Measurement Conference (ARFTG), Austin, TX, USA, 8–9 December 2016; pp. 1–4. [Google Scholar]
  25. Bevilacqua, A. Fundamentals of integrated transformers: From principles to applications. IEEE Solid-State Circuits Mag. 2020, 12, 86–100. [Google Scholar] [CrossRef]
  26. Long, J.R. Monolithic transformers for silicon RF IC design. IEEE J. Solid-State Circuits 2000, 35, 1368–1382. [Google Scholar] [CrossRef]
  27. Giammello, V.; Ragonese, E.; Palmisano, G. Transmitter chipset for 24/77-GHz automotive radar sensors. In Proceedings of the IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Technical Digest, Anaheim, CA, USA, 23–25 May 2010; pp. 75–78. [Google Scholar]
  28. Nocera, C.; Papotto, G.; Cavarra, A.; Ragonese, E.; Palmisano, G. A 13.5-dBm 1-V power amplifier for W-band automotive radar applications in 28-nm FD-SOI CMOS technology. IEEE Trans. Microw. Theory Tech. 2021, 69, 1654–1660. [Google Scholar] [CrossRef]
  29. Papotto, G.; Nocera, C.; Finocchiaro, A.; Parisi, A.; Cavarra, A.; Castorina, A.; Ragonese, E.; Palmisano, G. A 27-mW W-band radar receiver with effective TX leakage suppression in 28-nm FD-SOI CMOS. IEEE Trans. Microw. Theory Tech. 2021, 69, 4132–4141. [Google Scholar] [CrossRef]
  30. Kuhn, W.B.; Ibrahim, N.M. Approximate analytical modeling of current crowding effects in multi-turn spiral inductors. In Proceedings of the 2000 IEEE MTT-S International Microwave Symposium Digest, Boston, MA, USA, 11–16 June 2000; pp. 405–408. [Google Scholar]
  31. Craninckx, J.; Steyaert, M.S.J. A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors. IEEE J. Solid State Circuits 1997, 32, 736–744. [Google Scholar] [CrossRef]
  32. Greco, N.; Parisi, A.; Lombardo, P.; Spina, N.; Ragonese, E.; Palmisano, G. A double-isolated dc–dc converter based on integrated LC resonant barriers. IEEE Trans. Circuits Syst. I Reg. Pap. 2018, 65, 4423–4433. [Google Scholar] [CrossRef]
  33. Greco, N.; Parisi, A.; Spina, N.; Ragonese, E.; Palmisano, G. Scalable lumped models of integrated transformers for galvanically isolated power transfer systems. Integration 2018, 63, 323–331. [Google Scholar] [CrossRef]
  34. Keysight Helpfiles. PCB Material Characterization. Available online: https://helpfiles.keysight.com/csg/N1930xB/ToolsAndUtilities/PCB_Material_Characterization.htm#The_Svensson-Djordjevic_Model (accessed on 3 June 2024).
  35. Kuhn, W.B.; Ibrahim, N.M. Analysis of current crowding effects in multiturn spiral inductors. IEEE Trans. Microw. Theory Tech. 2001, 49, 31–38. [Google Scholar] [CrossRef]
  36. Kuhn, W.B. Loss mechanisms and quality factor improvement for inductors in high-resistivity SOI processes. In Proceedings of the IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Santa Clara, CA, USA, 16–18 January 2012; pp. 29–32. [Google Scholar]
  37. Kuhn, W.B.; He, S.; Mojarrad, M. Modeling spiral inductors in SOS processes. IEEE Trans. Electron Devices 2004, 51, 677–683. [Google Scholar] [CrossRef]
  38. Mohan, S.S.; del Mar Hershenson, M.; Boyd, S.P.; Lee, T.H. Simple accurate expressions for planar spiral inductances. IEEE J. Solid-State Circuits 1999, 34, 1419–1424. [Google Scholar] [CrossRef]
  39. Mohan, S.S. The Design, Modeling and Optimization of on Chip Inductor and Transformer Circuit. Ph.D. Thesis, Stanford University, Stanford, CA, USA, 1999. [Google Scholar]
Figure 1. A SEM microphotograph of an inductor in the RF GaN technology (underpass region).
Figure 1. A SEM microphotograph of an inductor in the RF GaN technology (underpass region).
Electronics 13 02665 g001
Figure 2. Main EM phenomena in integrated spiral inductor.
Figure 2. Main EM phenomena in integrated spiral inductor.
Electronics 13 02665 g002
Figure 3. A microphotograph of a MTL1 microstrip fabricated in the adopted RF GaN technology on a 60-µm thick silicon substrate (w = 60 µm).
Figure 3. A microphotograph of a MTL1 microstrip fabricated in the adopted RF GaN technology on a 60-µm thick silicon substrate (w = 60 µm).
Electronics 13 02665 g003
Figure 4. A comparison between the measured and EM-simulated S-parameters of the microstrip in Figure 3: the magnitude of S21 (a), the phase of S21 (b), the magnitude of S11 (c) and the phase of S11 (d).
Figure 4. A comparison between the measured and EM-simulated S-parameters of the microstrip in Figure 3: the magnitude of S21 (a), the phase of S21 (b), the magnitude of S11 (c) and the phase of S11 (d).
Electronics 13 02665 g004
Figure 5. Layout and geometrical parameters of typical circular RF inductor.
Figure 5. Layout and geometrical parameters of typical circular RF inductor.
Electronics 13 02665 g005
Figure 6. Proposed lumped model for spiral inductors in GaN technology on Si (Terminal 2 is the underpass of the inductor).
Figure 6. Proposed lumped model for spiral inductors in GaN technology on Si (Terminal 2 is the underpass of the inductor).
Electronics 13 02665 g006
Figure 7. Comparison between proposed geometrically scaled lumped model and EM simulations for three circular inductors: (a) inductor 2, (b) inductor 6 and (c) inductor 10.
Figure 7. Comparison between proposed geometrically scaled lumped model and EM simulations for three circular inductors: (a) inductor 2, (b) inductor 6 and (c) inductor 10.
Electronics 13 02665 g007
Figure 8. Microphotograph of inductor 7 test structure in adopted RF GaN technology.
Figure 8. Microphotograph of inductor 7 test structure in adopted RF GaN technology.
Electronics 13 02665 g008
Figure 9. Comparison between proposed geometrically scaled lumped model, EM simulation and on-wafer measurement for inductor 7.
Figure 9. Comparison between proposed geometrically scaled lumped model, EM simulation and on-wafer measurement for inductor 7.
Electronics 13 02665 g009
Table 1. Layout parameters of spiral inductors for model validation.
Table 1. Layout parameters of spiral inductors for model validation.
Inductors12345678910
w [μm]1010202040406060100100
n3.56.51.53.51.52.51.52.51.51.5
din [μm]6060220150120200290240100300
Table 2. Model errors of for low-frequency inductance, QMAX, and SRF.
Table 2. Model errors of for low-frequency inductance, QMAX, and SRF.
ErrorsMaximumMinimum
L @ 100 MHz9.2%1.7%
QMAX16.4%3.6%
SRF12.3%0.3%
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content.

Share and Cite

MDPI and ACS Style

Spataro, S.; Sapone, G.; Giuffrida, M.; Ragonese, E. A Geometrically Scalable Lumped Model for Spiral Inductors in Radio Frequency GaN Technology on Silicon. Electronics 2024, 13, 2665. https://doi.org/10.3390/electronics13132665

AMA Style

Spataro S, Sapone G, Giuffrida M, Ragonese E. A Geometrically Scalable Lumped Model for Spiral Inductors in Radio Frequency GaN Technology on Silicon. Electronics. 2024; 13(13):2665. https://doi.org/10.3390/electronics13132665

Chicago/Turabian Style

Spataro, Simone, Giuseppina Sapone, Marcello Giuffrida, and Egidio Ragonese. 2024. "A Geometrically Scalable Lumped Model for Spiral Inductors in Radio Frequency GaN Technology on Silicon" Electronics 13, no. 13: 2665. https://doi.org/10.3390/electronics13132665

APA Style

Spataro, S., Sapone, G., Giuffrida, M., & Ragonese, E. (2024). A Geometrically Scalable Lumped Model for Spiral Inductors in Radio Frequency GaN Technology on Silicon. Electronics, 13(13), 2665. https://doi.org/10.3390/electronics13132665

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop