# A Basic Design Tool for Grid-Connected AC–DC Converters Using Silcon Carbide MOSFETs

^{*}

## Abstract

**:**

## 1. Introduction

## 2. Design Procedures

#### 2.1. Input Filter Design Procedure

_{c}and L

_{g}represent the converter-side and grid-side inductors, respectively, and the filter capacitor, C

_{f}, is connected in series with the damping resistor, R

_{d}. The power stack is represented by a three-phase, two-level (2L) voltage-type inverter structure, which assumes the use of a three-phase, two-level or three-level (3L)-NPC converter in this paper.

_{g}is the grid-side current and v

_{c}is the output voltage at the converter side. The order-specific harmonics of the output voltage due to the switching of the converter can be calculated analytically [14]. With the limits of the target harmonic currents for each order, the input filter can be designed using the relationship in (1).

- Select system specifications and operating conditions:Select the grid voltage, grid frequency, converter type (2L or 3L-NPC), switching frequency, DC-link voltage, and rated current.
- Calculate ripple current and select converter side inductance:Set the converter-side ripple current limit. Select the limit value of the peak-to-peak amplitude of the current ripple relative to the rated current and calculate the converter-side inductor value that satisfies the ripple current according to the operating conditions. The peak-to-peak amplitude of the ripple current generated by the converter is determined by the operating conditions, and the instantaneous phase angle and can be expressed as (2) [18].$${i}_{pp}=\frac{{V}_{dc}{T}_{s}}{2{L}_{c}}r\left(m,\theta \right),$$
_{dc}is the DC-link voltage, T_{s}is the switching period, and r(m,θ) is a function of the voltage modulation index (m) and the output voltage phase angle (θ). The magnitude of the instantaneous current ripple depends on the phase angle, but the proposed method calculates the magnitude of the current ripple based on the output voltage at a phase angle of 90°. In general, the power factor of a grid-connected converter is close to unity, so the output voltage and current are almost in-phase, and the magnitude of the current flowing in the converter is maximized around 90 degrees. Therefore, when considering the maximum current flowing through the converter due to current ripple, it is appropriate to base the design on the value when the phase angle is 90°. The converter-side inductance (L_{c}) value that satisfies the magnitude of the ripple current can be selected by using (2). - Select capacitance and grid-side inductance:The larger the capacitor of the LCL filter, the better it can absorb the converter’s ripple current and reduce the harmonics of the grid-side current. However, the capacitor in the input filter introduces reactive power at the grid side and changes the grid side power factor. Typically, the reactive power flowing into the capacitor is limited to 2–5% of the apparent power in the design of the input filter [19]. The proposed design tool takes the reactive power value of the capacitor as input and selects the capacitor divisor of the corresponding filter. The formula for selecting the capacitance value is shown in (3).$${C}_{f}=\frac{S}{3\omega {V}_{ph}^{2}}R,$$
_{ph}is the phase voltage of the grid, and R is the ratio of the reactive power to the apparent power. In studies dealing with LCL filter design, the values of the grid-side inductance and the converter-side inductance are often chosen to be equal. This is because, when the resonant frequency of the LCL filter is first determined, equalizing the two inductance values results in the smallest magnitude of the total inductance [20], i.e., the harmonics of the grid current can be reduced the most with the same inductance value. However, in this paper, the filter is designed based on the ripple current on the converter side, not the current harmonics delivered to the grid. In the case of converters using SiC MOSFETs, the low-order harmonics that contribute most to the grid current harmonics can be significantly suppressed by current controllers, so the proposed method focuses more on the converter-side inductor in the total inductance used in the input filter. In this paper, the grid-side inductance is selected as one-third of the converter-side inductance. - Check the resonant frequency of the input filter:The resonant frequency (f
_{res}) of the input filter should be less than one-half of the sampling frequency (f_{s}) according to the Nyquist sampling theory, and it should be higher than the bandwidth (f_{b}) of the current controller to avoid affecting the current control behavior [21].$${f}_{b}<{f}_{res}<\frac{1}{2}{f}_{s}$$Finally, check whether the parameters of the input filter selected satisfies (4), and if not, adjust the capacitance value so that the resonant frequency satisfy the limitation of (4). - Select damping resistor:The LCL filter theoretically has zero impedance at its resonant frequency. The damping resistor is used to provide impedance at this time to suppress the oscillation of the current at the resonant frequency. For this purpose, the value of the damping resistor is designed to be similar to the impedance of the capacitor connected in series at the resonant frequency [22], and in this paper, it is selected as one-third of the impedance of the capacitor at the resonant frequency.$${R}_{d}=\frac{1}{3}\frac{1}{2\pi {f}_{res}{C}_{f}}$$

#### 2.2. Calculating Losses and Temperature Rise

_{ds}, R

_{d}, and V

_{f}

_{0}information in the datasheet, as shown in (6) and (7), respectively, and the switching losses of SiC MOSFETs are calculated using the datasheet loss data, as expressed in (8).

_{ds}is the equivalent resistance when the SiC MOSFET is turned on and R

_{d}and V

_{fo}are the equivalent resistance and threshold voltage when the diode is turned on, respectively. I

_{rms}is the rms value of the current flowing in each power semiconductor device, f

_{sw}is the switching frequency, s(θ) is duration when the current is flowing in that semiconductor device, I

_{avg}is the average current in the current flowing section, V

_{dc}is the DC-link voltage, V

_{test}is the test voltage indicated in the switching loss data in the datasheet, and E

_{on/off}is the loss function extracted from the on and off switching loss data in the datasheet. The gate resistance is inputted by the user and reflected in the determination of R

_{ds}and E

_{on}/

_{off}.

_{loss}, and the thermal resistance from the junction of the power semiconductor to the case, the thermal resistance from the case to the heat sink, and the thermal resistance from the heat sink to the atmosphere are denoted as R

_{th,jc}, R

_{th,ch}, and R

_{th,ha}, respectively. T

_{junction}, T

_{case}, T

_{heatsink}, and T

_{amb}represent the junction, case, heatsink, and ambient temperatures, respectively. The heat capacity of each part is not considered, but only steady-state losses and thermal resistance are considered to calculate the junction temperature. R

_{th,jc}and R

_{th,ch}use the datasheet values of the semiconductor device, and R

_{th,ha}of the heat sink can be entered to be used to calculate the temperature rise, as shown in (11).

#### 2.3. DC-Link Voltage, Current Ripple Calculations

_{C}of the 2L converter and i

_{C}

_{1}/i

_{C}

_{2}of the 3L-NPC converter in Figure 4) can be calculated analytically, as shown in (13) and (14), respectively [26,27]. Table 7 shows the detailed formulas for the parameters used in (14).

## 3. Design Examples

## 4. Simulation and Experimental Results

_{loss}and compared to T

_{heatsink}’s calculations and measurements. The heatsink model was calculated with a simple concentrated integer thermal resistance, and the temperature of three heatsinks near the power semiconductor was measured and averaged. For the 2L converter, the temperature rise difference between the design and experimental results is smaller, but for the 3L-NPC converter, the deviation is relatively larger. In the case of the 2L converter, the number of semiconductor devices and the size of the heat sink are smaller, so the heat transfer structure is simpler and more in line with the simple model in Figure 6, but in the case of the 3L-NPC converter, the placement structure of the power semiconductor devices and the heatsink is relatively more complex, which is estimated to cause a slight deviation from the model.

## 5. Conclusions

## Author Contributions

## Funding

## Data Availability Statement

## Conflicts of Interest

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**Table 1.**Current harmonic limits according to the IEEE 519 standard [15].

Maximum Harmonic Current Distortion in Percent of I_{L} | ||||||
---|---|---|---|---|---|---|

Individual Harmonic Order (Odd Harmonics) ^{a,b} | ||||||

I_{SC}/I_{L} | 3 ≤ h < 11 | 11 ≤ h < 17 | 17 ≤ h < 23 | 23 ≤ h < 35 | 35 ≤ h ≤ 50 | TDD |

<20 ^{c} | 4.0 | 2.0 | 1.5 | 0.6 | 0.3 | 5.0 |

20 < 50 | 7.0 | 3.5 | 2.5 | 1.0 | 0.5 | 8.0 |

50 < 100 | 10.0 | 4.5 | 4.0 | 1.5 | 0.7 | 12.0 |

100 < 1000 | 12.0 | 5.5 | 5.0 | 2.0 | 1.0 | 15.0 |

>1000 | 15.0 | 7.0 | 6.0 | 2.5 | 1.4 | 20.0 |

^{a}Even harmonics are limited to 25% of the odd harmonic limits above.

^{b}Current distortions that result in a dc offset, e.g., half-wave converters, are not allowed.

^{c}All power generation equipment is limited to these values of current distortion, regardless of the actual I

_{sc}/I

_{L}, where I

_{sc}= maximum short-circuit current at PCC. I

_{L}= maximum demand load current (fundamental frequency component) at PCC. TDD = total demand distortion (RSS), harmonic current distortion in % of maximum demand load current (15 or 30 min demand). PCC = point of common coupling.

**Table 2.**Odd harmonic current distortion limit in percent of rated current (I

_{rated})

^{a}according to IEEE 1547 [16].

Individual Odd Harmonic Order, h | h < 11 | 11 ≤ h < 17 | 17 ≤ h < 23 | 23 ≤ h < 35 | 35 ≤ h < 50 | Total Rated Current Distortion (TRD) |
---|---|---|---|---|---|---|

Percent (%) | 4.0 | 2.0 | 1.5 | 0.6 | 0.3 | 5.0 |

^{a}I

_{rated}= the DER unit rated current capacity (transformed to the RPA when a transformer exists between the DER unit and the RPA).

**Table 3.**Even harmonic current distortion limit in percent of rated current (I

_{rated})

^{a}according to IEEE 1547 [16].

Individual Even Harmonic Order, h | h = 2 | h = 4 | h = 6 | 8 ≤ h < 50 |
---|---|---|---|---|

Percent (%) | 1.0 | 2.0 | 3.0 | Associated range specified in Table 2 |

^{a}I

_{rated}= the DER unit rated current capacity (transformed to the RPA when a transformer exists between the DER unit and the RPA).

Operating Area | (1) | (2) | (3) | (4) | |
---|---|---|---|---|---|

2L | conduction path | T1 or T2 | |||

switching loss | T2 | T1 | T2 | ||

3L-NPC | conduction path | T1, T2 or T3, D6 | T1, T2 or D5, T2 | D5, T2 or T3, T4 | T3, T4 or T3, D6 |

switching loss | T3 | T1 | T2 | T4 |

conduction loss | T1, T2 | $\frac{{R}_{ds}{I}^{2}}{4}$ |

switching loss | T1, T2 | ${f}_{sw}\frac{1}{2}\frac{{V}_{dc}}{{V}_{test}}{E}_{on/off}\left(\frac{2I}{\pi}\right)$ |

conduction loss | T1, T4 | $\frac{{R}_{ds}M{I}^{2}}{3\pi}\left(1+co{s}^{2}\phi \right),M=\frac{V}{0.5\times {V}_{dc}}$ |

T2, T3 | $\frac{{R}_{ds}{I}^{2}}{4}$ | |

D5, D6 | $\frac{I}{12\pi}\left[{V}_{f0}\left\{12+3M\left(\left(2\varphi -\pi \right)cos\varphi -2sin\varphi \right)\right\}+{R}_{ds}I\left\{3\pi -4M\left({\mathrm{cos}}^{2}\varphi \right)\right\}\right]$ | |

switching loss | T1, T4 | ${f}_{sw}\frac{\pi -\varphi}{2\pi}\frac{{V}_{dc}}{{V}_{test}}{E}_{on/off}\left(\frac{I}{\pi -\varphi}\left(cos\varphi +1\right)\right)$ |

T2, T3 | ${f}_{sw}\frac{\varphi}{2\pi}\frac{{V}_{dc}}{{V}_{test}}{E}_{on/off}\left(\frac{I}{\varphi}\left(1-cos\varphi \right)\right)$ |

m_{a} | β | A | B | C | D |
---|---|---|---|---|---|

$0\le {m}_{a}\le \frac{1}{2}$ | - | $\frac{2}{3}$ | 1 | 0 | 0 |

$\frac{1}{2}<{m}_{a}\le \frac{\sqrt{3}}{3}$ | $arcsin\left(\frac{1}{2{m}_{a}}\right)-\frac{\pi}{3}$ | $\frac{\pi}{3}-2sin\left(\frac{\pi}{6}-\beta \right)-\frac{2}{3}cos3\beta $ | $1-2sin\left(\frac{\pi}{6}-\beta \right)$ | $sin\left(\frac{\pi}{3}-2\beta \right)$ | $\frac{\pi}{6}-\beta $ |

$\frac{\sqrt{3}}{3}<{m}_{a}\le 1$ | $\frac{\pi}{3}-arcsin\left(\frac{1}{2{m}_{a}}\right)$ | $\frac{\pi}{3}-2sin\left(\frac{\pi}{6}+\beta \right)-\frac{2}{3}cos3\beta $ | $1-2sin\left(\frac{\pi}{6}+\beta \right)$ | $sin\left(\frac{\pi}{3}+2\beta \right)$ | $\frac{\pi}{6}-\beta $ |

Case 1 | Case 2 | Case 3 | Case 4 | |
---|---|---|---|---|

topology | 2L | 2L | 3L-NPC | 3L-NPC |

capacity [kVA] | 10 | 10 | 10 | 10 |

power factor | 0.99 | 0.99 | 0.99 | 0.99 |

input voltage/ dc-link voltage [V] | 380/740 | 380/740 | 380/740 | 380/740 |

power semiconductor | C3M0032120K | C3M0032120K | C3M0060065K, E3D30065D | C3M0060065K, E3D30065D |

switching frequency [kHz] | 50 | 50 | 50 | 50 |

current ripple ratio [%] | 22 | 33 | 10 | 20 |

voltage ripple ratio [%] | 1 | 1 | 1 | 1 |

Case 1 | Case 2 | Case 3 | Case 4 | |
---|---|---|---|---|

converter side inductance (L_{c}) [μH] | 387 | 258 | 194 | 97 |

grid side inductance (L_{c}) [μH] | 129 | 86 | 65 | 32 |

filter capacitance (C_{f}) [μF] | 6.1 | 6.1 | 6.1 | 6.1 |

damping resistance (R_{d}) [Ω] | 1.3 | 1 | 2 | 1.3 |

minimum dc-link capacitance [μF]/[A] | 7.9/9.2 | 7.9/9.2 | 6.2/7.3 | 6.2/7.3 |

Case 1 | Case 2 | Case 3 | Case 4 | ||
---|---|---|---|---|---|

current ripple [A] | design value | 4.8 | 7.2 | 2.2 | 4.3 |

experimental results | 4.0 | 7.1 | 2.8 | 5.6 | |

THD [%] | experimental results | 2.44 | 2.4 | 2.7 | 2.3 |

temperature rise [K] | design value | 14.2 | 14.2 | 12.7 | 12.7 |

experimental results | 13.7 | 14.2 | 8.5 | 10.7 |

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**MDPI and ACS Style**

Kim, M.; Yun, H.-J.
A Basic Design Tool for Grid-Connected AC–DC Converters Using Silcon Carbide MOSFETs. *Electronics* **2023**, *12*, 4828.
https://doi.org/10.3390/electronics12234828

**AMA Style**

Kim M, Yun H-J.
A Basic Design Tool for Grid-Connected AC–DC Converters Using Silcon Carbide MOSFETs. *Electronics*. 2023; 12(23):4828.
https://doi.org/10.3390/electronics12234828

**Chicago/Turabian Style**

Kim, Myoungho, and Hyeok-Jin Yun.
2023. "A Basic Design Tool for Grid-Connected AC–DC Converters Using Silcon Carbide MOSFETs" *Electronics* 12, no. 23: 4828.
https://doi.org/10.3390/electronics12234828