A Single-Stage Bimodal Transformerless Inverter with Common-Ground and Buck-Boost Features

Abstract

This paper proposes a single-phase, single-stage common-ground inverter with a non-electrolytic capacitor and buck-boost ability. The proposed single-stage inverter is employed by a boost stage DC-DC converter and bimodal circuit, which makes it satisfactory for PV systems with a wide input voltage range and lower switch voltage stress. The leakage current of the proposed single-stage inverter can effectively suppress because the parasitic capacitor between the PV panel and the ground is shortened. In addition, the proposed single-stage inverter does not include electrolytic capacitors, which reduces the equivalent series resistance of electrolytic capacitors and also the size of the inverter system. The topology, operating principle, and PWM control method of the proposed single-stage inverter are given. The design guidelines of components and comparative studies of the proposed single-stage inverter are provided. A 500 W laboratory prototype of the proposed single-stage inverter is built to verify the correctness of the simulation and theoretical analysis.

1. Introduction

Nowadays, the issue of energy is becoming a major concern for the speedy development of human society. The over-exploitation of traditional energy sources causes many environmental problems, which significantly affect the development of society. Therefore, a stable and environmentally friendly energy needs to be researched and developed. Renewable energy sources have been widely used in the world; among them, solar energy has many advantages in terms of reserves, environmental protection, and ease of development [1,2,3,4,5]. As a fundamental component of solar energy production, photovoltaic (PV) inverter has attracted the interest of many scholars. According to the structure of the inverter, PV inverters can be divided into isolated and non-isolated types. Due to the transformer’s high impedance characteristic, the common-mode (CM) leakage current in the isolating inverter is effectively blocked. However, transformers have disadvantages such as substantial volume, difficult installation, high price, and even high electromagnetic interference (EMI). Therefore, non-isolated inverters without transformers draw progressive attention [6] due to their simple structure, high efficiency, and low price. Single-stage non-isolated inverters are a popular and greatly improved power conversion solution for power conversion efficiency since there is no additional power processing stage and transformer loss. Nevertheless, it also causes problems such as CM leakage current and changing voltage capability [7,8,9,10,11,12,13,14].

The high leakage current value will cause the shutdown of the PV system, poor quality of grid current, and personal safety problems [15,16], so leakage current elimination is always an important issue of non-isolated PV inverters. Theoretically, the leakage current can be suppressed by changing the control method to decoupling the dc side and the ac side or creating generating constant common-mode voltage, such as the structures proposed in [17,18]. Also, the mid-point clamping technique clamps the ac output of the inverter to the mid-point of the dc bus, which is also considered a method to suppress leakage current. However, this method requires more capacitors on the dc busbar side; the value of the capacitor needs to be considered to balance the voltage across the capacitors. Besides the above limitation, this method also leads to the problem of grid-connected current dc injection. Therefore, complex control algorithms are required [19,20,21]. The solutions mentioned above can only ensure that the leakage current is as small as possible compared to the allowable standard. Nevertheless, since PV systems are installed outdoors, weather factors such as temperature and humidity cause a change to the grounded parasitic capacitor of the PV array, which can easily cause excessive leakage current and system safety problems [18]. Another method to improve the leakage current suppression effectively, this method is realized by directly connecting the negative rail of the PV and the grid neutral, which can directly short the parasitic capacitor. Consequently, the leakage current can be eliminated effectively. The virtual dc bus [22], flying capacitor [23], and charge pump circuit [24] inverters have good leakage current suppression, but they can only perform in buck condition. To extend the input voltage range, it is necessary an additional dc-dc converter.

Besides, the half-bridge impedance source inverter introduced in [25] uses only two switches but requires two input sources, and there are too many inductors and diodes in this structure. The inverter proposed in [26] has buck-boost and suppress leakage currents features with only three switches, but it uses too many magnetic components. The three-switch inverter reported in [27] has the same number of switches as the inverter in [26] but high voltage stress on components. The single-phase, single-stage buck-boost inverter [28,29] is implemented with the common-ground feature. However, five power switches are required, and three of them are operated at high switching frequencies. A flying inverter is proposed in [30], using five switches, with two of them operating at high frequency. However, having three devices conduct at the same time reduces efficiency. The structure introduced in [31], using six switches and an inductor, can eliminate the leakage current by the common grounding. Nevertheless, two input sources are required. Furthermore, using ac switches easily makes open-circuit and short-circuit problems. The inverter introduced in [32] can limit leakage current by active virtual ground but not completely suppress it. In [33], the structure uses five switches, of which four are ac switches, four inductors, and four diodes. Moreover, the voltages stress across components is relatively high, so the loss of the inverter is high. In [34], a bimodal transformerless inverter (BTI) with a common ground feature is presented. The BTI has a simple structure and achieves high efficiency, but this structure only operates when the output voltage is less than the input voltage. In order to extend the range of the input voltage, a boosting stage needs to be added. However, the conventional two-stage BTI requires a large DC-link capacitor. This paper presents a proposed single-stage BTI, which reduces the DC-link capacitor size and the voltage stress on the components, thereby increasing the system’s efficiency.

2. Principle Buck-Boost Bimodal Transformerless Inverter

2.1. Circuit Description

Figure 1 illustrates the circuit structure of the proposed single-stage buck-boost BTI (BB-BTI) with common-ground characteristics. A basic boost dc-dc converter is used to produce the single-polarity rectified sinusoidal voltage in the boost mode, and a BTI circuit is used to produce a sinusoidal voltage in the buck mode. The conventional boost dc-dc converter is built mainly by the power switches S₁, the diode D₁, and the inductor L₁. The BTI includes the power switches S₂, S₃, and S₄, the capacitor C₂, and the inductor L₂. L_f and C_f filter the voltage ripple of output voltage v_o.

The operation principles of two-stage and single-stage BB-BTI are different. In a conventional two-stage BB-BTI, the switch S₁ always operates at high frequency with the constant duty cycle so that the voltage on the DC-link capacitor is maintained at a set voltage value, which requires that the DC-link voltage is always greater than the output voltage. In addition, maintaining a constant DC-link voltage at high voltage requires a large capacitance value, which increases the DC-link capacitor’s size. In a proposed single-stage BB-BTI, the switch S₁ only operates at high frequency when the input voltage is lower than the output voltage, the difference between the duty ratio of switch S₁ in the proposed single-stage BB-BTI is constant, and in conventional two-stage BB-BTI is variant.

2.2. Operation Principles

Figure 2 illustrates the key waveforms of the PWM strategy and control signals when the proposed single-stage BB-BTI operates with an input voltage V_in lower than the utility sine wave v_o, where V_o is the magnitude of the voltage v_o, V_in depicts the input voltage, V_C1 is the voltage across capacitor C₁, and v_ab is the inverter output voltage. In Figure 2a, the voltage across capacitor C₁ is a straight line. In Figure 2b, the voltage of capacitor C₁ is equal to the input voltage V_in and only varies between θ₁ and θ₂.

Besides, the states of S₁ and S₂ in Figure 2a change in the full cycle, while the state of S₁ in Figure 2b changes only from θ₁ to θ₂, and S₂ is kept ON from θ₁ to θ₂. The state of S₄ in Figure 2a change from 0 to π, while the state of S₄ in Figure 2b is kept OFF from θ₁ to θ₂.

The operating modes of the proposed single-stage BB-BTI can be divided into three modes, which include boost, buck, and buck-boost modes. The operating states of the proposed single-stage BB-BTI are shown in Figure 3.

• Boost mode (θ₁–θ₂):

The states in boost mode are shown in Figure 3a,b. In this mode, the inductor is stored energy by the high-frequency operation of switch S₁. The switches S₂ and S₃ are ON, and switch S₄ is OFF. As can be seen in Figure 2b, the voltages across capacitor C₁ have a curve shape, which has a peak value equal to the peak of the voltage v_o. The inductor L₂ current and capacitor C₂ voltage are zero.

• State 1 (Figure 3a):

The switch S₁ is ON. The diode D₁ is reverse-biased. The inductor L₁ is stored energy from the voltage V_in, and the current i_L1 increases. The switches S₂ and S₃ are ON, and switch S₄ is OFF. The capacitor C₁ transferred energy to the load through switches S₂ and S₃, and L_f. The equations in this state can be written as:

$$\left\{\begin{array}{c}{L}_1\frac{d{i}_{L1}}{dt}=V_{in}\\ L_2\frac{d{i}_{L2}}{dt}=-v_{C2}\\ L_f\frac{d{i}_{Lf}}{dt}=v_{C1}-v_o\end{array}\right.$$

(1)

$$\left\{\begin{array}{c}{C}_1\frac{d{v}_{C1}}{dt}=-i_{Lf}\\ C_2\frac{d{v}_{C2}}{dt}=i_{L2}\\ C_f\frac{d{v}_{Cf}}{dt}=i_{Lf}-i_o\end{array}\right.$$

(2)

• State 2 (Figure 3b):

The switches S₁ and S₄ are OFF. Inductor L₁ and source connected in series. The diode D₁ is forward-biased. The capacitor C₁ and output load are supplied from inductor L₁ and the input source. The voltage across the capacitor C₁ is higher than the source voltage because of the additional voltage from the inductor L₁, the current i_L1 decreases. The related equations are as follows:

$$\left\{\begin{array}{c}{L}_1\frac{d{i}_{L1}}{dt}=V_{in}-v_{C1}\\ L_2\frac{d{i}_{L2}}{dt}=-v_{C2}\\ L_f\frac{d{i}_{Lf}}{dt}=v_{C1}-v_o\end{array}\right.$$

(3)

$$\left\{\begin{array}{c}{C}_1\frac{d{v}_{C1}}{dt}=i_{in}-i_{Lf}\\ C_2\frac{d{v}_{C2}}{dt}=i_{L2}\\ C_f\frac{d{v}_{Cf}}{dt}=i_{Lf}-i_o\end{array}\right.$$

(4)

By considering the volt-second balance of inductors. v_C1, v_C2 is calculated as follows:

$$\left\{\begin{array}{c}{v}_{C1}=\frac{V_{in}}{1-d_{Bo}}\\ v_{C2}=0\end{array}\right.$$

(5)

The output voltage in this mode is given as follows:

$$v_o=\frac{V_{in}}{1-d_{Bo}}$$

(6)

where d_Bo denotes the duty cycle of switch S₁.

• Buck mode (0–θ₁ and θ₂–π):

The states in Buck mode are shown in Figure 3b,d. The diode D₁ is forward-biased, and the switch S₁ is completely OFF. The voltages on C₁ are equal to the input voltage. Both S₂ and S₄ operate at high-frequency. The current i_L2 and voltage v_C2 are zero.

• State 1 (Figure 3b):

In this case, the states of the switches are the same as state 2 in boost mode. However, the voltage of C₁ is equal to voltage V_in, and the voltage of L₁ is close to zero because switch S₁ is OFF and the ripple voltage of C₁ is small. The energy from the source is transferred to the output load. Switch S₄ is OFF, and the voltages on capacitor C₂ and inductor L₂ are zero. The equations in this state are similar to Equations (3) and (4).

• State 2 (Figure 3d):

In this state, switches S₁ and S₂ are OFF and switches S₃ and S₄ are ON. The voltage on capacitor C₁ is maintained at the input voltage through inductor L₁ and diode D₁, and the inverter output voltage is zero (v_ab = 0). The equations in this state can be derived as

$$\left\{\begin{array}{c}{L}_1\frac{d{i}_{L1}}{dt}=V_{in}-v_{C1}\\ L_2\frac{d{i}_{L2}}{dt}=-v_{C2}\\ L_f\frac{d{i}_{Lf}}{dt}=-v_{C2}-v_o\end{array}\right.$$

(7)

$$\left\{\begin{array}{c}{C}_1\frac{d{v}_{C1}}{dt}=i_{in}\\ C_2\frac{d{v}_{C2}}{dt}=i_{L2}+i_{Lf}\\ C_f\frac{d{v}_{Cf}}{dt}=i_{Lf}-i_o\end{array}\right.$$

(8)

By applying the volt-second balance on inductors L₁, L₂, one can obtain,

$$\left\{\begin{array}{c}{v}_{C1}=V_{in}\\ v_{C2}=0\end{array}\right.$$

(9)

The output voltage in this mode is given as follows:

$$v_o=d_{Bu}{V}_{in}$$

(10)

where d_Bu is the duty cycle of switch S₂ in the positive half cycle.

• Buck-Boost mode (π–2π):

In Figure 3c,d, the states in buck-boost mode are shown. In this mode, the diode D₁ is forward-biased, switch S₁ is completely OFF, while switch S₄ is completely ON. The voltages on C₁ are equal to the input voltage. Both switches, S₂ and S₃, operate at high-frequency. The capacitor C₂ is charged by the energy from inductor L₂. The voltage of C₂ is equal to the voltage v_o.

• State 1 (Figure 3c):

Switches S₁ and S₃ are OFF and switches S₂ and S₄ are ON. The diode D₁ is forward-biased, and the voltage of the capacitor C₁ is equal to the input voltage. The inductor L₂ is stored energy from the source and capacitor C₁. The capacitor C₂ discharges energy to the output load. The current through inductor L₂ increases linearly. The differential equations are obtained as

$$\left\{\begin{array}{c}{L}_1\frac{d{i}_{L1}}{dt}=V_{in}-v_{C1}\\ L_2\frac{d{i}_{L2}}{dt}=v_{C1}\\ L_f\frac{d{i}_{Lf}}{dt}=-v_{C2}-v_o\end{array}\right.$$

(11)

$$\left\{\begin{array}{c}{C}_1\frac{d{v}_{C1}}{dt}=i_{in}-i_{L2}\\ C_2\frac{d{v}_{C2}}{dt}=i_{Lf}\\ C_f\frac{d{v}_{Cf}}{dt}=i_{Lf}-i_o\end{array}\right.$$

(12)

• State 2 (Figure 3d):

This state is similar to state 2 in buck mode. However, in this state, the energy of the inductor L₂ is non-zero. The inductor L₂ supplies energy to the capacitor C₂ and the output load. The current i_L2 decreases linearly. The differential equations are obtained as

$$\left\{\begin{array}{c}{L}_1\frac{d{i}_{L1}}{dt}=V_{in}-v_{C1}\\ L_2\frac{d{i}_{L2}}{dt}=-v_{C2}\\ L_f\frac{d{i}_{Lf}}{dt}=-v_{C2}-v_o\end{array}\right.$$

(13)

$$\left\{\begin{array}{c}{C}_1\frac{d{v}_{C1}}{dt}=i_{in}\\ C_2\frac{d{v}_{C2}}{dt}=i_{L2}+i_{Lf}\\ C_f\frac{d{v}_{Cf}}{dt}=i_{Lf}-i_o\end{array}\right.$$

(14)

By applying the volt-second balance on inductors L₁ and L₂. The equations of this mode are derived as follows:

$$\left\{\begin{array}{c}{v}_{C1}=V_{in}\\ v_{C2}=V_o\end{array}\right.$$

(15)

The output voltage is given as follows:

$$v_o=\frac{d_{BB}{V}_{in}}{d_{BB}-1}$$

(16)

where d_BB is the duty cycle of switch S₂ in the negative half cycle.

The output voltage and the modulation index (M) of the proposed single-stage BTI are supposed to be

$$v_o=V_{o}sin\theta$$

(17)

$$M=\frac{V_o}{V_{in}}$$

(18)

As visualized in Figure 4. The resulting duty cycles of the proposed single-stage BTI are calculated based on (18) as

$$d_{Bo}=\left\{\begin{array}{c}0, 0<\theta \le {\theta }_1 and {\theta }_2<\theta \le 2\pi \\ 1-\frac{1}{Msin\theta },{\theta }_1<\theta \le {\theta }_2\end{array}\right.$$

(19)

$$d_{Bu}=\left\{\begin{array}{c}Msin\theta , 0<\theta \le {\theta }_1 and {\theta }_2<\theta \le \pi \\ 1,{\theta }_1<\theta \le {\theta }_2 \\ 0, \pi <\theta \le 2\pi \end{array}\right.$$

(20)

$$d_{BB}=\left\{\begin{array}{c} 0, 0<\theta \le \pi \\ \frac{Msin\theta }{Msin\theta -1},\pi <\theta \le 2\pi \end{array}\right.$$

(21)

The transition angles from boost mode to buck mode are given by

$$\left\{\begin{array}{c}{\theta }_1=si{n}^{-1}\left(\frac{1}{M}\right) \\ {\theta }_2=\pi -si{n}^{-1}\left(\frac{1}{M}\right)\end{array},M\ge 1\right.$$

(22)

From (19)–(21), the maximum values of the duty cycles can be calculated as follows:

$$D_{Bo.max}=\left\{\begin{array}{c}\frac{M-1}{M}, M>1\\ 0, M\le 1\end{array}\right.$$

(23)

$$D_{Bu.max}=\left\{\begin{array}{c}1, M\ge 1\\ M, M<1\end{array}\right.$$

(24)

$$D_{BB.max}=\frac{M}{M+1}$$

(25)

Figure 4 shows the d_Bo, d_Bu, and d_BB of BB-BTI for a peak output voltage of 156 V and an input voltage of V_in of 80 V. For v_o > V_in, d_Bo varies from 0 at v_o = 80 V to 0.487 at v_o = 156 V. For v_o < V_in, d_Bu varies from 0 at v_o = 0 V to 1 at v_o = 80 V, and for v_o < 0, d_BB varies from 0 at v_o = −156 V to 0.66 at v_o = −156 V.

3. Component Selection

3.1. Inductor

Regarding (2), (4), (8), (12), and (14), the inductor currents, i_L1 and i_L2, can be expressed as:

$$i_{L1}=\left\{\begin{array}{c}{i}_o{d}_{Bu},0<\theta \le {\theta }_1 and {\theta }_2<\theta \le \pi \\ \frac{i_o}{1-d_{Bo}}, {\theta }_1<\theta \le {\theta }_2\\ \frac{i_o{d}_{BB}}{d_{BB}-1}, \pi <\theta \le 2\pi \end{array}\right.$$

(26)

$$i_{L2}=\left\{\begin{array}{c}{i}_o\left(d_{Bu}-1\right),0<\theta \le {\theta }_1 and {\theta }_2<\theta \le \pi \\ 0, {\theta }_1<\theta \le {\theta }_2\\ \frac{i_o}{d_{BB}-1},\pi <\theta \le 2\pi \end{array}\right.$$

(27)

According to (20), (21), (26), and (27), the current of the inductors, L₁ and L₂, are given as follows:

$$i_{L1}=I_{o}Msi{n}^2\theta$$

(28)

$$i_{L2}=\left\{\begin{array}{c}{I}_{o}Msi{n}^2\theta -I_{o}sin\theta ,0<\theta \le {\theta }_1 and {\theta }_2<\theta \le 2\pi \\ 0, {\theta }_1<\theta \le {\theta }_2\end{array}\right.$$

(29)

The high-frequency inductor current ripple can be considered as follows:

$$∆i_{L1}=\frac{V_{in}{d}_{Bo}}{L_1{f}_s}$$

(30)

$$∆i_{L2}=\frac{V_{in}{d}_{BB}}{L_2{f}_s}$$

(31)

By replacing (19) and (21) with (30) and (31), we can also write

$$∆i_{L1}=\frac{\left(M-1\right)V_{in}}{M{L}_1{f}_s}$$

(32)

$$∆i_{L2}=\frac{M{V}_{in}}{\left(M+1\right)L_2{f}_s}$$

(33)

The final value of L₁, and L₂ are designed as:

$$L_1=\frac{\left(M-1\right)V_{in}}{M{f}_s∆i_{L1}}$$

(34)

$$L_2=\frac{M{V}_{in}}{\left(M+1\right)f_s∆i_{L2}}$$

(35)

3.2. Capacitor

Using (5), (9), and (15), the voltage of capacitors C₁ and C₂ can be derived

$$v_{C1}=\left\{\begin{array}{c}{V}_{in},0<\theta \le {\theta }_1 and {\theta }_2<\theta \le 2\pi \\ v_o, {\theta }_1<\theta \le {\theta }_2\end{array}\right.$$

(36)

$$v_{C2}=\left\{\begin{array}{c}0, 0<\theta \le \pi \\ v_o,\pi <\theta \le 2\pi \end{array}\right.$$

(37)

The ripple voltage of the capacitors C₁ and C₂ can be written as:

$$∆v_{C1}=\left\{\begin{array}{c}\frac{i_o{d}_{Bo}}{C_1{f}_s},v_o>0\\ \frac{i_o{d}_{BB}}{C_1{f}_s},v_o<0\end{array}\right.$$

(38)

$$∆v_{C2}=\frac{i_o{d}_{BB}}{C_2{f}_s}$$

(39)

Maximum values of Δv_C1 and Δv_C2 are achieved when d_BB = D_BB.max (θ = 3π/2). The capacitance of the capacitors can be expressed as:

$$∆v_{C1}=\frac{M{I}_o}{\left(M+1\right)C_1{f}_s}$$

(40)

$$∆v_{C2}=\frac{M{I}_o}{\left(M+1\right)C_2{f}_s}$$

(41)

The value of the capacitors C₁ and C₂ can be expressed as

$$C_1=\frac{M{I}_o}{\left(M+1\right)∆v_{C1}{f}_s}$$

(42)

$$C_2=\frac{M{I}_o}{\left(M+1\right)∆v_{C2}{f}_s}$$

(43)

3.3. Switches and Diode

The drain-source voltages of switches are given as follows:

$$\left\{\begin{array}{c}{V}_{S1}=V_{S4}=V_{D1}=V_o\\ V_{S2}=V_{S3}=V_{in}+V_o\end{array}\right.$$

(44)

The currents of switches are given as

$$\left\{\begin{array}{c}{I}_{S1}=I_{D1}=M{I}_o\\ I_{S2}=I_{S3}=\left(M+1\right)I_o\\ I_{S4}=\left(M+2\right)I_o\end{array}\right.$$

(45)

4. Comparison

4.1. Comparison with the Two-Stage Bimodal Inverter

Table 1. Comparison of conventional two-stage BB-BTI with the proposed single-stage BB BTI.

Voltage Stress	Conventional Two-Stage BB BTI	Proposed Single-Stage BB BTI
S1, S4	$\frac{1}{M\left(1-d_{Bo}\right)}{V}_o$	Vo
S2, S3	$\frac{1+M\left(1-d_{Bo}\right)}{M\left(1-d_{Bo}\right)}{V}_o$	$\frac{M+1}{M}{V}_o$
C1	$\frac{1}{M\left(1-d_{Bo}\right)}{V}_o$	Vo
C2	Vo	Vo

demonstrates the comparison between the conventional two-stage BB-BTI and the proposed single-stage BB-BTI. The proposed single-stage BB-BTI requires three small capacitors, while the conventional two-stage BB-BTI needs two small and one bulky capacitor. For a better comparison, the voltage stress for switches and capacitors is calculated. The specific results for M = 1.95 for conventional two-stage BB-BTI and proposed single-stage BB-BTI are shown in

Table 2. Comparison of conventional two-stage BB-BTI with the proposed single-stage BB-BTI with the same modulation index.

Voltage Stress	Two-Stage BB BTI (M = 1.95, dBo = 0.56)	Proposed Single-Stage BB BTI (M = 1.95, DBo.max = 0.487)
S1, S4	1.16Vo	Vo
S2, S3	2.16Vo	1.51Vo
C1	1.16Vo	Vo
C2	Vo	Vo

. From Table 2, the maximum voltage stress on switches of conventional two-stage BB-BTI equal 2.16V_o, while this stress is limited to 1.51V_o for the proposed single-stage BB-BTI. In addition, the voltage stress across capacitors of the conventional two-stage BB-BTI reaches to 1.16V_o, while this stress in the proposed single-stage BB-BTI is limited to V_o. Therefore, the proposed single-stage BB-BTI can be implemented with switches and capacitors of significantly lower voltage. Consequently, the costs are decreased in the proposed single-stage BB-BTI compared to the conventional two-stage BB-BTI.

4.2. Comparison with Other Buck-Boost Common-Ground Inverters

To show the potential of the proposed single-stage BB-BTI, a comparison with other inverters has been summarized in

Table 3. Comparison between the proposed single-stage BB-BTI and other common-ground transformerless inverters.

Topology	[23]	[30]	[31]	[32]	[33]	[29]	Proposed BB-BTI
Diodes	1	2	0	0	4	3	1
Switches	4	5	6	8	5	5	4
Capacitors	2	1	3	1	2	2	3
Inductors	1	2	1	2	4	3	3
Total Devices	8	10	10	11	15	13	11
Diodes stress	D1: Vin	D1: Vin + Vo D2: Vo	-	-	D1–D4: Vin + Vo	D1: Vo D2: Vin + Vo D3:Vo-Vin	D1: Vo
Switches stress	S1–S4: Vin	S1: Vin + Vo S2–S5: Vo	S1, S2: Vin S3–S6: Vin + Vo	S1–S4: Vin + Vo S5–S8: Vo	S1–S5: Vin + Vo	S1, S2: Vin + Vo S3–S5: Vo	S1, S4: Vo S2, S3: Vin + Vo
TSV	4Vin	1Vin + 5Vo	6Vin + 4Vo	4Vin + 8Vo	5Vin + 5Vo	2Vin + 5Vo	2Vin + 4Vo
PresentedEfficiency	99.2% @1kW	-	95.9% @0.4kW	95.7% @0.8kW	96.74% @0.4kW	97.1% @0.45kW	96.5% @0.5kW

. Comparison criteria such as the number of diodes, switches, capacitors, inductors, the total number of devices, voltage stress across diodes and switches, total standing voltage (TSV) [35] and the presented efficiency. The common-ground-type transformerless inverter in [23] has the least total number of devices, and the number of switches and diodes is equal to the proposed single-stage BB-BTI. However, this topology requires an input voltage greater than the output voltage. Besides, a large value capacitor is required to generate a voltage in the negative half of the output, which is also a disadvantage.

The inverters presented in [30,31] have the same total number of devices; the topology presented in [30] uses one more diode and one switch than the proposed single-stage BB-BTI. The single-stage bidirectional buck-boost inverters in [31] use only an inductor and do not use diodes, but two input sources or two large capacitors are required. In [32], the topology uses the most number of switches, there are four switches with voltage stress reaches (V_in + V_o), and two inductors are used. However, the leakage current is not completely eliminated. The topology presented in [33] uses the most diodes; the diodes and switches in this structure all have a voltage of (V_in + V_o), so the inverter loss is high. The topology presented in [29] includes two boost and one buck converter. However, this topology uses more than two diodes and one switch, which makes the total components of this topology much more than the proposed single-stage BB-BTI. In addition, the proposed single-stage BB-BTI has a lower TSV and efficiency compared to other studies. Through the comparison required in Table 3, the proposed single-stage BB-BTI has shown outstanding advantages such as the low number of components, small capacitors and buck-boost capability.

5. Simulation and Experimental Results

5.1. Simulation Results

Simulations were conducted using PSIM 9.1.1 (Troy, MI, USA) to verify the operation of the proposed single-stage BB-BTI. The parameters for the simulation are L₁ = 0.5 mH, L₂ = 0.3 mH, L_f = 0.3 mH, C₁ = 5 μF, C₂ = 5 μF, C_f = 2 μF, and R = 24 Ω. The output frequency and switching frequency are set at 50 Hz and 30 kHz, respectively. The forward voltage of diode D₁ is 1 V. The drain-to-source on-resistance of switches S₁ and S₄ are 25.5 mΩ, and for S₂, S₃ are 45 mΩ.

Figure 5 and Figure 6 show the simulation results when V_in = 80 V and V_in = 220 V, respectively. In Figure 5a and Figure 6a, the driving waveform of switches S₁–S₄ is shown. Figure 5b and Figure 6b show the voltages stress across switches S₁–S₄. Figure 5b and Figure 6b show the current of inductors L₁ and L₂ and the voltage across capacitors C₁ and C₂. In Figure 5d and Figure 6d, the waveforms in this figures are the voltage of diode D₁, the inverter output voltage, v_ab, the output voltage, v_o, and the output current, i_o.

5.2. Experiment Results

To further validate the proposed single-stage BB-BTI analysis and its control, a 500 W concept-proof laboratory prototype is illustrated in Figure 7 with the components detailed in

Table 4. Parameters for the experiment.

Parameter	Symbol	Value
Input voltage	Vin	80–220 V
Output voltage	vo	110 Vrms
Output frequency	fo	50 Hz
Switching frequency	fs	30 kHz
Output power	Po	500 W
Diode	D1	STTH6003 (300 V, 60 A, VF = 1 V)
Switches	S1, S4	IRFP4868PbF (300V, 70 A, Rdson = 25.5 mΩ)
	S2, S3	IPW60R045CPA (600 V, 60 A, Rdson = 45 mΩ)
Inductors	L1	0.5 mH
	L2, Lf	0.3 mH
Capacitors	C1, C2	5 µF
	Cf	2 µF

. The control platform is DSP F280049C. Chroma 61604 provides dc power. The input and output powers are measured by the WT230 Digital Power Meter. The output current harmonics are measured by Fluke 43 B. The load resistance of 25 Ω (where two resistors of 50 Ω in parallel) was used as the output load.

As shown in Figure 8, the experimental results with V_in = 80 V and the modulation index M = 1.95. Figure 8a indicates the voltage of the diode D₁ and the voltage of the switch S₁. Figure 8b shows the voltage of switches S₂, S₃, and S₄. The peak voltage of D₁, S₄, and S₁ are about 156 V. The peak voltages of S₂ and S₃ are about 235 V. Figure 8c illustrates the voltage of capacitors C₁ and C₂ and the current through the inductor L₁. The voltage stress of capacitors is about 155 V. The current through the inductor L₁ varies from 0 to 14 A, and the average current of the inductor L₁ is 6.1 A. Figure 8d shows the output voltages v_ab, v_o, and current through the inductor L₂. The THD values of the output voltage v_o are 1.82%. The average current through the inductor L₂ is 5.02 A, and the peak current is about 22 A.

Figure 9 shows the experimental results with V_in = 220 V, corresponding to the modulation index M = 0.71. As shown in Figure 9a,b, the voltage stress on S₁ and S₄ is equal to the input voltage. The voltage stress on S₂ and S₃ is equal to the sum of the input and output voltages. Figure 9c shows the voltage of capacitors C₁ and C₂ and the current through the inductor L₁. The average current of the inductor L₁ is 2.35A. As indicated in Figure 9d, the output voltages v_ab, v_o, and current through the inductor L₂. The THD value of the output voltage v_o is 1.1%. The average current through the inductor L₂ is 2.32 A, and the peak current is about 16 A.

As indicated in Figure 10, the efficiency of the proposed single-stage BB-BTI in case of input voltage at 80 V and 220 V, the output voltage is considered at 110 Vrms. The efficiency results show that the efficiency when the input voltage is 80 V is lower than the input voltage of 220 V. The peak efficiencies are 96% and 96.5% at 80 V and 220 V, respectively.

The distribution of power loss of the proposed single-stage BB-BTI based on the parameters shown in Table 4 is shown in Figure 11.

6. Conclusions

This paper presented the proposed single-phase, single-stage BB-BTI. The proposed inverter provides common ground and buck-boost capability. Compared with the conventional two-stage BB-BTI, the proposed single-stage BB-BTI has lower voltage stress on the switches and capacitors. Furthermore, the switching operation in the proposed single-stage BB-BTI is significantly less than in conventional two-stage BB-BTI, thereby improving efficiency and reducing filter inductor. The circuit does not contain an electrolytic capacitor, which reduces the volume and improves the life of the inverter. Mathematical analysis, design consideration, and comparison with existing common-ground single-phase inverters were performed. Finally, the simulation and experimental results were presented to confirm the performance of the proposed single-stage BB-BTI.