1. Introduction
Low-density parity-check (LDPC) codes [
1] have been widely applied to diverse applications, such as wireless communication and data storage systems [
2,
3], due to their capability of approaching the capacity under iterative message passing decoding [
4]. Many researchers have devoted to developing efficient LDPC decoders [
5,
6,
7] to achieve a trade-off between the error rate performance and decoding complexity.
Recently, a class of finite alphabet iterative decoders (FAIDs) [
8,
9,
10,
11,
12,
13,
14,
15,
16] have drawn much attention due to their excellent performance by using coarsely quantized messages. Due to the use of messages quantized by a low bit width, these FAIDs also achieve a low decoding complexity and are in favor of services and applications such as the Internet of things [
17] and wireless sensor networks [
18,
19,
20], which require strict power constraint for the devices. Different from the conventional LDPC decoders such as [
5], these FAIDs exchange the messages represented by symbols from finite alphabets between the variable nodes (VNs) and the check nodes (CNs). Moreover, they utilize lookup tables (LUTs) with single input to carry out the node updates. These LUTs are carefully designed based on the density evolution (DE) [
4] with a selected coarse quantization scheme, which aims to maximize the mutual information (MI) between the coded bits and the exchanged messages within the decoders. We hereby call this type of FAIDs the mutual-information-maximizing FAIDs (MIM-FAIDs). More specifically, the MIM-FAIDs [
8,
9,
10,
12,
14,
15] implement the coarse quantization scheme by dynamic programming (DP) [
21], which has been proved to be optimal with respect to maximizing MI. In [
11,
13], the LUTs of the MIM-FAIDs are designed based on the information bottleneck (IB) method, which makes use of machine learning rather than DP in the design process. Furthermore, the MIM-FAID proposed in [
16] constructs the LUTs by using a hierarchical dynamic quantization which is a greedy quantization scheme similar to the IB method and requires less computational complexity compared to DP. In addition, there are two different node updating architectures considered by the above MIM-FAIDs. One is designing multiple sets of concatenated two-input LUTs for decoding, e.g., [
8,
11,
12], where each set of LUTs is dedicated to updating the nodes of a specific degree at each iteration. However, the concatenated LUTs only focus on maximizing MI between two consecutive tables after quantization and hence lead to a loss of MI, which may deteriorate the decoder performance. Moreover, the memory requirement for storing the LUTs may be intolerable because the number of LUTs increases significantly when the node degree or the decoding iteration becomes large. To reduce the memory demand and preserve more MI after quantization, the MIM-FAIDs were proposed in [
9,
10,
14,
15,
16], which performed the node updates following a reconstruction–calculation–quantization architecture. Specifically, the FAID in [
16] utilizes real additions and multiple sets of single-input LUTs with real-valued entries to update all nodes of different degrees. The mutual-information-maximizing (MIM) quantized decoders in [
9,
10,
14,
15] adopt integer additions and the LUTs of integer entries for practical consideration.
To accelerate the convergence speed, some MIM-FAIDs, i.e., [
13,
15,
16], further consider either a layered schedule [
22] or a shuffled schedule [
23]. For example, the layered MIM-FAID [
13] is designed by the IB method for decoding the regular LDPC codes. The LUTs of the FAID in [
16] are constructed based on the layered schedule with a high-precision uniform channel quantizer. The MIM quantized shuffled min-sum (MIM-QSMS) decoder was proposed in [
15], which designs the LUTs by considering the shuffled decoding schedule. All of these MIM-FAIDs with different decoding schedules, e.g., [
15,
16], are designed for a particular LDPC code with a fixed code rate, which cannot be used to decode LDPC codes with different code rates. However, the rate-compatible quasi-cyclic LDPC (RC-QC-LDPC) codes are preferred in many practical applications such as data storage systems [
24,
25]. An LDPC decoder that fails to support rate compatibility may incur a high complexity for hardware implementations. Although the rate-compatible MIM-FAIDs were investigated in [
11,
14], they were only designed based on the flooding schedule [
26]. Therefore, how to design the MIM-FAID with a layered/shuffled schedule for LDPC codes with different code rates is still a challenging problem.
In this paper, we develop an MIM-QSMS decoder for decoding RC-QC-LDPC codes, which is referred to as the rate-compatible MIM-QSMS (RC-MIM-QSMS) decoder. Compared to other MIM-FAIDs in the literature, our proposed RC-MIM-QSMS decoder integrates the shuffled decoding schedule and the rate compatibility in a single round of the LUT design process. To the best of our knowledge, this is the first design for the FAID to support the rate compatibility with a shuffled schedule. In particular, we modify the DE in [
15] and propose the shuffled MIM-DE (SMIM-DE) by considering the weighted expectation of the probability mass functions (pmfs) and the joint degree distributions. Based on the SMIM-DE, we are able to construct LUTs that vary with different layers and iterations for decoding RC-QC-LDPC codes. Moreover, an LUT optimization method is further proposed to generate a unique set of LUTs that only vary with decoding iterations. In this way, the memory requirement for storing the LUTs can be significantly reduced. We conduct a comprehensive evaluation on the proposed RC-MIM-QSMS decoder in terms of the error rate performance, the convergence speed, and the memory requirement for decoding. We demonstrate that the proposed RC-MIM-QSMS decoder surpasses the floating-point shuffled belief propagation (SBP) decoder [
23] in the high signal-to-noise (SNR) region and has comparable convergence speed to other state-of-the-art MIM-FAIDs. More importantly, the RC-MIM-QSMS decoder can save up to
memory requirement compared to the benchmark MIM-FAIDs.
The rest of this paper is organized as follows.
Section 2 provides the preliminaries of this work including the notations, the QC-LDPC codes, the shuffled min-sum (SMS) decoder [
27], and the decoding framework of the MIM-QSMS decoder [
15]. The proposed SMIM-DE and the LUT optimization method for designing the RC-MIM-QSMS decoder are illustrated in
Section 4. In
Section 5, we evaluate the proposed RC-MIM-QSMS decoder from the aspects of the error rate performance, the convergence speed, and the memory usage for implementing decoding.
Section 6 concludes this paper.
5. Simulation Results and Discussion
In this section, we evaluate the performance of the proposed RC-MIM-QSMS decoder with respect to the frame error rate, the convergence speed, and the memory requirement via Monte-Carlo simulations. Moreover, we also include the performance of the floating-point SBP decoder [
23], the conventional QSMS decoder [
27], the rate-compatible FAID (RC-FAID) decoder with flooding schedule [
11], the rate-compatible MIM quantized min-sum (RC-MIM-QMS) decoder [
14]
, and the RD-MIM-QSMS decoder [
15] for comparison. We denote the bit width settings of the exchanged messages (
) and the a posteriori message (
) of different LDPC decoders by (
,
), and the floating-point precision is represented by “
∞”.
We adopted a BPSK modulation and assumed the LDPC codewords were transmitted over the AWGN channels. We considered two types of LDPC codes which have moderate and short block lengths, respectively. One was the length-1296 LDPC codes adopted in the IEEE 802.11n standard [
30] with code rates
,
, and
, respectively. Another was the 5G LDPC codes constructed from a base graph one with lifting size 26 with code rates
,
, and
after rate matching [
31].
Table 1 and
Table 2 show the degree distributions of the simulated codes and the design noise standard deviation (
) for the associated MIM-QSMS decoder, respectively. Note that we designed the RC-FAID decoder based on DP [
21] rather than the information bottleneck method [
11] because DP proved to be optimal for maximizing MI. At least 300 error frames were collected at each simulated SNR. In addition, we set
for the conventional QSMS decoder and
for all decoders.
5.1. FER Performance
Figure 2 shows the FER performance of different decoders for the length-1296 IEEE 802.11n LDPC codes with code rates
,
, and
. We can see that the proposed RC-MIM-QSMS decoder achieves almost the same FER compared to its rate-dependent counterparts for the same bit width settings and the same LDPC codes. Moreover, the (
)-RC-MIM-QSMS decoder can outperform the (
)-QSMS decoder by at least
dB and approaches the performance of the (
∞)-SBP decoder within
dB. In addition, the (
)-RC-MIM-QSMS decoder also surpasses both the RC-MIM-QMS decoder
and the RC-FAID decoder with the same bit width settings at most
dB for all simulated codes. With the (
) bit width settings, the RC-MIM-QSMS decoder has an FER performance close to the (
)-QSMS decoder for code rate
and even outperforms the (
)-QSMS decoder for code rates
and
. Compared to the (
)-RC-FAID decoder, the (
)-RC-MIM-QSMS decoder achieves a performance gain of at least
dB for all code rates.
Figure 3 depicts the FER performance of different decoders for the 5G LDPC codes with lifting size 26 and code rates
,
, and
. As shown by the figure, the proposed (
)-RC-MIM-QSMS decoder achieves almost the same FER compared to its rate-dependent counterparts for the same simulated code rates. Furthermore, the (
)-RC-MIM-QSMS decoder performs better than the (
)-QSMS decoder by up to
dB and approaches the performance of the (
∞)-SBP decoder within
dB. With the (
) bit width settings, the proposed RC-MIM-QSMS decoder also outperforms both the RC-MIM-QMS decoder
and the RC-FAID decoder by at least
dB for all simulated code rates.
In the high SNR region, the proposed RC-MIM-QSMS decoder even shows slightly better error floor performance compared to the (
∞)-SBP decoder for both the 802.11n LDPC codes and the 5G LDPC code. This is because there are degree-two VNs in the Tanner graphs of the simulated codes, which results in trapping sets due to the cycles being confined among these degree-two VNs [
32]. These trapping sets become the most harmful objects and cause error floor in the high SNR region for the BP decoder. Similar phenomena are also observed in the literature [
8,
10,
14,
15,
16], which show that the MIM quantization schemes can assist to mitigate the negative impact of certain harmful objects in the code structure.
5.2. Convergence Speed Analysis
Apart from the FER performance, the convergence speed is another critical factor to assess the decoding latency. Define the average number of iterations required for decoding one codeword as
. In
Table 3, we compared the convergence speed of different quantized decoders with
for the 802.11n LDPC codes in perspective of
. It can be seen that the proposed RC-MIM-QSMS decoder outperforms both the RC-FAID decoder and the RC-MIM-QMS decoder for all simulated code rates by reducing
up to
. The RC-MIM-QSMS decoder also achieves up to
less
than the conventional QSMS decoder in the low-to-moderate SNR region. We observe that
of the proposed RC-MIM-QSMS decoder is up to
less than the RD-MIM-QSMS decoder for the rate-
802.11n LDPC code, and it slightly increases compared to the RD-MIM-QSMS decoder for the simulated LDPC codes with code rates
and
. This is because the proposed RC-MIM-QSMS decoder is designed based on the joint degree distributions, which considers a larger portion of high-degree VNs with respect to the individual degree distributions of the rate-
802.11n LDPC code. However, compared to the individual degree distributions of both rate-
and rate-
802.11n LDPC codes, there are a large portion of low-degree VNs considered by the joint degree distributions. The high-degree VNs lead to a faster convergence speed and the low-degree VNs have a slower convergence speed. Therefore, the proposed RC-MIM-QSMS decoder requires less
for lower code rates and more
for higher code rates compared to its rate-dependent counterparts.
Table 4 demonstrates the
of different quantized decoders with
for the 5G LDPC codes. We can see that the proposed RC-MIM-QSMS decoder achieves less
for all simulated code rates by at least
in the moderate-to-high SNR region. Compared to the conventional QSMS decoder, the RC-MIM-QSMS decoder can reduce
by up to
for the rate-
5G LDPC code. Similar to the case of the 802.11n LDPC codes, we also observe the phenomenon that
of the proposed RC-MIM-QSMS decoder has a minor reduction compared to the RD-MIM-QSMS decoder for the rate-
5G LDPC code while it increases slightly for the code rates
and
.
5.3. Memory Requirement
We further investigated the overall memory requirement of the proposed RC-MIM-QSMS decoder and compare it to that of different quantized LDPC decoders. Here, we considered the decoders that are implemented based on software-defined radios or digital signal processors so that the LUTs are stored in memories [
11]. We divided the memory into two types according to their usage, i.e., the memories for arithmetic calculation and those for storing the LUTs. For the conventional QSMS decoders, all
-bit V2C messages need to be stored for the arithmetic calculation of the node updates at each iteration [
27], while the RC-FAID decoder with flooding schedule uses the memories for arithmetic calculation to store two
-bit C2V messages for each CN and one a posteriori message of
bit width for each VN per iteration. Note that we considered the parity-check matrix of the rate-
802.11n LDPC code to evaluate the maximum memory requirement for arithmetic calculation since it had the largest size among all simulated codes. Moreover, we assumed that the memories for arithmetic calculation could be reused between two consecutive iterations for improving efficiency. On the other hand, the memory requirement for storing one LUT could be computed by
in bytes, where
E is the number of entries in one LUT, and
refers to the maximum bit width of an entry. According to [
11], at each iteration, the RC-FAID decoder requires
cascaded LUTs for updating the VNs of different degrees and one LUT for message alignment process. Since the RC-FAID decoder exchanges
-bit messages within the decoder and adopts two-input LUTs, we had
for each LUT and
. In addition, there was one extra LUT of
at each iteration for making the hard decision. For the two MIM-QSMS decoders with
, all LUTs had a single input so that there were two reconstruction LUTs of size
and one quantization LUT of size
. The bit width of each entry in each LUT could be obtained by
, where
is the maximum magnitude of the entry.
Table 5 summarizes the overall memory requirements of different quantized LDPC decoders with
and
for the 802.11n LDPC codes. As shown in the table, our proposed RC-MIM-QSMS decoder requires almost the same memory as the RC-MIM-QMS decoder and it only has a slight increase in the memory demand of
compared to that of the conventional QSMS decoder. More importantly, the RC-MIM-QSMS decoder can reduce the memory demand by
compared to its rate-dependent counterparts, and significantly saves
of memory demand when compared with the RC-FAID decoder.
Table 6 presents the overall memory requirements of different quantized LDPC decoders with
and
for the 5G LDPC codes. It shows that our proposed RC-MIM-QSMS decoder only increases the memory demand by
compared to the conventional QSMS decoder and also requires less memory demand when compared with the RC-MIM-QMS decoder. More significantly, the RC-MIM-QSMS decoder requires
and
less memory demand compared to its rate-dependent counterparts and the RC-FAID decoder, respectively.