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Review
Peer-Review Record

Hardware-in-the-Loop Simulations: A Historical Overview of Engineering Challenges

Electronics 2022, 11(15), 2462; https://doi.org/10.3390/electronics11152462
by Franc Mihalič *,†, Mitja Truntič and Alenka Hren
Reviewer 1:
Reviewer 2:
Reviewer 3:
Electronics 2022, 11(15), 2462; https://doi.org/10.3390/electronics11152462
Submission received: 1 July 2022 / Revised: 30 July 2022 / Accepted: 3 August 2022 / Published: 8 August 2022

Round 1

Reviewer 1 Report

The paper shows a very extensive and complete review on Hardware In the Loop (HIL) techniques in various fields: automotive, marine traffic, electric drives, power converters, power grids, railways, and educational.

It is undeniable that the quality of the content is high, but I have few amendments on the organization of the manuscript.

The Introduction is too long, in my opinion the part concerning Power HIL design (fig. 4) should be moved to the next section.

Section 2 is too broad, splitting the subsections for the different fields could improve the readability. Subsections 2.x could be split again in two parts, eg. theory and examples.

FInally, I suggest to carefully revise the English language of the entire manuscript, some parts are hard to read flawlessly. 

Author Response

It is undeniable that the quality of the content is high, but I have few amendments on the organization of the manuscript.

Thank you for the encouraging assessment of the manuscript.

- The Introduction is too long, in my opinion the part concerning Power HIL design (fig. 4) should be moved to the next section.

Thank you for the suggestion: This part has been moved to the next section before the new subsection about the FPGA description.

- Section 2 is too broad, splitting the subsections for the different fields could improve the readability. Subsections 2.x could be split again in two parts, eg. theory and examples.

Thank you for the proposal: All subsections have been divided into an introductory description part plus examples of each particular field.

- Finally, I suggest to carefully revise the English language of the entire manuscript, some parts are hard to read flawlessly. 

Thank you for the hint. All revisions have also been verified by the native-speaking English reviewer (please see attached letter) and we hope that the text of the manuscript was improved successfully.

 

Author Response File: Author Response.pdf

Reviewer 2 Report

The manuscript presents an in-depth review of the application of Hardware-in-the-loop (HIL) simulation in the design of innovative industrial products and devices. In this regard, typical applications of this technology in automotive engineering, power electronic systems, various industrial drives, transportation and education are considered. The manuscript is written in a good style, collecting and systematizing significant information that could be useful to a wide range of professionals from industry and education. I have no significant remarks, rather editorial ones:

- Some of the figures, for example 9 and 24b are of poor quality;

- If possible, the authors could also provide an economic evaluation of the use of Hardware-in-the-loop (HIL) simulation compared to other methods for prototyping products;

- it would be useful, in addition to the advantages in the conclusion section, for the authors to comment on the disadvantages of Hardware-in-the-loop (HIL) simulation. In this way, a complete picture of its qualities, capabilities and application limitations will be obtained.

Author Response

I have no significant remarks, rather editorial ones:

Thank you for encouraging us to improve the manuscript.

- Some of the figures, for example 9 and 24b are of poor quality;

Thank you for these warnings. Unfortunately, the original photo of Fig. 9 in the cited reference is not of very high quality, despite that, we tried to improve its resolution by resampling. Then one newer reference from the same authors helped us to satisfy the Figure's quality. Therefore, this used reference is cited in addition as well.

Figure 24b is dependent on its width, therefore the quality was improved by increasing its width.

- If possible, the authors could also provide an economic evaluation of the use of Hardware-in-the-loop (HIL) simulation compared to other methods for prototyping products;

Thank you for the hint.

Like Gomez in [7] already reported more than 20 years ago, giving monetary judgments about the HIL simulators is tough and ungrateful. Unfortunately, there is almost no off-the-shelf HIL simulator for sale, although a couple of products and providers can come close. For example (according to Gomez), if the first self-designed simulator in the mid-'90s cost slightly over $100,000 (with 100 inputs and outputs), then the second identical unit cost about $25,000 to build. This was considered a bargain compared to the multi-million dollar unmanned aerial vehicles (UAVs) they were developing-if the HILS prevented the crash of just one UAV the company would get its money's worth. There was another, even more, valuable benefit: as HILS allows the software to be developed and tested without waiting for the actual hardware to be built (or, in this case, built and flown).

- it would be useful, in addition to the advantages in the conclusion section, for the authors to comment on the disadvantages of Hardware-in-the-loop (HIL) simulation. In this way, a complete picture of its qualities, capabilities and application limitations will be obtained.

Thank you for this additional warning. The majority of authors are discussing mainly advantages, so we will try to say a few additional words about the disadvantages:

An HIL simulator will not give any direct information about the state of the tested control system, since it only acts as a black box tester. It can only read the embedded system's output. When the embedded software goes wrong, there may or may not be enough information in those few outputs to determine what part of the software was executed, or what the values of the internal variables were.

The disadvantages are also the time-consuming preparations of test scenarios for the abnormal and faulty conditions where the whole HIL system has to be tuned from the model to the final real-time signal execution to expose the faulty operation. Preparing the tests to identify faulty operations is often more time-consuming than the test execution itself. With the increased complexity of models and integration of different tools in the HIL system, the upload time to the processor/execution part is also extended.

 

Reviewer 3 Report

The goal of this paper, as exposed by the authors, is to present a historical overview of HIL simulations through different engineering challenges based on various platforms, like National Instruments, dSPACE, Typhoon HIL, or MATLAB Simulink Real-Time toolboxes and Speedgoat.

Section 2 could be supplemented with information’s regard the FPGA simulators: ModelSim-ALTERA Intel® FPGA Edition Software and Quartus® Prime Software, Xilinx simulator – Vivado® Design Suite. What are the advantages of FPGA circuits with Nios, Microblases in HIL implementations?

The contributions made by THIS paper in the context of HIL, CIL and automotive field are NOT clearly explained from the beginning.

Figure 42 needs further discussion regarding the signals presented, triggers and CAN communication specific to the test performed. Maybe it's located too at the end of the article.

The reference section is good, citing new and relevant articles in the research area.

Author Response

- Section 2 could be supplemented with information’s regard the FPGA simulators: ModelSim-ALTERA Intel® FPGA Edition Software and Quartus® Prime Software, Xilinx simulator – Vivado® Design Suite. What are the advantages of FPGA circuits with Nios, Microblases in HIL implementations?

Thank you for the remark.

All these simulation tools used by different vendors are useful in standalone design in the FPGA. These design suite tools are incorporated in the overall design, depending on the HIL system design and the FPGA used in HIL systems. In that case, the system's level of integration between simulation tools and FPGA tools is incorporated in the HIL system design and not accessed directly. Additional information about FPGAs is now addressed in the new Section 2.1.1.

- The contributions made by THIS paper in the context of HIL, CIL and automotive field are NOT clearly explained from the beginning.

Thank you for the remark.

This manuscript was contributed as a review paper, so we started it with a historical overview of the HIL simulations through significant research fields, which is still our contribution's primary goal. Nevertheless, our part of the research in the context of HIL simulations includes a dSpace Scalexio LabBox equipment with a controller-in-the-loop for one pump within the automotive system. A brief description of that part is now also added in the Abstract and at the end of the Introduction.

- Figure 42 needs further discussion regarding the signals presented, triggers and CAN communication specific to the test performed. Maybe it's located too at the end of the article.

Thank you for the remark.

To get an insight into testing procedures, Figure 42 merely presents one test sequence executed on an HIL system. Not to go into detail, the signals are prepared and presented in the ControlDesk environment for the pump test consisting of six steps. The introduced test includes a change in the amplitude of the position sensor with the intent to trigger a fault. System calibration and steps with correct fault detection are done consequently. The faulty operation is detected clearly, providing two pulses in the 6th and 7th signals in the row where the deviance in the amplitude is detected, and the fault is triggered with the measured time response.

- The reference section is good, citing new and relevant articles in the research area.

Thank you for your opinion: we tried to find most of the up-to-date published references in the field and support them with a historical overview.

 

Round 2

Reviewer 1 Report

I really appreciated the Authors' effort in improving their manuscript.

In my opinion, the paper is now ready for acceptance.

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