Fully Differential Current-Mode Configuration for the Realization of First-Order Filters with Ease of Cascadability

Abstract

It is well known that fully differential signal processing is more advantageous than single-ended signal processing in a noisy environment, and is widely used in audio, video and other signal processing applications. This paper introduces a new fully differential configuration that contains a first-order low-pass (LP) filter, high-pass (HP) filter, and all-pass (AP) filter, all present within the same circuit design. The proposed fully differential configuration is simple and employs only one multiple-output current differencing transconductance amplifier and one grounded capacitor. The circuit has a wide operating frequency range (up to 73 MHz). The additional features offered by the proposed circuit include use of the lowest number of active and passive components, suitability of the integrated circuit chip, support of cascadability, electronic tunability, no passive component-matching restrictions, availability of all first-order responses, i.e., LP, HP, and AP, and low-level operating supply voltages. Non-ideal and parasitic analyses are investigated for the proposed circuit, and PSPICE simulation results are presented to verify the proposed theory. Additionally, the proposed fully differential LP filter circuit is experimentally verified using off-the-shelf ICs. Moreover, the cascading feasibility is demonstrated by realizing a fully differential nth-order LP filter.

1. Introduction

The design of continuous-time analog filters remains a highly vital and demanding area of research. The main reason that analog filters are popular is their application in audio, video and communication systems; for example, all-pass (AP) filters are used as phase equalizers and are applied as a sub-component of quadrature oscillators [1,2,3]. A first-order universal filter realizes high-pass (HP), low-pass (LP), and AP configurations in the same circuit. A large part of technical documentation [4,5,6,7,8,9,10,11] is focused on single-ended first-order filters, due to their design simplicity and implementation. However, single-ended circuits have several drawbacks in a few specific ambient conditions. For example, the single-ended circuits’ performance in a noisy environment deteriorates, whereas a fully differential (FD) circuit performs better in noisy conditions. FD filter designs have many advantageous features over single-ended filters, such as better rejection of noise associated with power supply, a wider output linearity range, and less even-order harmonics. Subsequently, several FD first-order filters, voltage-mode (voltage input and voltage output)-type and current-mode (current input and current output)-type, have been reported in the literature [12,13,14,15,16,17,18,19,20]. The FD configurations of [12,13,14,16,18,19,20] only realize AP filters. The circuit presented in [17] realizes LP and HP filters in one circuit, and AP filters in another. The circuit of [15] can realize either LP and AP, or HP and AP, within the same circuit. Thus, none of the earlier reported FD circuits realize all first-order filters within the same circuit topology. Additionally, the study of these FD circuits reveals that all the earlier reported FD circuits use either one or more floating passive component(s), which is not desirable from an integration point of view. There are also several other limitations in the earlier reported circuits, which are as follows:

• Excessive count of passive components [12,13,14,15,16,17,19,20];
• Passive component matching restriction [12,13,14,15,16,17,19,20];
• Not cascadable [12,13,14,15,16,19,20];
• Use of high-power supplies [13,15,16,17,18,20];
• Low operating frequency [12,13,14,15,16,17,18,19,20].

This work aims to present an FD configuration that can realize all the responses of a first-order filter (LP, HP and AP) within the same circuit, and overcome the limitations of earlier reported FD circuits. Using a single multiple-output current differencing transconductance amplifier (MOCDTA) and one grounded capacitor makes the circuit structure simple and suitable for integrated circuit fabrication. Ease of cascadability, electronic adjustment of pole frequency, no passive component-matching restrictions, fewer sensitivity figures and low operating supply voltages are additional attributes of the proposed circuit. In the paper, the non-idealities and parasitic analyses are also included. An FD nth-order LP filter is also realized to demonstrate the cascading feature.

2. First-Order Fully Differential Configuration

The proposed first-order FD configuration is based on active element CDTA. The active element used, CDTA [21], is a versatile active element and has a wide operation frequency range. Numerous linear and non-linear circuits operating in voltage and/or current-mode, using CDTA, are presented in the literature [22,23,24,25]. A symbol of MOCDTA is depicted in Figure 1. The terminal relationships of MOCDTA are specified below.

$$\left[\begin{array}{c}{I}_{Z1}\\ I_{Z2}\\ I_{Z3}\\ I_{O1+}\\ I_{O2-}\\ I_{O3-}\end{array}\right]=\left[\begin{array}{ccccc}1& -1& 0& 0& 0\\ 1& -1& 0& 0& 0\\ 1& -1& 0& 0& 0\\ 0& 0& g_m& 0& 0\\ 0& 0& -g_m& 0& 0\\ 0& 0& -g_m& 0& 0\end{array}\right]\left[\begin{array}{c}{I}_P\\ I_N\\ V_{Z1}\\ V_{Z2}\\ V_{Z3}\end{array}\right]$$

(1)

where g_m is transconductance gain of MOCDTA.

The proposed first-order FD configuration using single MOCDTA and one capacitor, which realizes LP, HP and AP filters within the same circuit structure, is shown in Figure 2. The input differential current (I_in = I_in1 − I_in2) signal is connected between low impedance terminals, whereas output differential current signals are accessible between high impedance terminals. Thus, the circuit offers rich cascadability without requiring any additional current buffer(s). By using the terminal relationships of Equation (1) and solving the nodal equations of the circuit, the following expressions of currents I₁, I₂, I₃ and I₄ are obtained.

$$I_1=\frac{g_m{I}_{in}}{sC+g_m}, I_2=\frac{-sC{I}_{in}}{sC+g_m}, I_3=\frac{-g_m{I}_{in}}{sC+g_m}, I_4=-I_{in}$$

(2)

where $I_{in}=I_{in1}-I_{in2}$.

The transfer functions of the proposed FD LP, HP and AP filters are given as follows:

$$\frac{I_{LP}}{I_{in}}=\frac{I_1-I_3}{I_{in1}-I_{in2}}=\frac{2g_m}{sC+g_m}$$

(3)

$$\frac{I_{HP}}{I_{in}}=\frac{I_3-I_4}{I_{in1}-I_{in2}}=\frac{sC}{sC+g_m}$$

(4)

$$\frac{I_{AP}}{I_{in}}=\frac{I_2-I_3}{I_{in1}-I_{in2}}=-\frac{sC-g_m}{sC+g_m}$$

(5)

The pole frequency f_P obtained from Equations (3)–(5) is given as follows:

$$f_P=\frac{g_m}{2\pi \hspace{0.17em}C}$$

(6)

The pole frequency can be varied electronically by controlling the value of g_m via the bias current of MOCDTA.

3. Non-Ideal and Parasitic Aspects

The non-ideal model of MOCDTA is specified below:

$$\begin{array}{l}{I}_{Z1}={\alpha }_1\left(I_P-I_N\right),I_{Z2}={\alpha }_2\left(I_P-I_N\right),\\ I_{Z3}={\alpha }_3\left(I_P-I_N\right),I_{O1+}={\gamma }_1{g}_m{V}_{Z1},\\ I_{O2-}=-{\gamma }_2{g}_m{V}_{Z1}\hspace{0.17em}and\hspace{0.17em}\hspace{0.17em}{I}_{O3-}=-{\gamma }_3{g}_m{V}_{Z1}\end{array}$$

(7)

In Equation (7), α₁, α₂ and α₃ are the non-ideal current transfer gains and γ₁, γ₂ and γ₃ are the non-ideal transconductance gains. By considering the non-ideal model of Equation (7) and solving the nodal equations of the circuit, the following expressions of LP, HP and AP filter functions are obtained.

$$\frac{I_{LP}}{I_{in}}=\frac{{\alpha }_1({\gamma }_1+{\gamma }_3)g_m}{sC+{\gamma }_2{g}_m}$$

(8)

$$\frac{I_{HP}}{I_{in}}=\frac{{\alpha }_{3}sC+g_m({\alpha }_3{\gamma }_2-{\alpha }_1{\gamma }_1)}{sC+{\gamma }_2{g}_m}$$

(9)

$$\frac{I_{AP}}{I_{in}}=\frac{-{\alpha }_{2}sC+{\alpha }_1{\gamma }_1{g}_m+g_m({\alpha }_1{\gamma }_3-{\alpha }_2{\gamma }_2)}{sC+{\gamma }_2{g}_m}$$

(10)

Equations (8)–(10) show that the filter’s gain and pole frequency now depend upon the non-ideal gains. The new pole frequency obtained from Equations (8)–(10) is given as follows:

$$f_P=\frac{{\gamma }_2{g}_m}{2\pi \hspace{0.17em}C}$$

(11)

It is to be noted from Equation (11) that the pole frequency f_P is not adversely affected and depends only on γ₂, while it is independent of other non-idealities. It is to be mentioned that the −3 dB bandwidth of non-ideal gains is quite high, and at lower frequencies, their magnitude is almost the same. Therefore, the effects of these non-ideal gains at lower frequencies may be neglected. The sensitivities of f_P relating to g_m, capacitor and non-ideal gains are given in Equation (12), which conforms low-sensitivity figures.

$$\begin{array}{l}{S}_{f_P}^{g_m}=-S_{f_P}^C=S_{f_P}^{{\gamma }_2}=1,\\ S_{f_P}^{{\alpha }_1}=S_{f_P}^{{\alpha }_2}=S_{f_P}^{{\alpha }_3}=S_{f_P}^{{\gamma }_1}=S_{f_P}^{{\gamma }_3}=0\end{array}$$

(12)

The following parasitic effects are included in MOCDTA: small resistances R_P and R_N in series at P and N terminals, respectively, and parallel combinations of R_Z1//(1/sC_Z1), R_Z2//(1/sC_Z2), R_Z3//(1/sC_Z3), R_O1+//(1/sC_O1+), R_O2−//(1/sC_O2−) and R_O3−//(1/sC_O3−) at Z₁, Z₂, Z₃, O₁₊, O₂₋, and O₃₋, respectively. The inclusion of these parasitic effects may affect the proposed circuit, and reanalysis of the circuit gives the following expressions of transfer functions of the LP, HP and AP filters:

$$\frac{I_{LP}}{I_{in}}=\frac{2g_m}{s{C}_P+g_{mP}}$$

(13)

$$\frac{I_{HP}}{I_{in}}=\frac{s{C}_P+1/R_P}{s{C}_P+g_{mP}}$$

(14)

$$\frac{I_{AP}}{I_{in}}=-\frac{s{C}_P-g_{mP}}{s{C}_P+g_{mP}}$$

(15)

where $g_{mP}=g_m+\frac{1}{R_P}$, $R_P=R_{Z1}+R_{O2-}$ and $C_P=C+C_{Z1}+C_{O2-}$.

The grounded capacitor C can easily absorb the parasitic capacitances C_Z1 and C_O2–. Equations (13)–(15) show that the proposed fully differential circuit is less affected by the parasitic effects of MOCDTA.

The pole frequency f_P is now changed, as expressed below:

$$f_P=\frac{g_{mP}}{2\pi \hspace{0.17em}{C}_P}$$

(16)

The parasitic resistances R_Z1 and R_O2− are quite large in magnitude; therefore, g_mP ≈ g_m. Thus, the parasitic effects on pole frequency are negligible. The filter order is also not changed by the parasitic effects.

4. Simulation Results

The proposed FD first-order filters are simulated through PSPICE with 0.13 µm TSMC CMOS technology. The CMOS structure of MOCDTA is shown in Figure 3 [22] and the transistor’s W/L ratios are listed in

Table 1. W/L ratios of MOS transistors.

MOS Transistors	W(μm)/L(μm) Ratio
M1–M3	26/0.26
M4–M6,	10.4/0.26
M8–M11, M13–M18, M22, M23	3.9/0.26
M7, M12	15.6/0.26
M19–M21	13/0.26
M24–M30	1.5/0.26
M31–M35	1/0.26

. The supply voltage and bias voltage are set to ±1 V and −0.56 V, respectively. The bias current is I_B = 150 µA (for which g_m = 1 mS). The simulated values of non-idealities and parasitic effects of MOCDTA are given in

Table 2. Simulated values of non-idealities and parasitic effects of MOCDTA.

Parameter	Simulated Value
α1, α2, α3	0.99
−3 dB bandwidth of α1, α2, α3	1 GHz
−3 dB bandwidth of γ1, γ2, γ3	2 GHz
RP, RN	14 Ω
RZ1, RZ2	100 kΩ
RO1+, RO2−, RO3−	125 kΩ

. The designed pole frequency is 1.59 MHz, for which the capacitor is selected as 100 pF. The AC responses of the proposed circuit for gain and phase are shown in Figure 4. The simulated value of pole frequency is observed to be 1.587 MHz. The transient response for an AP filter at pole frequency, when a differential current of 50 µA in amplitude is applied at the input, is depicted in Figure 5. In Figure 5, the differential input and output current signals are in a quadrature relationship at pole frequency. The total harmonic distortion of AP output current is found to be less than 2%. The gain and phase plots of the AP filter for the bias current values of I_B = 50, 100, 150 and 200 µA are depicted in Figure 6. The gain plots at different bias currents are overlapped with each other and phase plots at different values of bias current, I_B = 50, 100, 150 and 200 µA, provide pole frequency values of 0.74, 1.24, 1.587 and 1.78 MHz, respectively. The high-frequency response of the circuit at 73 MHz is also tested for C = 2 pF and I_B = 150 µA. The transient response for an AP filter at pole frequency of 73 MHz is depicted in Figure 7, which confirms the good operating frequency. Additionally, the temperature stability of the circuit is also examined. The transient responses for an AP filter for 0 °C to 75 °C temperature variations are depicted in Figure 8. It is noted that the performance of the circuit as a result of the temperature variation is not adversely deteriorated. Furthermore, Monte Carlo simulations for 1000 runs were carried out to verify the performance of the proposed circuit against capacitor variation and the MOS transistor’s threshold voltage variation. Figure 9 shows the histogram of maximum amplitude and pole frequency for an AP filter with 10% Gaussian deviation in capacitor values. Figure 10 shows the histogram of maximum amplitude and pole frequency for an AP filter with 5% Gaussian deviation in threshold voltages. For the capacitor deviation, the mean values of amplitude and pole frequency are 51.22 µA (2.44% error) and 1.58 MHz (0.62% error), respectively. For threshold voltage deviation, the mean values of amplitude and pole frequency are 51.37 µA (2.74% error) and 1.58 MHz (0.62% error), respectively. Figure 9 and Figure 10 confirm that the proposed FD circuit is less affected by the capacitor and threshold voltage variations. The proposed circuit consumes a maximum power (measured in simulation) of 2.5 mW at I_B = 150 µA.

Table 3. Comparison among the proposed fully differential first-order circuit and earlier reported fully differential first-order circuits.

Ref.	Active Element/ Count	Passive Components with Count	All Grounded Passive Component	Passive Component Matching Restriction	Operating Mode	Cascadable	Availability of LP, HP and AP Responses	MOS Transistors Count	Technology (µm)	Max Operation Frequency	Supply Voltage(s) (V)
[12]	FDDTA/1	1-R, 2-C	No	Yes	VM	No	Only AP	34	0.18	0.04 MHz	0.5
[13]	DVCC/1	3-R, 1-C	No	Yes	VM	No	Only AP	18	0.5	2.27 MHz	±2.5
[14]	DDCC/1	3-R, 1-C	No	Yes	VM	No	Only AP	12	0.18	0.32 MHz	±0.9
[15]	DPDVCC/2	2-R, 2-C	No	Yes	VM	No	AP and LP or AP and HP	92	0.25	0.27 MHz	±2.5
[16]	DV-DXCCII/1	3-R, 2-C or 2-R, 3-C	No	Yes	VM	No	Only AP	30	0.25	6.13 MHz	±1.25
[17]	DC-DVCC/1	2-R, 1-C	No	Yes	CM	Yes	LP and HP	38	0.5	1.58 MHz	±2.5
	DC-DVCC/2	4-R, 2-C	No	Yes	CM	Yes	Only AP	76	0.5	1.58 MHz	±2.5
[18]	ACA/1, CF/2	1-C	No	No	CM	Yes	Only AP	50	0.18	0.94 MHz	±1.2
[19]	FBCCII/1	6-R, 2-C	No	Yes	VM	No	Only AP	34	0.18	290 Hz	0.5
[20]	DVCC/1	1-R, 3-C	No	Yes	VM	No	Only AP	18	0.5	3.18 MHz	±2.5
This work	MOCDTA/1	1-C	Yes	No	CM	Yes	All LP, HP and AP	35	0.13	73 MHz	±1

FDDTA: fully differential difference transconductance amplifier, DVCC: differential voltage current conveyor, DDCC: differential difference current conveyor, DPDVCC: digitally programmable DVCC, DV-DXCCII: differential voltage dual-X second-generation current conveyor, DC-DVCC: digitally controllable DVCC, ACA: adjustable current amplifier, CF: current follower, FBCCII: fully balanced CCII, VM: voltage mode, CM: current mode, LP: low-pass, HP: high-pass, AP: all-pass.

shows the key features of the proposed FD configuration, illustrating the advantages of the proposed first-order FD circuit over earlier reported first-order FD circuits.

5. Experimental Results

The proposed fully differential LP filter configuration is experimentally verified using off-the-shelf ICs. The practical implementation of the proposed LP filter configuration is shown in Figure 11. The experimental set-up using breadboard and discrete components is depicted in Figure 12. The input currents I_in1 and I_in2 are applied with the help of external resistors R₁ and R₂, respectively. The output LP signal is observed across the load resistor R₃. The power supplies used are ±10 V. The passive components are selected as follows: R₁ = R₂ = R₃ = 1 kΩ, C = 10 nF. The bias current is set to 70 μA (g_m = 1 mS). The input signal of 0.75 V in magnitude is applied to observe the output across resistor R₃. Figure 13 shows the input and output signals at different frequencies (1 kHz, 10 kHz, 40 kHz and 100 kHz). A phase difference of 180° is clearly seen between the input and output at low frequency (1 kHz), which is in accordance with the simulation results shown in Figure 4a. Additionally, the plot of gain response for the LP filter configuration is shown in Figure 14.

6. Cascading Feasibility

The cascading ability of the presented configuration is further examined by realizing an nth-order FD LP filter. The output currents of the proposed fully differential filters are available from the high impedance terminals, making the proposed filters easily cascadable without requiring additional circuitry. Figure 15 shows the FD nth-order LP filter circuit, which is realized by cascading the n number of FD first-order LP filters. The transfer function of the realized FD nth-order LP filter is given as follows.

$$\frac{I_{LP}}{I_{in}}=\frac{I_1-I_2}{I_{in1}-I_{in2}}={\left(\frac{2g_m}{sC+g_m}\right)}^n$$

(17)

The pole frequency f_P of the filter obtained from Equation (17) is given as follows:

$$f_P=\frac{g_m}{2\pi \hspace{0.17em}C}$$

(18)

The nth-order circuit is validated by simulating it for n = 3. The circuit is simulated by using I_B = 150 μA and C₁ = C₂ = C₃ = 100 pF. The simulated gain and phase of the circuit are shown in Figure 16. The variation in the phase of the third-order LP filter from 0° to −270° is confirmed in Figure 16.

It should be noted that a higher-order HP filter and higher-order AP filter can also be implemented by cascading first-order filters in the same way as the higher-order LP filter shown in Figure 15. Figure 17 shows the gain and phase of the third-order HP filter. The frequency and transient responses of the third-order AP filter are shown in Figure 18. Figure 18a shows a phase variation of 0° to −540° for the AP filter.

7. Conclusions

In this paper, a MOCDTA-based FD first-order filter circuit, has been realized, with the LP, HP, and AP responses all obtainable within the same circuit structure. Low input and high output impedances are favorable for cascadability. Some other valuable features of the circuit include resistorless realization, use of grounded capacitor only, electronic tunability, lower sensitivity figures, low operating supply voltages, wider operational frequency range and low power consumption. The proposed FD configuration is less affected by temperature variation, capacitor variation and threshold voltage variation. An nth-order FD LP filter has also been realized to demonstrate the cascading feasibility of the proposed FD first-order filter. The fully differential operability of the proposed circuit makes it favorable for several applications, such as audio systems, data transmission and communication systems.