Modeling and Analysis of Voltage Ripple-Controlled SIDO Buck Converter in Pseudo-Continuous Conduction Mode with Limited Cross-Regulation and Fast Load Transient Performance

Abstract

Typical voltage mode-controlled DC–DC converters with single-inductor dual-output (SIDO) in pseudo-continuous conduction mode (PCCM) have slow load transient performance, and cross-regulation still exists between their two outputs. For the purposes of suppressing the cross-regulation and improving the load transient performance, a voltage ripple control technique for a PCCM SIDO buck converter is proposed in this study. A description of the PCCM SIDO buck converter and the voltage ripple control technique is provided in detail. In addition, the small-signal model was established, and the cross-regulation was further compared by Bode plots, as well as the load range and the power losses being analyzed. The cross-regulation and load transient performance of the voltage ripple-controlled PCCM SIDO buck converter was studied and compared with the conventional voltage mode-controlled. Using the proposed voltage ripple control for PCCM SIDO buck converters, we found no cross-regulation or rapid load transient behavior, which was validated by experimental results.

1. Introduction

For portable electrical devices, single-inductor multiple-output (SIMO) DC–DC converters can offer a cost-effective, high-reliability, and high-integrity solution [1,2,3,4] that can provide different supply voltage levels for different function modules. However, since all the outputs share one inductor, they are affected by a mutual cross-regulation when the system operates in continuous conduction mode (CCM) [2,3,4,5,6,7,8,9]. This has a drastic impact on the stability and performance of the system, both in the steady state and transient operations [4,5,6,7]. In addition, compared with the traditional single-input single-output (SISO) DC–DC converter, the system becomes more complex to operate, control, and design since all outputs are coupled through one single power switch.

Many studies focus on new control schemes that address the cross-regulation issue of a CCM SIMO DC–DC converter. For example, Wang et al. [6] proposed a deadbeat-based control that solved the cross-regulation problem and was capable of regulating both the input current and the output voltage at the same time. In [7,8], the capacitor current control was applied to a CCM single-inductor dual-output (SIDO) buck converter, and the cross-regulation was effectively suppressed under the influence of its fast transient response. Dong et al. [9] proposed a DC–DC converter topology based on the current-source mode SIMO for a light-emitting diode driver, which realized the decoupling of all individual dimming controls. Despite the benefits of suppressing the cross-regulation for a CCM SIDO DC–DC converter, it could not be eliminated completely.

To cancel cross-regulation, the single-inductor dual-output (SIDO) DC–DC converter in discontinuous conduction mode (DCM) was introduced in [10,11,12]. After discharging into the appropriate output, the inductor current became zero, which ensured each output was isolated from the load changes in other outputs. This enabled each output to be controlled independently, thereby overcoming the effects of cross-regulation. However, under heavy loads, the SIDO DC–DC converter suffered a large ripple in the inductor current and a output voltage ripple when operating in DCM, which severely impaired the switching noise and dynamic response performance of the converter.

A pseudo-continuous conduction mode (PCCM) for a SIDO DC–DC converter was proposed in [13]. The circuit diagram and operating waveforms of the PCCM SIDO buck converter are illustrated in Figure 1. After the current was charged and discharged in the inductor, the converter entered a freewheeling interval. Since the starting and ending inductor current were both equal to the freewheeling current I_dc, the load change in one output did not affect the other output. It only changed the freewheeling interval. The cross-regulation can be absolutely suppressed in theory.

However, in the presence of a DC offset current, the additional freewheeling switch will cause unnecessary power loss during the freewheeling period. There are a lot of researchers investigating techniques for an adaptive freewheeling current control to overcome this problem [14,15,16]. Woo et al. [14] proposed a new control technique for a freewheeling current control, that is, to adjust the output voltage through the operation of the comparator and control the average feedback of the freewheeling current to a reference level. A SIMO converter with a linear regulator based on error control was introduced in [15]. Using this scheme, the switching frequency and switching sequence of the output power switches were controlled arbitrarily according to each error, and high efficiency and regulation stability under a light load were achieved at the same time. A hybrid-mode control method of a single freewheel phase was proposed, which could achieve the reduction of switching loss and the minimization of cross-regulation [16]. In the above-referenced literature, the simulation and experimental results indicated that the cross-regulation still exists in PCCM SIDO DC–DC converters. In the literature, the common way to control the main switch is conventional voltage mode control, which leads to a slow load transient performance, impeding the cross-regulation suppression. Thus, it is necessary to investigate an effective control technique for a PCCM SIDO DC–DC converter to absolutely restrain the cross-regulation.

The voltage ripple control technique is widely used in conventional single-inductor single-output (SISO) DC–DC converters, owing to its fast load transient response and simple design [17,18]. However, it is not used in SIDO DC–DC converters. Although the circuit topology of a SIDO DC–DC converter does not seem complex, when compared with the traditional SISO DC–DC converter, the functional interdependencies and the circuit operation among basic converter parameters, such as output voltage, power switches, duty cycle, and load current magnitude, are much more complex. Moreover, the small-signal model, transient analysis, and efficiency analysis of SIDO DC–DC converter are more complex. In this study, a voltage ripple control technique of suppressing the cross-regulation is proposed to improve the transient performance of a PCCM SIDO buck converter, which is significant for the application of the converter.

The rest of this paper is organized as follows. Section 2 illustrates the operation principle of the PCCM SIDO buck converter and its state equations. The voltage ripple control technique for the PCCM SIDO buck converter is proposed, and its control constraint equations are performed. In Section 3, the small-signal model is established, and its cross-regulation is analyzed using Bode plots. The load range and efficiency are analyzed in detail in Section 4. Experimental results are given to verify the theoretical analysis in Section 5, where the load transient performance of the proposed voltage ripple-controlled and conventional voltage mode-controlled PCCM SIDO buck converters are compared. In addition, the load range and the efficiency are presented. Section 6 summarizes the conclusion of this paper.

2. Proposed Voltage Ripple Control for PCCM SIDO Buck Converter

2.1. Operation Principle of PCCM SIDO Buck Converter

As shown in Figure 1a, one main switch S₁, one freewheeling switch S₂, two output switches S_a and S_b, four diodes D₁, D₂, D_a, and D_b, one inductor L, and two output capacitors C_a and C_b with their ESRs r_ca and r_cb form the PCCM SIDO buck converter together. The voltages of C_a and C_b are v_ca and v_cb, respectively. The output currents of output A and output B are i_a and i_b, respectively. Figure 1b shows its operating waveforms, where I_dc is a freewheeling current; i_L is the inductor current; m_ai and m_bi (i = 1, 2) are the increasing and decreasing slopes of the inductor current for outputs A and B, respectively; T_s is the switching period; T_a and T_b are the working times of outputs A and B, respectively; and V_s1, V_s2, V_sa, and V_sb are the driver pulse signals corresponding to S₁, S₂, S_a, and S_b, respectively. S_a and S_b are complementary conducted.

In one switching cycle, there are six operation modes for PCCM SIDO buck converter. Its corresponding equivalent circuits are shown in Figure 2. When V_sa = 1, S_a turns on and S_b turns off, the inductor works in output A. There are three operation modes. Otherwise, the inductor works in output B, and there are three operation modes too.

(1) Mode I: Charging interval t₁. In this mode, S_a and S₁ are turned on, and S₂ is off. i_L increases with slope m_a1 = (V_g − V_a)/L. D₁ is reverse biased, and D_a is forward conducted. C_a is charged, while C_b is discharged to provide power for the output B. At the end of this interval, the inductor current i_n1 and capacitor voltages v_can1 and v_cbn1 are derived as:

$$\{\begin{array}{l}{i}_{n1}=i_n+m_{\mathrm{a}1}{t}_1\\ v_{\mathrm{ca}n1}=v_{\mathrm{ca}n}+(i_n-i_{\mathrm{a}})t_1/C_{\mathrm{a}}+m_{\mathrm{a}1}{t}_1^2/(2C_{\mathrm{a}})\\ v_{\mathrm{cb}n1}=v_{\mathrm{cb}n}-i_{\mathrm{b}}{t}_1/C_{\mathrm{b}}\end{array}$$

(1)

(2) Mode II: Discharging interval t₂. S₁ is turned off, and both D₁ and D_a are forward biased. i_L decreases with slope m_a2 = V_a/L. C_a and C_b are discharged to provide power for the appropriate outputs. Similarly, at the end of this operation mode, the inductor current i_n2 and capacitor voltages v_can2 and v_cbn2 are:

$$\{\begin{array}{l}{i}_{n2}=i_{n1}-m_{\mathrm{a}2}{t}_2\\ v_{\mathrm{ca}n2}=v_{\mathrm{ca}n1}+(i_{n1}-i_{\mathrm{a}})t_2/C_{\mathrm{a}}-m_{\mathrm{a}2}{t}_2^2/(2C_{\mathrm{a}})\\ v_{\mathrm{cb}n2}=v_{\mathrm{cb}n1}-i_{\mathrm{b}}{t}_2/C_{\mathrm{b}}\end{array}$$

(2)

(3) Mode III: Freewheeling interval. The freewheeling switch S₂ is switched on to short out the inductor. D₁ and D_a are reverse biased. i_L stays constant at I_dc. This freewheel interval could be used to isolate two outputs. The inductor current i_n3 and capacitor voltages v_can3 and v_cbn3 are obtained as:

$$\{\begin{array}{l}{i}_{n3}=i_{n2}=I_{\mathrm{dc}}\\ v_{\mathrm{ca}n3}=v_{\mathrm{ca}n2}-(T_{\mathrm{a}}-t_1-t_2)i_{\mathrm{a}}/C_{\mathrm{a}}\\ v_{\mathrm{cb}n3}=v_{\mathrm{cb}n2}-(T_{\mathrm{a}}-t_1-t_2)i_{\mathrm{b}}/C_{\mathrm{b}}\end{array}$$

(3)

When V_sb = 1, S_a is switched off, while S_b is switched on. The inductor works in output B. There are also three operation modes, which are similar to output A. The inductor current and capacitor voltages are deduced as follows:

$$\mathrm{Mode} \mathrm{IV}: \{\begin{array}{l}{i}_{n4}=i_{n3}+m_{\mathrm{b}1}{t}_3\\ v_{\mathrm{ca}n4}=v_{\mathrm{ca}n3}-i_{\mathrm{a}}{t}_3/C_{\mathrm{a}}\\ v_{\mathrm{cb}n4}=v_{\mathrm{cb}n3}+(i_{n3}-i_{\mathrm{b}})t_3/C_{\mathrm{b}}+m_{\mathrm{b}1}{t}_3^2/(2C_{\mathrm{b}})\end{array}$$

(4)

$$\mathrm{Mode} \mathrm{V}: \{\begin{array}{l}{i}_{n5}=i_{n4}-m_{\mathrm{b}2}{t}_4\\ v_{\mathrm{ca}n5}=v_{\mathrm{ca}n4}-i_{\mathrm{a}}{t}_4/C_{\mathrm{a}}\\ v_{\mathrm{cb}n5}=v_{\mathrm{ca}n4}+(i_{n4}-i_{\mathrm{b}})t_4/C_{\mathrm{b}}-m_{\mathrm{b}2}{t}_4^2/(2C_{\mathrm{b}})\end{array}$$

(5)

$$\mathrm{Mode} \mathrm{VI}: \{\begin{array}{l}{i}_{n+1}=i_{n5}=I_{\mathrm{dc}}\\ v_{\mathrm{ca}(n+1)}=v_{\mathrm{ca}n5}-(T_{\mathrm{b}}-t_3-t_4)i_{\mathrm{a}}/C_{\mathrm{a}}\\ v_{\mathrm{cb}(n+1)}=v_{\mathrm{cb}n5}-(T_{\mathrm{b}}-t_3-t_4)i_{\mathrm{b}}/C_{\mathrm{b}}\end{array}$$

(6)

where m_b1 = (V_g−V_b)/L, m_b2 = V_b/L, t₃ is the charging interval for output B, and t₄ is the discharging interval for output B.

When referencing Equations (1)–(6), the expressions of i_L, v_ca and v_cb at the beginning of the (n + 1)-th switching cycle for the PCCM SIDO buck converter are easily obtained.

2.2. Operation Principle of the Proposed Voltage Ripple-Controlled PCCM SIDO Buck Converter

Figure 3a shows the control loop of the proposed voltage ripple-controlled PCCM SIDO buck converter, from which we can see that the main switch S₁ is managed by voltage ripple control, and the freewheeling switch S₂ is managed by constant reference current control. The output switches S_a and S_b are complementary controls. This converter has a stable switching frequency using pulse-width modulation. The control circuit of S₁ consists of two error amplifiers EA₁ and EA₂, two comparators CMP₁ and CMP₂, two RS triggers RS₁ and RS₂, and one selector S. The controller of S₂ is composed of one comparator CMP₃ and one RS trigger RS₃. The S_a and S_b are controlled by a D trigger and clock signal named clk.

Upon the initial moment of each output operation, S₁ is turned on first. The CMP_i(i=1,2) compares V_ei(i=a,b) with v_i(i=a,b) to generate reset signals for RS₁ and RS₂, respectively, where V_ea and V_eb are the compensated error voltages between each output v_i(i=a,b) and reference voltage V_refi(i=a,b), respectively. Q_a and Q_b are the output signals of RS₂ and RS₃. When V_sa = 1, Q_a is selected by S (i.e., V_s1 = Q_a), and V_a is regulated to V_refa. When V_a increases to V_ea, the output of CMP₁ resets RS₁, and S₁ is turned off. Similarly, when V_sa = 0, Q_b is selected (i.e., V_s1 = Q_b), V_b is regulated to V_refb. When v_b increases to V_eb, the output of CMP₂ resets RS₂, and then S₁ is turned off.

The above descriptions show that v_i(i=a,b) is equal to V_ei(i=a,b) when S₁ turns off. This is a much slower variable than v_i(i=a,b) and is considered a constant in each switching cycle. Therefore, the expressions of the control constraint are as follows:

$$v_{\mathrm{ca}n+d\mathrm{a}}+(i_{n+d\mathrm{a}}-i_{\mathrm{a}})r_{\mathrm{ca}}=V_{\mathrm{refa}}; v_{\mathrm{cb}n+d\mathrm{b}}+(i_{n+d\mathrm{b}}-i_{\mathrm{b}})r_{\mathrm{cb}}=V_{\mathrm{refb}}$$

(7)

When i_L reduces to I_dc, S₂ is turned on to short-circuit the inductor and force the inductor current to circulate through L. Therefore, the S₂ freewheeling interval is activated until the corresponding output switch is off. Based on Figure 3b, there is

$$i_{n+f\mathrm{a}}=i_{n+d\mathrm{a}}-m_2{t}_2=I_{\mathrm{dc}}; i_{n+f\mathrm{b}}=i_{n+d\mathrm{b}}-m_4{t}_4=I_{\mathrm{dc}}$$

(8)

Based on Equations (7) and (8), we can calculate the charging, discharging, and freewheeling intervals for outputs A and B.

2.3. Operation Principle of the Conventional Voltage Mode-Controlled PCCM SIDO Buck Converter

Figure 4 shows the controller and operation waveforms for a conventional voltage mode-controlled PCCM SIDO buck converter.

Compared with Figure 3, the controller is similar, and the inner control loop of the main switch S₁ is slightly different with a sawtooth waveform V_saw instead of the output voltages v_a and v_b. The other control logics are the same as on the voltage ripple-controlled PCCM SIDO buck converter.

The block diagram of the voltage mode control is presented in Figure 4. It shows that when the input voltage or output current changes, the voltage mode control can only detect the change and feedback for correction after the corresponding change of the output voltage, making the reaction speed relatively slow. However, the voltage ripple controller shown in Figure 3 controls the converter by detecting the ripple voltage on the equivalent series resistance of the capacitor. When the load voltage and current change, the inductance current cannot change suddenly; thus, the change of load current is reflected in the change of ripple voltage on the equivalent series resistance, that is, the change of v_a and v_b. Therefore, the voltage ripple controller has a faster response than the voltage mode controller.

3. Small-Signal Model and Frequency Performance Analysis

In Section 3, the small-signal model of the proposed voltage ripple-controlled PCCM SIDO buck converter is established. The frequency performance of cross-regulation is analyzed and compared in detail.

3.1. Small-Signal Modeling of PCCM SIDO Buck Converter

According to Equations (1)–(6), the state-space average equations of the PCCM SIDO buck converter are given as Equation (9).

After introducing the small-signal perturbations in Equation (9) and then removing the direct-current and higher-order parts of the perturbations, the small-signal model for the PCCM SIDO buck converter is written as Equation (10).

$$\{\begin{array}{l}L\frac{d{i}_{\mathrm{L}}}{dt}=V_{\mathrm{g}}\left(d_{\mathrm{a}1}+d_{\mathrm{b}1}\right)-\frac{R_{\mathrm{a}}{v}_{\mathrm{ca}}\left(r_{\mathrm{ca}}{i}_{\mathrm{L}}+v_{\mathrm{ca}}\right)}{R_{\mathrm{a}}+r_{\mathrm{ca}}}\left(d_{\mathrm{a}1}+d_{\mathrm{a}2}\right)-\frac{R_{\mathrm{b}}\left(r_{\mathrm{cb}}{i}_{\mathrm{L}}+v_{\mathrm{cb}}\right)}{R_{\mathrm{b}}+r_{\mathrm{cb}}}\left(d_{\mathrm{b}1}+d_{\mathrm{b}2}\right)\\ C_{\mathrm{a}}\frac{d{v}_{\mathrm{ca}}}{dt}=\frac{R_{\mathrm{a}}{i}_{\mathrm{L}}\left(d_{\mathrm{a}1}+d_{\mathrm{a}2}\right)}{R_{\mathrm{a}}+r_{\mathrm{ca}}}-\frac{v_{\mathrm{ca}}}{\left(R_{\mathrm{a}}+r_{\mathrm{ca}}\right)}\\ C_{\mathrm{b}}\frac{d{v}_{\mathrm{cb}}}{dt}=\frac{R_{\mathrm{b}}{i}_{\mathrm{L}}\left(d_{\mathrm{b}1}+d_{\mathrm{b}2}\right)}{R_{\mathrm{b}}+r_{\mathrm{cb}}}-\frac{v_{\mathrm{cb}}}{\left(R_{\mathrm{b}}+r_{\mathrm{cb}}\right)}\end{array}$$

(9)

$$\{\begin{array}{l}L\frac{d{\widehat{i}}_{\mathrm{L}}}{dt}=-\frac{R_{\mathrm{a}}}{R_{\mathrm{a}}+r_{\mathrm{ca}}}\left(\left(r_{\mathrm{ca}}\left({\widehat{v}}_{\mathrm{ca}}{I}_{\mathrm{L}}+V_{\mathrm{ca}}{\widehat{i}}_{\mathrm{L}}\right)+2{\widehat{v}}_{\mathrm{ca}}\right)\left(D_{\mathrm{a}1}+D_{\mathrm{a}2}\right)+\left(r_{\mathrm{ca}}{V}_{\mathrm{ca}}{I}_{\mathrm{L}}+V_{\mathrm{ca}}{}^2\right)\left({\widehat{d}}_{\mathrm{a}1}+{\widehat{d}}_{\mathrm{a}2}\right)\right)\\ -\frac{R_{\mathrm{b}}}{R_{\mathrm{b}}+r_{\mathrm{cb}}}\left(\left(D_{\mathrm{b}1}+D_{\mathrm{b}2}\right)\left(r_{\mathrm{cb}}{\widehat{i}}_{\mathrm{L}}+{\widehat{v}}_{\mathrm{cb}}\right)+\left(r_{\mathrm{cb}}{I}_{\mathrm{L}}+V_{\mathrm{cb}}\right)\left({\widehat{d}}_{\mathrm{b}1}+{\widehat{d}}_{\mathrm{b}2}\right)\right)+{\widehat{v}}_{\mathrm{in}}\left(D_{\mathrm{a}1}+D_{\mathrm{b}1}\right)+V_{\mathrm{in}}\left({\widehat{d}}_{\mathrm{a}1}+{\widehat{d}}_{\mathrm{b}1}\right)\\ C_{\mathrm{a}}\frac{d{\widehat{v}}_{\mathrm{ca}}}{dt}=\frac{1}{R_{\mathrm{a}}+r_{\mathrm{ca}}}\left(R_{\mathrm{a}}\left({\widehat{i}}_{\mathrm{L}}\left(D_{\mathrm{a}1}+D_{\mathrm{a}2}\right)+I_{\mathrm{L}}\left({\widehat{d}}_{\mathrm{a}1}+{\widehat{d}}_{\mathrm{a}2}\right)\right)-{\widehat{v}}_{\mathrm{ca}}\right)\\ C_{\mathrm{b}}\frac{d{\widehat{v}}_{\mathrm{cb}}}{dt}=\frac{1}{R_{\mathrm{b}}+r_{\mathrm{cb}}}\left(R_{\mathrm{b}}\left({\widehat{i}}_{\mathrm{L}}\left(D_{\mathrm{b}1}+D_{\mathrm{b}2}\right)+I_{\mathrm{L}}\left({\widehat{d}}_{\mathrm{b}1}+{\widehat{d}}_{\mathrm{b}2}\right)\right)-{\widehat{v}}_{\mathrm{cb}}\right)\end{array}$$

(10)

where V_ca, V_cb, I_L, D_a1, D_a2, D_b1, and D_b2 are the average of the output capacitors’ voltage v_ca and v_cb, the inductor current I_L, and duty ratios d_a1, d_a2, d_b1, and d_b2, respectively.

Based on the above small-signal model, the matrix operation in MATLAB can calculate the self-regulation transfer functions, cross-regulation transfer functions, the duty ratios–output transfer functions, and cross-coupled transfer functions of the PCCM SIDO buck converter.

3.2. Small-Signal Modeling of Voltage Ripple-Controlled PCCM SIDO Buck Converter

For the voltage ripple-controlled PCCM SIDO buck converter, Figure 5 shows the geometric relationship between the output voltage v_a and corresponding inner loop control signal V_ea and the output voltage v_b and corresponding inner loop control signal V_eb.

According to the geometric relationship shown in Figure 5, the average of the output voltage v_a during one switching cycle is derived as

$$V_{\mathrm{a}}=V_{\mathrm{va}}+\left(A_1+A_2+A_3\right)/T_{\mathrm{s}}$$

(11)

where V_va is the valley value of v_a. A₁, A₂, and A₃ denote the areas between v_a and V_va shown in Figure 5, which is expressed as

$$V_{\mathrm{va}}=V_{\mathrm{ea}}-m_{\mathrm{va}1}{d}_{\mathrm{a}1}{T}_{\mathrm{s}}-I_{\mathrm{dc}}{r}_{\mathrm{ca}}$$

(12)

$$A_1=0.5(2I_{\mathrm{dc}}{r}_{\mathrm{ca}}+m_{\mathrm{va}1}{d}_{\mathrm{a}1}T)d_{\mathrm{a}1}{T}_{\mathrm{s}}$$

(13)

$$A_2=0.5(2I_{\mathrm{dc}}{r}_{\mathrm{ca}}+2m_{\mathrm{va}1}{d}_{\mathrm{a}1}{T}_{\mathrm{s}}-m_{\mathrm{av}2}{d}_{\mathrm{a}2}{T}_{\mathrm{s}})d_{\mathrm{a}2}{T}_{\mathrm{s}}$$

(14)

$$A_3=0.5m_{\mathrm{va}3}{(d_{\mathrm{a}3}+0.5)}^2{T}_{\mathrm{s}}{}^2$$

(15)

In Equations (11)–(15), m_vai(i=1,2,3) is the absolute value of the increase and decrease slopes for output voltage v_a, and its corresponding expressions are m_va1 = (V_g − V_a)r_ca/L, m_va2 = V_ar_ca/L, m_va3 = V_a/(R_aC_a).

By adding a small disturbance into Equation (11) and ignoring the direct-current and higher-order perturbations, the small-signal expression of the duty ratio d_a1 can be obtained as

$${\widehat{d}}_{\mathrm{a}1}=G_{\mathrm{a}1}{\widehat{i}}_{\mathrm{dc}}+G_{\mathrm{a}2}{\widehat{d}}_{\mathrm{a}2}+G_{\mathrm{a}3}{\widehat{v}}_{\mathrm{a}}+G_{\mathrm{a}4}{\widehat{v}}_{\mathrm{g}}+G_{\mathrm{a}5}{\widehat{v}}_{\mathrm{ea}}$$

(16)

where the expressions for G_a1–G_a5 are given in Appendix A.

Similarly, based on the waveform of inductor current i_L, the small-signal expression of the duty ratio d_a2 is given as follows.

$${\widehat{d}}_{\mathrm{a}2}=G_{\mathrm{a}6}{\widehat{i}}_{\mathrm{L}}+G_{\mathrm{a}7}{\widehat{i}}_{\mathrm{dc}}+G_{\mathrm{a}8}{\widehat{d}}_{\mathrm{a}1}+G_{\mathrm{a}9}{\widehat{v}}_{\mathrm{a}}+G_{\mathrm{a}10}{\widehat{v}}_{\mathrm{g}}$$

(17)

where the expressions for G_a6–G_a10 are given in Appendix A.

The small-signal expressions of the duty ratios d_b1 and d_b2 are determined in the same way; moreover, the forms are similar. Thus, the process will not be repeated here.

Based on Equations (16) and (17), the small-signal block diagram of the voltage ripple-controlled PCCM SIDO buck converter can be obtained, as shown in Figure 6. It includes the power circuit, the control circuit of the main switch, and the freewheeling switch. In Figure 6, H_v1(s) is the sampling coefficient of the output voltage v_a, and G_c1(s) is the transfer function of the error amplifier EA₁. The small-signal model of output B resembles output A.

3.3. Cross-Regulation Analysis in Frequency

There are disturbances propagating from a load current to the cross-output voltage, and the closed-loop cross-regulation transfer functions ${\widehat{v}}_{\mathrm{b}}/{\widehat{i}}_{\mathrm{a}}$ and ${\widehat{v}}_{\mathrm{a}}/{\widehat{i}}_{\mathrm{b}}$ can be used to represent the capacity to attenuate these disturbances. When the low-frequency gain is relatively low, it signifies that the cross-regulation is also relatively small [7,8,19]. When considering the small-signal model presented in Figure 6, the cross-regulation of the proposed voltage ripple-controlled PCCM SIDO buck converter can be researched by means of Bode plots. With the parameters in

Table 1. Parameters of voltage ripple-controlled PCCM SIDO buck converter.

Symbol	Quantity	Value
Vg	Input voltage	20 V
Idc	Reference current	2 A
L	Inductor	100 μH
Ta, Tb	Operation time	20 μs
Ca, Cb	Output capacitor	550 μF
Vrefa	Reference voltage	12 V
Vrefb	Reference voltage	5 V
rca, rcb	Output capacitor ESR	50 mΩ
Ia, Ib	Load current	0.5 A

, the Bode plots of ${\widehat{v}}_{\mathrm{b}}/{\widehat{i}}_{\mathrm{a}}$ and ${\widehat{v}}_{\mathrm{a}}/{\widehat{i}}_{\mathrm{b}}$ under both a conventional voltage mode-controlled and a voltage ripple-controlled PCCM SIDO buck converter are depicted in Figure 7.

Comparing the low-frequency gains of these two controls in Figure 7 shows that the low-frequency gains (−210 dB) of the voltage mode-controlled PCCM SIDO buck converter are a very negative value. According to the definition of amplitude in the Bode plot and the logarithmic algorithm, it can be considered that there may be only a little cross-regulation between different outputs. Moreover, the low-frequency gains of the voltage ripple-controlled PCCM SIDO buck converter are smaller than those of the voltage mode-controlled PCCM SIDO buck converter. These results show that the cross-regulation of the voltage ripple-controlled PCCM SIDO buck converter is so much smaller than those of the voltage mode-controlled that it can be regarded as no cross-regulation entirely.

3.4. Load-Transient Response Analysis in Frequency Domain

Figure 8a manifests the Bode plots of output impedance transfer function for output A ${\widehat{v}}_{\mathrm{a}}/{\widehat{i}}_{\mathrm{a}}$ of the PCCM SIDO buck converters under voltage mode control and voltage ripple control, respectively. The low frequency magnitude of ${\widehat{v}}_{\mathrm{a}}/{\widehat{i}}_{\mathrm{a}}$ for the voltage ripple-controlled is clearly lower than the voltage mode-controlled, which means that the load transient response of the voltage ripple-controlled PCCM SIDO buck converter is faster than that of the voltage mode-controlled when load variation of output A occurs. Figure 8b shows the Bode plot of the output impedance transfer function ${\widehat{v}}_{\mathrm{b}}/{\widehat{i}}_{\mathrm{b}}$ for output B under voltage mode control and voltage ripple control, which can prove that the low frequency amplitude of ${\widehat{v}}_{\mathrm{b}}/{\widehat{i}}_{\mathrm{b}}$ for voltage ripple control is lower than that of the voltage mode control. These results indicate that the load transient response of the voltage ripple-controlled PCCM SIDO buck converter is faster than that of the voltage mode-controlled.

4. The Load Range and Efficiency Analysis

In the voltage ripple-controlled PCCM SIDO buck converter mentioned above, the constant reference current control is used to manage the freewheeling switch S₂. Therefore, a power limitation is imposed on the converter by this control scheme. In other words, the converter’s performance is closely related to the value of the freewheeling current. In this section, the load range and efficiency are investigated in detail, which can supply design guidance for future studies.

4.1. Load Range

Analyzing the load range is beneficial for the optimization of parameters, which can ensure both the output A and output B of a SIDO buck converter operate in PCCM. If the output currents i_a and i_b surpass the maximum output currents i_a(max) and i_b(max), the converter will transfer from PCCM to CCM mode; therefore, the different outputs are coupled, and the cross-regulation occurs.

Analyzing the volt-second balance on the inductor L, we can find that

$$m_{\mathrm{a}1}{d}_{\mathrm{a}1}=m_{\mathrm{a}2}{d}_{\mathrm{a}2},m_{\mathrm{b}1}{d}_{\mathrm{b}1}=m_{\mathrm{b}2}{d}_{\mathrm{b}2}$$

(18)

where m_ai(i=1,2) and m_bi(i=1,2) represent the charging and discharging slopes of the inductor current, respectively, and d_ai(i=1,2) and d_bi(i=1,2) represent the charging and discharging times of output A and output B, respectively.

Since the inductor current is equivalent to the output current, the output currents can be shown based on Equation (18).

$$i_{\mathrm{a}}=\left(1+m_{\mathrm{a}1}/m_{\mathrm{a}2}\right)\left(I_{\mathrm{dc}}+m_{1\mathrm{a}}{d}_{\mathrm{a}1}{T}_{\mathrm{s}}/2\right)d_{\mathrm{a}1}$$

(19)

$$i_{\mathrm{b}}=\left(1+m_{\mathrm{b}1}/m_{\mathrm{b}2}\right)\left(I_{\mathrm{dc}}+m_{\mathrm{b}1}{d}_{\mathrm{b}1}{T}_{\mathrm{s}}/2\right)d_{\mathrm{b}1}$$

(20)

From Equations (18)–(20), the maximum output current occurs when d_a1 + d_a2 = T_a/T_s and d_b1 + d_b2 = T_b/T_s. Therefore, the maximum output currents of the PCCM SIDO buck converter are

$$i_{\mathrm{a}\left(\max \right)}=\left(I_{\mathrm{dc}}+\left(V_{\mathrm{g}}-V_{\mathrm{a}}\right)V_{\mathrm{a}}{T}_{\mathrm{a}}/2L{V}_{\mathrm{g}}\right)T_{\mathrm{a}}/T_{\mathrm{s}}$$

(21)

$$i_{\mathrm{b}\left(\max \right)}=\left(I_{\mathrm{dc}}+\left(V_{\mathrm{g}}-V_{\mathrm{b}}\right)V_{\mathrm{b}}{T}_{\mathrm{b}}/2L{V}_{\mathrm{g}}\right)T_{\mathrm{b}}/T_{\mathrm{s}}$$

(22)

Note that i_a(max) and i_b(max) are positively correlated to I_dc. The larger I_dc can extend the load range for PCCM operation.

4.2. Efficiency

Generally, power losses on a semiconductor are the main source of power losses that influence the efficiency of a PCCM SIDO buck converter. As mentioned in [20,21], the losses caused by semiconductor losses mainly consist of two parts: (1) conduction losses P_con; (2) switching losses P_sw, including turn-on losses P_sw(on) and turn-off losses P_sw(off).

The conduction losses of switching device are equal to the product of the square of the transistor rms current and the ON-state resistance, while for the diode, the product of the forward conduction voltage and the average value of rms current can represent its conduction losses [22]. The turn-on resistance of power switches S₁, S₂, S_a, and S_b are defined as r_on1, r_on2, r_ona, and r_onb, respectively; and the forward voltage of diodes D₁, D₂, D_a, and D_b are defined as V_F1, V_F2, V_Fa, and V_Fb, respectively, while the conduction loss P_con can be calculated by Equation (23).

$$\begin{array}{ll}{P}_{\mathrm{con}}& =I_{\mathrm{L}}{}^2{D}_{\mathrm{a}1}\left(r_{\mathrm{ona}}+r_{\mathrm{on}1}\right)+I_{\mathrm{L}}{}^2{D}_{\mathrm{a}2}{r}_{\mathrm{ona}}+I_{\mathrm{L}}{V}_{\mathrm{F}1}{D}_{\mathrm{a}2}\\ & +I_{\mathrm{L}}{}^2{D}_{\mathrm{a}3}{r}_{\mathrm{on}2}+I_{\mathrm{L}}{V}_{\mathrm{F}2}{D}_{\mathrm{a}3}+I_{\mathrm{L}}{}^2{D}_{\mathrm{b}1}\left(r_{\mathrm{onb}}+r_{\mathrm{on}1}\right)\\ & +I_{\mathrm{L}}{}^2{D}_{\mathrm{b}2}\left(r_{\mathrm{onb}}+r_{\mathrm{on}1}\right)+I_{\mathrm{L}}{}^2{D}_{\mathrm{b}3}{r}_{\mathrm{on}2}+I_{\mathrm{L}}{V}_{\mathrm{F}2}{D}_{\mathrm{b}3}\end{array}$$

(23)

Switching on and off will lead to the switching loss, which is mainly affected by the switching frequency f_s, the drain-source parallel capacitor C_ds, and the diode forward voltage V_SD. The power switch diode forward voltages S₁, S₂, S_a, and S_b are defined as V_SD1, V_SD2, V_SDa, and V_SDb, respectively; while the parallel capacitors of the power switches S₁, S₂, S_a, and S_b are defined as C_ds1, C_ds2, C_dsa, and C_dsb, respectively. Therefore, the switching losses can be calculated by Equation (24).

$$\begin{array}{ll}{P}_{\mathrm{SW}}& =P_{\mathrm{SW}\left(\mathrm{on}\right)}+P_{\mathrm{SW}\left(\mathrm{off}\right)}\\ & =C_{\mathrm{ds}1}{\left(V_{\mathrm{g}}-V_{\mathrm{SD}1}\right)}^2{f}_{\mathrm{s}}+0.5C_{\mathrm{dsa}}{\left(V_{\mathrm{b}}-V_{\mathrm{a}}\right)}^2{f}_{\mathrm{s}}\\ & +0.5C_{\mathrm{dsb}}{\left(V_{\mathrm{a}}-V_{\mathrm{b}}\right)}^2{f}_{\mathrm{s}}\end{array}$$

(24)

The output power of a PCCM SIDO buck converter is P_out = V_aI_a + V_bI_b; thus, the efficiency η can be calculated by the relative losses:

$$\eta =P_{\mathrm{out}}/\left(P_{\mathrm{out}}+P_{\mathrm{con}}+P_{\mathrm{SW}}\right)$$

(25)

Using the MOSFET BSC010N04LS, its parasitic parameters are r_on = 1 m, C_oss = 1900 pF, C_rss = 160 pF, C_ds = C_oss − C_rss, and V_SD = 0.8 V; and the diode MBRA320 is V_F = 0.5 V. The efficiency curves with variation of load current are shown in Figure 9.

Figure 9a shows that when the load current i_b keeps 1 A, the load current i_a varies from 1 A to 0.3 A, and the efficiency significantly decreases. As Figure 9b shows, when i_a = 1 A, the i_b changes from 1 A to 0.3 A, and the efficiency decreases slowly. When the load current i_a is equal to i_b and both of them vary into light load, the efficiency decreases rapidly, as shown in Figure 9c.

According to the above analysis, it is reasonable to conclude that, when the load is in a light load, the efficiency of the voltage ripple-controlled PCCM SIDO buck converter is low. The reason can be easily identified that, the freewheeling switch of PCCM SIDO buck converter using constant-reference-current control, so the freewheeling time will increase under light load, which increases the loss and reduces the efficiency.

5. Experimental Waveforms

To verify the effectiveness of the proposed voltage ripple-controlled PCCM SIDO buck converter in cross-regulation suppression, load transient improvement, and the theoretical analysis of load range and efficiency, the experimental studies were carried out using the circuit parameters shown in Table 1.

5.1. Experimental Environment of Proposed Circuit

The experimental prototype is shown in Figure 10. The prototype in the figure includes a power converter, a control circuit, and three sampling circuits: the sampling circuit of A output voltage, the sampling circuit of B output voltage, and the sampling circuit of the inductor current. Based on the experimental prototype, the experimental results of the proposed PCCM SIDO buck converter are given. The advantages of the proposed converter are shown from the aspects of efficiency, cross-regulation, load range, and load transient, in comparison with the existing methods.

5.2. Cross-Regulation and Load Transient Analysis

Figure 11 shows the experimental waveforms of the PCCM SIDO buck converter when the load step-up variation of output happened. Under voltage mode control, experimental waveforms of the converter are shown in Figure 11a when only i_a was changed and shown in Figure 11b when only i_b was changed. Similarly, Figure 11c,d show the experimental waveforms of the voltage ripple-controlled PCCM SIDO buck converter with i_a and i_b changed, respectively. The description of Figure 12 is similar to that of Figure 11; the only difference is that Figure 11 describes the experimental waveforms when the load step-up variation happened, while Figure 12 describes them when the load step-down variation happened. The following is the specific analysis:

For the purpose of investigating the cross-regulation performance, the load step-up experimental results of voltage mode control and voltage ripple control for the PCCM SIDO buck converter are shown in Figure 11. In Figure 11a, i_a stepped from 0.5 A to 1 A, while i_b was fixed at 1 A. About 0.64 ms (about sixteen switching periods) were required to regulate v_a, and the overshoot was 0.13 V. The experimental results when i_b stepped from 0.5 A to 1 A are shown in Figure 11b. About 0.4 ms (about ten switching periods) were required to regulate v_a. The undershoot of v_a was 0.08 V. Figure 11a clearly shows that for the voltage mode-controlled PCCM SIDO buck converter, there existed cross-regulation between different outputs.

For the voltage ripple-controlled PCCM SIDO buck converter, the corresponding load step experimental waveforms are shown in Figure 11b. When a load step change was implemented in i_a as shown in Figure 11c, the regulation time of v_a was about two switching periods. There was a little voltage ripple variation in v_a and no variation in v_b. Likewise, the regulation of output B took just one switching period, as shown in Figure 11d. The v_a did not have any variation. This illustrated that no cross-regulation existed for the voltage ripple-controlled PCCM SIDO buck converter.

Similarly, the experimental waveforms of the PCCM SIDO buck converter with output load step-down variation under voltage mode control and voltage ripple control are presented in Figure 12. It can be observed that, under voltage mode control, i_a and i_b varied from 1 A to 0.5 A, and the regulation of v_a and v_b took about 0.8 ms and 0.56 ms, respectively. The cross-regulation existed. However, it took only about 0.08 ms and 0.04 ms for voltage ripple control. Moreover, there is no obviously cross-regulation.

The above experimental results illustrate that there still existed cross-regulation for the voltage mode-controlled PCCM SIDO buck converter. On the contrary, the voltage ripple-controlled PCCM SIDO buck converter realized the absolute suppression of its cross-regulation. In addition, the load step had excellent transient performance.

5.3. Load Range Analysis

For verification purposes, the correctness of the theoretical analysis of the load range given earlier and the steady-state experimental waveforms of the voltage ripple-controlled PCCM SIDO buck converter were investigated with the same parameters, as shown in Table 1.

Putting these circuit parameters into Equations (21) and (22), the maximum load currents I_a(max) = 1.24 A and I_b(max) = 1.19 A were calculated. When I_a = I_a(max) = 1.24 A and I_b = 1 A, the freewheeling time of output A was zero, indicating that the output A operated in CCM. The corresponding steady-state experimental waveforms of the inductor current i_L, output voltage v_a and v_b, and the driver signal of freewheeling switch V_S2 are shown in Figure 13a. Similarly, when I_b = I_b(max) = 1.19 A and I_a = 1 A, the output B operates in CCM, and the corresponding experimental waveforms are presented in Figure 13b. The experimental results reveal the correctness of Equations (21) and (22).

5.4. Efficiency Analysis

The measured experimental efficiency of the conventional voltage mode-controlled and the proposed voltage ripple-controlled PCCM SIDO buck converter is illustrated in Figure 14, with the efficiency versus the load resistor R_a when i_b = 1 A. Figure 14 shows the peak efficiency was 90.6% when the load current was i_a = 1 A and i_b = 1 A. The efficiency significantly degraded at the low load current due to the conduction loss of the freewheeling switch S_f being dominant at the low load current, which verified the efficiency theoretical analysis shown in Figure 9. Comparing the efficiency curves of the conventional voltage mode-controlled and the proposed voltage ripple-controlled PCCM SIDO buck converter proved that while the control of the freewheeling switch followed the same control scheme such as the constant reference current control, the control scheme of the main switch did not affect efficiency significantly.

5.5. Comparison Analysis

The comparison among the existing literature for the PCCM SIDO DC–DC converter is presented in

Table 2. Survey of the existing literature on PCCM SIDO DC–DC converters.

References	This Study	Ref. [1]	Ref. [8]	Ref. [19]
Process	Discrete components	Discrete components	Discrete components	Discrete components
Conduction mode	PCCM	PCCM	CCM	CCM
Input voltage	20 V	24 V	10 V	12 V
Inductor	100 μH	3.4 μH	100 μH	100 μH
Frequency	20 kHz	100 kHz	50 kHz	50 kHz
Capacitors	550 μF	33 uF	470 μF	100 μF
Output voltages	12, 5 V	10, 10 V	3.3, 5 V	15, 24 V
Cross-regulation	0	0	0.4 mV/mA	0.0067 mV/mA
Load transient	1–2 Ts	\	6–8 Ts	7–8 Ts
Efficiency	90.6%	87.8%	\	94.3%

. In contrast to the existing studies [8,19] that solved the cross-regulation problem of the CCM SIDO DC–DC converter, the peak efficiency of this study was 90.6%, which is better than [8]. Although [19] was superior in efficiency, the proposed voltage ripple control technique had the advantage in both the load-regulation response and cross-regulation suppression. In addition, given the incomplete operation state and single inductor-current trend of the current mode-controlled CCM SIDO DC–DC converter, the stability in [19] was limited, which means the stability was affected by the input and output voltage. In this study, because of the utilization of the output-voltage ripple control, the input and output voltage did not affect the stability. Compared with the previous PCCM SIMO DC–DC converter studies, this study had a higher peak efficiency than that of [1], which showed the proposed converter could improve the efficiency successfully. Due to the superior performance in relative efficiency, load transient response, and cross-regulation, the proposed voltage ripple-controlled PCCM SIDO DC–DC converter is more advantageous in the application of SIDO power supply.

6. Conclusions

The voltage ripple-controlled PCCM SIDO buck converter with no cross-regulation and fast load transient response was proposed in this study. By establishing the small-signal model and portraying the Bode plots, this study theoretically investigated the cross-regulation. Based on its state equations, the load range expression of a PCCM SIDO buck converter was derived. In addition, the power losses were analyzed in detail. The efficiency curves were presented for different load conditions, which showed that the efficiency was significantly decreased under a light load. Compared with a conventional voltage mode-controlled PCCM SIDO buck converter, the proposed voltage ripple-controlled PCCM SIDO buck converter improved cross-regulation and the transient response significantly. The experimental results were fully demonstrated in order to confirm the theoretical analysis results and prove the superiority of the proposed converter.