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Article

A Serial Fault-Tolerant Topology Based on Sustainable Reconfiguration for Grid-Connected Inverter

1
Logistics Engineering College, Shanghai Maritime University, Shanghai 201306, China
2
Shanghai Electric Power Transmission & Distribution Group, Shanghai Electric Group Co., Ltd., Shanghai 200042, China
3
ISEN Yncréa Ouest Brest, UMR CNRS 6027 IRDL, 29200 Brest, France
*
Author to whom correspondence should be addressed.
J. Mar. Sci. Eng. 2023, 11(4), 751; https://doi.org/10.3390/jmse11040751
Submission received: 27 February 2023 / Revised: 19 March 2023 / Accepted: 28 March 2023 / Published: 30 March 2023
(This article belongs to the Special Issue The Development of Marine Renewable Energy)

Abstract

:
Grid-connected inverters are widely used to integrate energy into the grid in renewable energy applications. However, the inverter usually has a high probability of failure due to a large number of semiconductor devices. In addition, especially in the field of marine renewable energy, the humid environment in offshore and coastal areas may make the inverter more prone to failure, which reduces system reliability. Therefore, a serial fault-tolerant topology based on a sustainable reconfiguration is proposed. The proposed topology can be reconfigured continuously by making full use of healthy devices, which can ensure the output voltage capability and improve the possibility of uninterrupted performance as much as possible. In addition, the cooperative modulation signal is selected for the recombined topology to output the desired voltage, which ensures the quality of the power generated by marine renewable energy. Principles of topology reconfiguration and modulation signal selection is described in detail. Simulation and experimental results verify the validation of the proposed method on the seven-level grid-connected inverter.

1. Introduction

In recent years, renewable energy generation has been developing rapidly [1]. Marine renewable energy, including tidal energy, wave energy, marine current energy, ocean thermal energy and wind energy, has attracted more attention due to its reproducibility, cleanness and vast reserves [2,3,4]. The development and utilization of this energy can mitigate the dependency on fossil fuels to a large extent. Intensive research has been conducted on marine renewable energy technologies, especially in microgrid systems [5,6]. The power generated by marine renewable energy-based distributed generators can be inputted into the microgrid system. The harvested energy can be stored in the battery energy storage system (BESS). The BESS can fulfill energy management in the processes of charging and discharging. Similar to that of aircraft, the battery is recharged in standard operating conditions and helps the generator in fulfilling the load demand in case of generator overload [7]. In the microgrid system, the BESS can inject electric energy into the microgrid, and can store electric energy when the microgrid power generation exceeds the load demand. It can reduce power fluctuation due to the intermittence and unpredictability of renewable energy sources [8,9,10,11]. The microgrid can operate in grid-connected mode or islanded mode [12]. The inverter is an important element that can inject energy into the grid or the load. Compared to the traditional two-level inverter, a multilevel inverter is used in high-power applications due to lower total harmonic distortion (THD), lower switching losses and lower switching frequency [13,14]. However, the power semiconductor devices and electrolytic caps are both fragile components in power electronic systems [15,16]. In addition, the failure probability of the insulated-gate bipolar transistor (IGBT) modules is further heightened due to high humidity levels in marine renewable energy applications [17].
The failures in semiconductor devices are mainly divided into open-circuit fault and short-circuit fault. The IGBT short circuits are the catastrophic failures, which immediately trip or damage the system [18]. Therefore, a protection circuit will be designed, and the short-circuit fault will be converted into the open-circuit fault. The open-circuit fault usually does not cause the system to crash immediately. However, the inverter output voltage becomes distorted, which further results in the malfunction of the inverter. It may propagate downstream to the grid or the load. Therefore, if the grid-connected inverter fails, the microgrid system switches from grid-connected mode to islanded mode to cut off fault propagation. After the fault is eliminated, the microgrid system can be reconnected with the grid. Many FT methods have been proposed to ensure the normal operation of the inverter after a failure of the IGBT. Nonetheless, little research has been aimed at serial fault conditions, which means the fault occurs again after the FT control is performed. Moreover, serial faults are likely to occur in the industrial field, especially for marine renewable energy power generation due to the harsh environment. Once a serial fault occurs in the inverter, the FT control method is unable to be executed. It may cause shutdown and reliability reduction. In addition, power electronic converters, including inverters, may be far from the shore in the application of marine renewable energy. The cost of maintenance may be high due to the inaccessibility of the system. Therefore, it is meaningful to design FT control for the serial fault in marine renewable energy applications.
It is critical to diagnose the fault correctly for FT control. It has been deeply researched, and a lot of effective methods have been proposed in [19,20,21,22,23]. The method in [24] is proposed to give a suitable fault-tolerant scheme for different fault types. The method in [25] is mainly designed for motor drive systems. Those methods, based on flexibility software redundancy, can be easily implemented by drive controllers. However, the output voltage of the inverter is degraded. It may result in the capacity of the system being restricted, which cannot be applied to applications requiring the voltage amplitude. In order to maintain the amplitude of the output voltage, an FT design and a control method are proposed in [26]. The DC capacitor voltage is charged, which can maintain voltage output even if losing two levels. In [27], a novel voltage-balancing algorithm is proposed for FT control; it not only improves the performance, but also maintains voltage magnitude. The DC voltage can be boosted by controlling the shoot-through duty cycle in quasi network. Those methods are suitable for STATCOM applications. However, the voltage may not be improved in the BESS. Several FT control methods can maintain the voltage amplitude in the BESS, which are presented in [28,29,30]. Those methods use some additional semiconductor devices to construct the redundant paths. However, the types and number of failures may be limited due to the fewer number of redundant paths. Some FT approaches, which can solve more types of IGBT failure, are presented in [31,32,33]. Those methods use hardware redundancy such as a DC voltage source or an H-bridge, but it results in greater expense. To solve this problem, a new FT approach based on an auxiliary module and modified space vector modulation is proposed in [34]. The capacitor voltage is controlled to achieve the maximum rated power without an extra voltage source, which reduces the complexity and the size of the module. However, the capacitor voltage must be in the desired range, and the switching command is selected according to the capacitor voltage. It is not easy to be integrated into a drive controller. Another FT method based on pilot switch is presented in [35] for grid-connected inverters. However, after adopting this method, the inverter output voltage changes from five-level to three-level. It obviously results in the harmonic generation of grid-connected current. It will cause the degradation of power quality. In [36], a smart fault-tolerant method based on reconfigurable multilevel inverter topology is proposed. The inverter output voltage can be maintained after the first fault occurs, and the inverter can still output sinusoidal voltage when the second fault occurs. However, the number of levels of output voltage degrades, which may cause degradation of power quality. Another clever topology proposed in [37] improves the utilization rate of devices and the quality of output voltage. However, due to the difference in mapping relationships between modules, it may not be suitable for some specific fault sequences.
Considering some possible problems of the above fault-tolerant control methods in marine renewable energy applications, especially the failure to tolerate serial fault, these may lead to higher costs of shutdown and maintenance due to inaccessibility. In addition, the problem of decreasing the amplitude and quality of inverter output voltage will affect the quality of the power generated by renewable energy. Therefore, a serial fault-tolerant topology based on sustainable reconfiguration is proposed. The main novelty is that the topology can be reconfigured using more modes. In other words, this topology can utilize the remaining healthy components to continuously form new configurations when the device fails. It can not only maintain the amplitude of the inverter output voltage, but also improve the possibility of uninterrupted operation of the inverter as much as possible. On this basis, the inverter outputs the desired voltage waveform through controlling the modulation signal. Therefore, the quality of the power generated by renewable energy can be improved as much as possible after fault-tolerant control. In conclusion, the proposed method provides smooth and reliable operation in case of a serial fault.

2. Fault Analysis for Grid-Connected Inverters

2.1. Fault Effect on the H-Bridge

BESS is usually used to store the power generated by marine renewable energy due to the latter’s intermittent nature. It can stabilize the DC input to the inverter. It is equivalent to having four IGBTs and a DC power supply in the H-bridge cell. Figure 1 shows four working states of the H-bridge. The H-bridge is in a conduction state when the IGBTs in the diagonal position turn on. The output voltage of H-bridge is  + V d c  or  V dc . When the IGBTs in parallel positions turn on, the output voltage of the H-bridge is 0.
When any IGBT occurs in open circuit fault, the conduction states will be affected. The output voltage of the H-bridge will lose a level, which reduces the amplitude of the output voltage.

2.2. Fault Effect on the Grid-Connected Inverter

Figure 2 shows the overall marine renewable energy extraction chain. It includes a renewable energy conversion system with a power electronic converter. According to Section 2.1, the ability of the inverter output voltage is reduced due to faults. It may further affect the microgrid operating in grid-connected mode. The grid-connected inverter system’s mathematical model can be established as follows:
U x o = L d i x d t + R i x + e x
where  i x   e x  and  U x o  represent the grid current, the grid voltage and the inverter output phase voltage of x phase (x     {a, b, c}), respectively.  L  and  R  represent the filter inductance and the equivalent resistance, respectively.
In order to track and control the current, firstly, the three-phase grid current is converted from stationary coordinate system to rotating coordinate system. According to the principle of pulse width modulation (PWM), the output phase voltage of inverter  U x o  is equivalent to a sinusoidal AC voltage in the inertia link. Thus, the mathematical model in the  d q  reference frame can be obtained from (1):
u d = L d i d d t + R i d + e d ω g L i q u q = L d i q d t + R i q + e q + ω g L i d
where    i q  and  i d u q  and  u d e q  and  e d , and  ω g  represent the grid current on the q-coordinate and the d-coordinate axis; the equivalent output voltage of the inverter on the q-coordinate and the d-coordinate axis; the grid voltage on the q-coordinate and the d-coordinate axis; and the angular frequency of the grid voltage. Then, by adjusting the error through the PI controller, no static error tracking can be realized. The output modulated wave signal can be expressed as (3).
u d = k p + k i s i d i d ω g L i q + e d u q = k p + k i s i q i q + ω g L i d + e q  
where  k p k i  represent the proportional coefficient and the integral coefficient of the PI controller, respectively.  i q  and  i d  represent the current reference value on the q-coordinate and the d-coordinate, respectively. Assuming the system operates in a stable state,  i d    and  i q  are controlled to a reference value and 0, respectively. Therefore, the equivalent output voltage of the inverter  u d  can be deduced from (2).
u d = R i d + e d
Assuming that the grid current is stably controlled,  i d  will be equal to a constant greater than 0. From (4), the equivalent output voltage of the inverter  u d  will be greater than the grid voltage  e d u d  is the output modulated wave signal to control the output voltage of the inverter.
However, the ability of the inverter output voltage is reduced due to faults, which results in the inability to output the equivalent voltage by PWM. Formula (4) will no longer hold. This proves that the IGBT fault will influence the control of the grid current. Therefore, it is necessary for grid-connected inverters to compensate output voltage when IGBT fails.

2.3. Problem Description

According to the analysis of Section 2.2, the FT control method applied to grid-connected inverters in renewable energy power generation is required to maintain the voltage amplitude. However, it is difficult to meet this requirement without hardware redundancy. The faulty electronic device is directly replaced in some of the hardware redundancy methods. It is usually applied in some sensitive applications. However, those methods greatly increase the complexity, size and cost. In addition, reconfiguration of the circuit is also a method. In fact, such methods are often used to meet some requirements in applications [38,39]. The fault-tolerant control methods based on topology reconfiguration usually remove the faulty equipment and provide an additional output path for DC power supplies. However, it may cause an increase in the power loss of IGBTs.
The power loss of the IGBT consists of switching loss and conduction loss. The conduction loss is mainly affected by the duty cycle. In the reconfigured topology, the input voltage of the inverter changes. The switch loss of the IGBT  P s w , I  is usually analyzed as follows, using the linear difference method in [40].
P s w , I     f s w ,   U D C , î
where  f s w  is the switching frequency in a cycle,  U D C  is the DC side voltage and  î  is the forward peak current. According to Kirchhoff’s voltage law, the DC side voltage is improved after performing those FT methods [36,37]. Forward peak current is constant due to grid-current control. Equivalent switching frequency is usually improved due to the change of the modulation algorithm. Therefore, the average switch loss of the IGBT in the reconfigured topology is usually improved. Then, the actual virtual junction  θ j .2  can be calculated as follows:
θ j .2 = θ u + P × R t h  
where  θ u P R t h  represent the mean ambient temperature, the power dissipation and the thermal resistance, respectively. Therefore, the actual virtual junction  θ j .2  will increase according to power dissipation  P . It results in the increment of the temperature dependence factor  π T . The operating voltage of some IGBTs also increase in [35,36,37]. Voltage dependence factor  π U  usually increases as the value of the operating voltage of IGBT, as shown in Table 1.
The failure rates of IGBTs  λ I G B T  can be calculated as follows, using Siemens SN-29500 prediction models.
λ I G B T = λ r e f × π D × π U × π T  
where  λ r e f  is the failure rate under reference conditions,  π D  is the factor of the drift sensitivity which can be seen as 1. Therefore, the failure rate of some IGBTs usually increases after the reconfiguration of topology. In addition, the failure rate of the IGBT module will be further improved in marine renewable energy applications due to the humid environment. Therefore, it is necessary to consider the serial fault and design the corresponding method.
Assuming a serial fault occurs, there is no redundant conduction path to compensate for the lost voltage in [35] because the topology converts to an H-bridge with two DC power supplies. The reconfiguration ability is limited due to fewer topology reconstruction modes. In [37], the topology can convert continuously to compensate output voltage. However, the mapping relationship between each set of switches is diverse. The topological structures are various after FT control is executed for faults in different locations. Therefore, this method may be not suitable for each sequence of serial faults. The FT control method proposed in [36] has the same mapping relationship between each set of switches, but the performance of the system decreases after the FT control is executed for the second faults because the reconfigurable topology is only divided into two parts. When the second fault occurs, both parts will be removed, and an H-bridge is reserved in the system. The utilization rate of devices is relatively low.
In order to address the abovementioned problem, a serial fault-tolerant topology based on a sustainable reconfiguration is improved, making use of healthy devices as much as possible to improve the quality of inverter output voltage. Furthermore, the topology reconstruction modes are increased to improve fault-tolerant capability. In addition, the topological structures are guaranteed to be the same, which can be suitable for each sequence of serial faults.

3. Materials and Methods

3.1. Serial Fault-Tolerant Topology Based on Sustainable Reconfiguration

In order to block the propagation of faults and improve the uninterrupted performance of the system, the SF-TC method will be activated to mitigate the impact of faults. Figure 3 shows the flow chart of the SF-TC method. Within, the topology reconfiguration based on sustainable reconfiguration is described in this section.
Taking the cascaded seven-level inverters as an example, Figure 4 shows the proposed serial fault-tolerant topology, in which  G i A i R i  and  L i  are the added relays (i ∈ {1, 2, 3}). There is no redundant back up H-bridge in this topology. This topology combines the traditional cascaded H-bridge and three sets of relays which operate in the fault condition. The first set is composed of  G 1 A 1 R 1  and  L 1 . The second set is made up of  G 2 A 2 R 2  and  L 2 . The third set is comprised of  G 3 A 3 R 3  and  L 3 . The relays are used to remove faulty components and recombine with healthy components. There are three reconstruction modes for this topology.
  • Mode I:
When IGBTs in  H i  fail,  G i A i R i L i  act to bypass  S 1 S 2 S 3 S 4  in  H i  and effectively use the DC power supply. Assuming that the IGBTs in  H 2  fail, the second set of relays will act. The resultant configuration is shown in Figure 5a. The IGBTs in  H 2  are bypassed, and two DC power supplies are connected in series to supply voltage for the IGBTs in  H 1 . In this topology, the normal H-bridge is defined as Module I. The reconstruction module, with four healthy IGBTs and two DC power supplies, is defined as Module II. Two bypass bridge arms are defined as bypass cells. The transformed topology is equivalent to the topology in Figure 5b. In summary, two topological spaces reconfigure a new topological space, which has the same mapping relationship as the original topological space. As shown in Figure 6, each topological space  H i , which notes the cell in topology, has the same mapping relationship  f x . It means the topology can be reconfigured continuously in the same way.
  • Mode II:
When the fault occurs in a module of topology in Figure 5a, such as Module I, the third sets of relays will act. As shown in Figure 5c, The IGBTs in Module I are bypassed. All DC power supplies start to supply voltage for the IGBTs in Module II. The reconstruction module with three DC power supplies is defined as Module III.
  • Mode III:
When the fault occurs in  S 4  in Module II, and only  S 2  fails in the bypass cell,  G 2  and  A 2  are used again. As shown in Figure 5d, Module II is recombined with the bypass cell, which is defined as Module IV. It can be equivalent to an H-bridge with two DC power supplies by modulation algorithm.
In order to obtain a better fault-tolerant effect, the utilization rate of devices should be effectively improved. Therefore, the reconstruction modes will be selected according to the failure. The corresponding switching strategy is shown in Figure 3.

3.2. Modulation Signal Selection Based on Piecewise Equivalent Substitution

Modulation signal selection based on piecewise equivalent substitution will be presented in this section. It can be divided into three steps. Firstly, the modules existing in topology need to be determined. Then, the time regions are divided. Finally, the modulation signals are selected according to the module and the time region.

3.2.1. Determination of Module

There are defined modules in the transformed topology. Among them, Module I can generate  V d c , 0, − V d c  voltage. Module II and Module IV are able to generate  2 V d c , 0, − 2 V d c  voltage. Module III has the ability to generate  3 V d c , 0, − 3 V d c  voltage. The modules in topology should be determined.

3.2.2. Division of Time Regions

For the inverter output voltage by level-shifted pulse width modulation in normal state, the modulation signal is generated by comparing the modulating wave  c m  with the carrier wave.  A c  is defined as the carrier amplitude. During a modulation period, the time region is divided as shown in Figure 7 R i +  refers to the time region when  i 1 A c   < c m i A c R i  refers to the time region when  i A c   < c m i + 1 A c .  In each region, the inverter should be ensured to output the corresponding voltage.

3.2.3. Selection of Modulation Signal

The modulation signal generated by carrier wave, which is used to drive two IGBTs in the same arm. For each module, the modulation signals need be selected to output the equivalent voltage in each region.
  • Case 1 (three Module I in the topological space):
When the topology includes three of Module I, the topology is the cascaded seven-level inverter. The modulation signals for each arm are given in Table 2, where  λ i +    represents the modulation signal which is generated by the ith layer carrier wave above the time axis.  λ i    represents the modulation signal which is generated by the ith layer carrier wave below time axis.  A i +  and  A i  represent the left and right arms in the ith H-bridge, respectively.
  • Case 2 (a Module I and a Module II in the topological space):
This case includes a special case which has a Module I and a Module IV in the topological space, where Module IV consists of a Module II and a bypass cell. Assuming that  λ m _ 2  is the modulation signal of the right bridge arm in Module II in this special case,  λ b  is the modulation signal of the left bridge arm in the bypass cell. When  λ m _ 2  = 0,  λ b   = 1, Module IV can be equivalent to Module II. Modulation signals for the arms in each module are given in Table 3, where the  A m _ 1 +  and  A m _ 1  are the left and right bridge arm of Module I, respectively,  A m _ 2 +  and  A m _ 2  are the left and right bridge arm of Module II, respectively.
In the  R 1 +  and  R 1 , Module II is in forward and reverse bypass states, respectively, and Module I is used to output equivalent voltage. Considering that Module II has a higher failure rate because of higher DC voltage than Module I, Module II is in conduction state, and Module I is used to compensate voltage in the  R 2 +  and  R 2 . In addition,  λ 2 +  is used to drive the left bridge arm in the  R 2 + , and  λ 2  is used to drive the right bridge arm in the  R 2 , and the switching loss is equally distributed to the two arms. In the  R 3 +  and  R 3 , Module II is in the conduction state, and Module I is used to compensate voltage, which can generate the equivalent voltage.
  • Case 3 (a Module III in the topological space):
Only a Module III is in the topology, which is the traditional three-level inverter. The three-level inverter decreases the output voltage level and keeps the voltage peak unchanged. The modulation signal can be generated by phase-shifted pulse width modulation.

4. Results

In order to evaluate the viability of the proposed SF-TC method, the simulation and experiment platform of the three-phase grid-connected inverter is built. The uninterrupted performance and the quality of grid current will be used to evaluate the performance of the SF-TC method.

4.1. Simulation Results of the SF-TC Method

A three-phase grid-connected system is built in (MATLAB)/Simulink. The structure of the grid-connected system is shown in Figure 2. Since the grid-connected system is a symmetrical structure, only a-phase will be discussed. In marine renewable energy applications, the BESS is usually used to reduce power fluctuation due to the intermittency and volatility of renewable energy. Therefore, a constant DC source is selected to simulate the inverter input voltage. The related parameters are shown in Table 4.
Figure 8 shows the grid current and the output voltage of a-phase. The whole process can be divided into seven stages. In the first stage, the system is in normal operation. The inverter outputs a seven-level voltage waveform. The grid current of a-phase  i a  is sinusoidal with high quality. The THD of  i a  is approximately 7.0%. At 1.5 s, the  S 2  in  H 2  fails. The system is in the second stage. The reverse conduction of  H 2  is broken, the output voltage of a-phase loses a level. The grid current is non-sinusoidal. Then, the SF-TC method is enabled at 2 s. The  H 2  is bypassed, and its power supply is connected in the  H 1 . The seven-level voltage is restored, and the THD of  i a  is restored.
In the fourth stage, a serial fault occurs in  S 4  in  H 1 . The phase voltage is affected, and the grid current is distorted. Subsequently, the SF-TC method is enabled again. The right arm of bypassed  H 2  is used to combine with the left arm of  H 1 , which can be equivalent to the H-bridge. The THD of  i a  is restored again. Later on, the  S 1  in  H 1  fails at 3.5 s. The SF-TC method is used to execute fault-tolerant control at 4 s. The output of phase voltage reduces to three-level, and the THD of the grid current is improved to about 11.84%, but it will not significantly impact the operation of the grid-connected inverter.
According to the simulation results, the SF-TC method can succeed in achieving fault-tolerant control three times continuously. Moreover, this method can also maintain the voltage amplitude. Therefore, the SF-TC method can be applied to fields which require maintaining the voltage amplitude.

4.2. Experimental Results of the SF-TC Method

In order to further validate the effectiveness of the SF-TC method, the experimental platform of a three-phase grid-connected system is built. The employed prototype is depicted in Figure 9. The 65 V-12.3 A DC source is used to simulate the power stored by marine renewable energy in BESS. The controller used in the experiment is dSPACE’s DS1102, and the cascaded seven-level inverter is adopted. The parameters of the experimental system are listed in Table 5. Since the topology in the third stage is equivalent to the fifth stage in the simulation, two fault-tolerant controls will be evaluated in the experiment.
Figure 10 shows the experimental results of the output voltage and grid current. This process will be described in detail below. Firstly, there are three of Module I in the grid-connected inverter topology. A symmetrical seven-level voltage with the amplitude of 195 V is generated. The grid current is a sinusoidal waveform. Then, an open-circuit fault occurs in  H 2 . Because the inverter loses a conduction state, the output voltage waveform is deformed. The change of output voltage results in the control of the grid current becoming unstable, and the grid current is distorted. Afterwards, the SF-TC method is enabled. There are both a Module I and a Module II in the inverter system. The output of this inverter is restored to seven-level voltage, and the amplitude of output voltage remains unchanged. The grid current returns to the sinusoidal waveform, and its THD is decreased. Subsequently, the next fault is set in  H 1 . This fault causes a serious impact. The grid-connected current increases sharply, which triggers circuit protection. The SF-TC method is enabled again to reduce the impact of this serial fault. There is only a Module III in the inverter system. The output voltage is degraded to the three-level voltage, but the amplitude remains basically unchanged. A sinusoidal grid current is generated, which can ensure the basic functioning of the system.
From these results, it can be concluded that the influence of serial fault on the inverter is lessened by the SF-TC method. The quality of the output voltage is maintained as much as possible, and the amplitude of output voltage can be maintained.

5. Discussion

To evaluate the proposed method, comparison among other fault-tolerant methods and the proposed method is given in Table 6. The fault-tolerant method in [24] does not require any hardware redundancy. Therefore, the cost of this method is the lowest. However, the amplitude of output voltage cannot be maintained. It results that this method cannot be suitable for the grid-connected inverter. The method in [26,30] can maintain the amplitude of out voltage. However, the method in [26] is only suitable for STATCOM applications, but not for BESS. The method in [30] can be implemented in BESS, and it does not require extra relays, resulting in higher reliability and less complexity. However, it cannot be used in the case of multiple IGBT failures or IGBT failures in different H-bridges. The method in [35,36,37] and the proposed method can tolerate multiple IGBT failures. However, the method in [35] can only be applied to five-level inverters, and the quality of output voltage decreases. In [36], the number of levels of inverter output voltage can be maintained when the first fault occurs. However, the number of levels will be reduced to three-level when the second fault occurs. Compared to [36], the proposed method is not adoptable in an asymmetric cascade multilevel inverter. The proposed method can achieve multiple fault-tolerant controls, which improves the possibility of uninterrupted operation. Moreover, the proposed method keeps the level number of inverter output voltage as high as possible. It can ensure the power quality injected into the grid.

6. Conclusions

A serial fault-tolerant topology based on sustainable reconfiguration has been proposed. As the healthy devices are fully utilized, the output voltage amplitude of the inverter can be maintained, which is suitable for grid-connected inverters in marine renewable energy applications. The proposed topology has the capability of continuous reconfiguration to perform fault-tolerant control, so the possibility of uninterrupted operation of the system is improved. It can reduce the high maintenance cost due to inaccessibility in marine renewable energy applications. The number of levels of inverter output voltage is improved as much as possible, so the power quality in the grid-connected renewable energy system is improved.
More investigation is needed in order to design a detailed strategy that can be suitable for any number of levels of inverter topology to achieve fault-tolerant capability. It would be a fruitful direction for future research.

Author Contributions

Conceptualization, Z.Z., T.W., G.C., Y.A.; methodology, Z.Z., T.W.; software, Z.Z., T.W.; validation, Z.Z., T.W., G.C., Y.A.; formal analysis, Z.Z., T.W., Y.A.; investigation, Z.Z., T.W., G.C.; resources, Z.Z., T.W., G.C., Y.A.; data curation, Z.Z., T.W.; writing—original draft preparation, Z.Z., T.W., G.C., Y.A.; writing—review and editing, Z.Z., T.W., G.C., Y.A.; visualization, Z.Z., T.W., G.C., Y.A.; supervision, T.W., Y.A.; project administration, T.W. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Four working states of the H-bridge: (a) forward conduction; (b) reverse conduction; (c) forward bypass; (d) reverse bypass.
Figure 1. Four working states of the H-bridge: (a) forward conduction; (b) reverse conduction; (c) forward bypass; (d) reverse bypass.
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Figure 2. The overall marine renewable energy extraction chain.
Figure 2. The overall marine renewable energy extraction chain.
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Figure 3. The flow chart of the SF-TC method.
Figure 3. The flow chart of the SF-TC method.
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Figure 4. Proposed serial fault-tolerant topology.
Figure 4. Proposed serial fault-tolerant topology.
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Figure 5. Transformed topology. (a) Transformed topology according to Mode I; (b) equivalent topology in (a); (c) Module III (d) Module IV.
Figure 5. Transformed topology. (a) Transformed topology according to Mode I; (b) equivalent topology in (a); (c) Module III (d) Module IV.
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Figure 6. The mapping relationship between topological spaces in proposed topology.
Figure 6. The mapping relationship between topological spaces in proposed topology.
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Figure 7. Division of time regions.
Figure 7. Division of time regions.
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Figure 8. Simulation results of serial fault-tolerant control.
Figure 8. Simulation results of serial fault-tolerant control.
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Figure 9. Laboratory built prototype.
Figure 9. Laboratory built prototype.
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Figure 10. Experimental results of serial fault-tolerant control.
Figure 10. Experimental results of serial fault-tolerant control.
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Table 1. Factor  π U  for transistors.
Table 1. Factor  π U  for transistors.
  U   / U m a x   0.3 0.40.50.60.70.80.91
Factor  π U  11111.11.31.84
Table 2. The modulation signals in Case 1.
Table 2. The modulation signals in Case 1.
Arm   A 1 +   A 2 +   A 3 +   A 1   A 2   A 3
Modulation signal   λ 1 +   λ 2 +   λ 3 +   λ 1   λ 2   λ 3
Table 3. The modulation signals in Case 2.
Table 3. The modulation signals in Case 2.
Region   R 1 +   R 2 +   R 3 +   R 1   R 2   R 3
  A m _ 1 +   λ 1 +   λ 2 +   λ 3 +   0   1   0
  A m _ 1   1   0   1   λ 1   λ 2   λ 3
  A m _ 2 +   1   1   1   0   0   0
  A m _ 2   0   1   1   1   0   0
Table 4. The parameters used in the simulation.
Table 4. The parameters used in the simulation.
ModuleParameters
DC source voltage  ( V dc 1   + V dc 2   + V dc 3 )195 V
Grid side voltage (v)130 V
Grid frequency (f)50 Hz
Filter inductance (L)4 mH
Table 5. System parameters.
Table 5. System parameters.
ParameterValue
Switching frequency5 kHz
DC source65 V
Isolation transformer1:2
Filter inductance6 mH
Grid frequency50 Hz
q-axis reference current0 A
d-axis reference current4 A
Table 6. Comparison of fault-tolerant methods.
Table 6. Comparison of fault-tolerant methods.
SchemeProposed[24][26][30][35][36][37]
Number of relays120308212
Ability to keep voltage amplitudeHighLowHighMediumLowMediumHigh
Ability to keep voltage qualityHighLowHighMediumLowMediumHigh
Applicable to BESSYesYesNoYesYesYesYes
Ability to work in asymmetric modeNoNoNoNoNoYesNo
The ability of multiple fault toleranceHighLowMediumLowLowMediumHigh
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Zhang, Z.; Wang, T.; Chen, G.; Amirat, Y. A Serial Fault-Tolerant Topology Based on Sustainable Reconfiguration for Grid-Connected Inverter. J. Mar. Sci. Eng. 2023, 11, 751. https://doi.org/10.3390/jmse11040751

AMA Style

Zhang Z, Wang T, Chen G, Amirat Y. A Serial Fault-Tolerant Topology Based on Sustainable Reconfiguration for Grid-Connected Inverter. Journal of Marine Science and Engineering. 2023; 11(4):751. https://doi.org/10.3390/jmse11040751

Chicago/Turabian Style

Zhang, Zhonglin, Tianzhen Wang, Guodong Chen, and Yassine Amirat. 2023. "A Serial Fault-Tolerant Topology Based on Sustainable Reconfiguration for Grid-Connected Inverter" Journal of Marine Science and Engineering 11, no. 4: 751. https://doi.org/10.3390/jmse11040751

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