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Article

Modeling a Dual-Mode Controller Design for a Quasi-Resonant Flyback Converter

1
Bachelor Program in Interdisciplinary Studie, National Yunlin University of Science and Technology, 123 University Road, Section 3, Douliou, Yunlin 64002, Taiwan
2
Department of Electrical Engineering, National Yunlin University of Science and Technology, 123 University Road, Section 3, Douliou, Yunlin 64002, Taiwan
*
Author to whom correspondence should be addressed.
Appl. Sci. 2019, 9(9), 1860; https://doi.org/10.3390/app9091860
Submission received: 16 February 2019 / Revised: 21 April 2019 / Accepted: 22 April 2019 / Published: 6 May 2019
(This article belongs to the Special Issue Selected Papers from IMETI 2018)

Abstract

:
The proposed system can overcome the disadvantage of a high peak current in quasi-resonant fly-back (QRF) converters when operated under heavy load conditions. The operating mode and control scheme of a QRF converter with dual-mode control were established and analyzed. The dual-mode control scheme not only enabled a valley-switching detection technique that satisfied the zero-voltage switching condition but also provided a constant frequency mechanism to reduce the conduction loss in QRF converters when operated in a continuous conduction mode and under heavy load conditions. The small-signal equivalent circuit model of QRF converter circuits was constructed using an average approximation method. The technological advancement of a QRF converter with a dual-mode controller was presented in this study. The circuit simulation result of the proposed QRF converter with a mix control scheme proved that the derived circuit component parameters meet the requirements of the converter.

1. Introduction

To improve the efficiency of an adapter operated under light load conditions, the adapter should be operated under discontinuous conduction mode (DCM), primarily due to the low current, zero-voltage-switching characteristic of the main power switch, and the zero-current switching characteristic of the output diode [1,2,3,4,5]. This can improve the efficiency of the power stage circuit and the power density characteristics [6,7,8,9]. An analysis of the active-clamp fly-back converter was proposed in [10]. In this research, a symmetrical control was used to drive the power switche, and the efficiency improved by 4% compared to the traditional RCD configuration. A fly-back converter with variable frequency control not only provides valley-switching but also reduces electromagnetic interference. Quasi-resonant fly-back (QR) converters operated under low and medium electrical loads are considered satisfactory due to their small size, low cost, and high efficiency. A QRF converter with a discontinuous conduction switching action should be operated in continuous conduction mode (CCM). A QRF converter has a high peak current and high switching loss, which reduces the efficiency of the converter when the main switch is turned off under a heavy load condition [11,12,13,14,15]. This study used an adaptive valley-switching circuit under a light load condition, and one strategy circuit using a constant limit switch to turn off the timing when the heavy load caused the input current in the fly-back converter to enter the CCM. Moreover, the conduction loss in a fly-back converter is reduced when a heavy load is applied [16,17,18,19,20,21]. In recent years, a strategy for mitigating transients of balanced and unbalanced system has been proposed, as presented in [22]. The supplemental strategy of Set point automatic adjustment with correction enabled (SPAACE) has been used to enhance its performance and extend its application to more generic electrical systems. The proposed algorithm had the following characteristics:
(1).
A quadratic prediction strategy for SPAACE to increase prediction accuracy.
(2).
A dead-zone band supplemental strategy for SPAACE to improve set point tracking.
(3).
An approach to implement SPAACE in unbalanced systems.
In this paper, a dual-mode fly-back converter is proposed. This converter has the advantages of high efficiency when a light load is applied, and low current stress due to the power switch when a heavy load is applied for low-power applications. In continuous and discontinuous conduction modes, both fixed-off time control and valley-switching control were applied to the converter [23]. This control scheme circuit will be vital for future QRF converters. However, the control method and stability of the converter can be explained using a control design unit. Therefore, this paper describes the operation of a dual-mode control QRF converter and analyzes its stability under dual-mode control.

2. QRF Converter with Dual-Mode Control

In order to illustrate the principle of a QRF converter with Dual-Mode Control, a fly-back converter circuit is shown in Figure 1. The fly-back transformer consists of a magnetizing inductor L m , a leakage inductor L l k , and a primary side inductor L p . The turn ratio is n. The other elements are the power switch Q 1 , diode D 1 , and drain-source capacitor C o s s in the QRF converter. In this section, the operation mode and control strategy are described. The design consideration of passive components and a small-signal model are derived.

2.1. Single-Switch Flyback Converter

QRF converters operated in DCM are designed such that they lower the switching loss in the circuit. Because of the resonance, L l k , C o s s , and a voltage spike across the drain and source of Q 1 were observed. L p is the primary inductance that comprises L m and L l k . The primary reason for the generation of leakage inductance is that energy stored in the primary side of the converter cannot couple to the secondary-side. This energy must be transferred. Hence, when the switch turns off, the energy of L l k causes a voltage spike in the drain-source voltage. C o s s releases the energy of L l k through the discharging path if the switch is turned on, and a voltage spike is induced. Figure 2a,b display the voltage of the switches for the DCM fly-back converter and QRF converter respectively. The analysis method of each operation mode of a QRF converter is discussed herein. The relationship between the lowest frequency and the primary inductance is also presented in the following section.
When Q 1 conducts, V g begins to charge to L p . The current in the inductor can be expressed as follows:
I L p ( t ) = V g L p t
At T o n , the peak current in the inductor I L p ( p k ) can be represented as follows:
I L p ( p k ) = V g L p T o n
When Q 1 is turned off, the energy stored in L l k cannot be transferred to the secondary side. Hence, C o s s begins to resonate with L l k . The voltage spike on the power switch ( V d s ( max ) ) is generated as follows:
V d s ( m a x ) = V g + n V o + I L p ( p k ) L l k C o s s
When the resonant energy stored in L l k and C o s s reaches zero during the degaussing, the drain source voltage ( V d s ) drops to the constant voltage until the magnetizing inductor releases energy. V d s can be expressed as follows:
V d s = V g + n V o
The primary current during T o f f can be derived as follows:
I L p ( p k ) = n V o L p T o f f
In the steady state, when the secondary side does not transmit current through the transformer, the primary side behaves as an RLC resonant circuit:
V d s ( t ) = V g + n V o e ( R p 2 L p ) t cos ( 2 π 1 2 π L p C o s s t )
where R p is the total resistance of a primary side path of transformer.
The fly-back converter enters the resonant state when the power switch of the QRF converter is turned off. The first valley switching time at a value of T v a l l e y can be obtained using the following representation of T v a l l e y :
cos ( 2 π f w T v a l l e y ) = 1
and
T v a l l e y = 1 2 f w = π L p C o s s .
The underdamped response case of the fly-back converter affects the drain-source voltage until the power switch conducts power again during T r e s o n a n t . The drain source voltage of the QRF converter produces an underdamped oscillation until the power switch begins to turn on at a T r e s o n a n t value of T v a l l e y . Thus, the switch cycle ( T s w ) of the fly-back converter can be determined using the following equation:
T s w = T o n + T o f f + T r e s o n a n t
and
T s w = L p V g I L p ( p k ) + L p n V o I L p ( p k ) + n V o e a t cos ( 2 π f w T r e s o n a n t ) .
The switching frequency formula at this mode can be estimated as follows:
f s w = n V g V o L p I L p ( p k ) n V o + L p V g I L p ( p k ) + n V g V o π 2 L p C o s s .
Then, the switching cycle T s w of the QRF converter can be obtained as follows:
T s w = T o n + T o f f + T v a l l e y
and
T s w = L p V g I L p ( p k ) + L p n V o I L p ( p k ) + π L p C o s s .
The final formula of the switching frequency at this mode can be estimated as follows:
f s w = n V g V o L p I L p ( p k ) n V o + L p V g I L p ( p k ) + n V g V o π L p C o s s .
In terms of the power stage design, the inductor is the primary component for input power determination. The input power of the fly-back converter ( P i n ) can be estimated using the following equation:
P i n = P o η = 1 2 L p ( I L p ( p k ) ) 2 f w .
The switching frequency formula can be rearranged as follows:
T s w = 1 f s w = L p ( I L p ( p k ) ) 2 η 2 P o .
By substituting T s w into (16), the following representation of I L p ( p k ) is obtained:
I L p ( p k ) = ( n V o L p + V g L P n V g V o ) ( 2 P o L p η ) ± ( n V o L p + V g L P n V g V o ) 2 + 4 ( π L p C o s s 2 P o L p η ) 2 .
Finally, the value of f s w can be found by substituting (17) into (14). The relationship of f s w with the input voltage and output load can be expressed as follows:
f s w = 4 P o η L p [ ( n V o L p + V g L P n V g V o ) ( 2 P o L p η ) ± ( n V o L p + V g L P n V g V o ) 2 + 4 ( π L p C o s s 2 P o L p η ) ] .
The minimum switching frequency ( f s w ( min ) ) is obtained at P o ( max ) and V i n ( min ) based on the above formula. To confirm the relation between L p and f s w ( min ) , the minimum inductance condition of L p can be designed for the inequality condition as follows:
L p 4 P o ( max ) η f s w ( min ) [ ( n V o L p + V g L P n V g V o ) ( 2 P o ( max ) L p η ) ± ( n V o L p + V g L P n V g V o ) 2 + 4 ( π L p C o s s 2 P o ( max ) L p η ) ] .
The QRF converter operates in discontinuous conduction mode. Moreover, the switching frequency changes due to variations in the input voltage (Vg), output voltage (Vo), and output power (Po). Thus, the minimum limit condition of the switching frequency must be considered in the proposed circuit. Figure 3 illustrates the curve of the relationship between f s w and V g .

2.2. Small-Signal AC Model

In steady state, the output voltage of a DMFBC is constant. On the basis of the state average method [24], a small-signal equation of DMFBC was obtained. The small-signal equation can be represented as follows:
L d i ^ ( t ) d t = D v g ^ ( t ) D v o ^ n + ( V g + V n I R o n ) d ^ ( t ) D R o n i ^ ( t )
and
C d v o ^ ( t ) d t = D i ^ ( t ) n v ^ ( t ) R I d ^ ( t ) n
and
i g ^ ( t ) = D i ^ ( t ) + I d ^ ( t ) .
The hats sign represents AC change. The relationship between stability and the equivalent series resistance of the output capacitor of a dual-mode fly-back converter (DMFBC) should be considered in greater detail, because the left-plane of the system circuit has a zero point that is produced by the output capacitor ESR which affects system stability. Moreover, the analysis technique of a conventional linear circuit was used in this proposed fly-back converter and the transfer function of DMFBC was derived for verification. To discuss the relationship between input and output voltages, first, the duty cycle was set to zero ( d ^ ( t ) = 0 ). Then, the open-loop voltage transfer function of the output to the input G v o v g was derived. The input voltage ( v g ^ ( t ) = 0 ) was set and derived, and the voltage transfer function of the control to the input G v g d was presented. These transfer functions describe how a control change influences input voltage. The relationships between the output voltage response and the different input voltage states were discussed. The relationship between G v o v g and G v g d is the most prevalent in terms of the input voltage loop gain. Figure 4 displays a small-signal AC equivalent circuit model of a DMFBC through the aforementioned derivation.
Many studies have discussed the derivation of a small-signal pulse-width modulator (PWM) equivalent circuit. In addition to considering the derivative of the primary power stage of a small-stage mode that has an effective duty cycle ( d e f f ) to output voltage and the loop control transfer function, we derived the input voltage to output voltage loop control transfer function and the effective duty cycle to output voltage loop control transfer function. A series of mathematical formulas that describe the technical aspects of a QRF converter, the transfer functions G v o v g ( s ) and G v o d ( s ) , were obtained in the s-domain of QRF converter. Moreover, we analyzed and derived the transfer function of a DMFBC to reveal the relationship between a pole-zero point and an asymptotic gain model. The output to input voltage open-loop transfer function can be estimated as follows:
G v o v g ( s ) = v o ^ ( s ) v g ^ ( s ) | d ^ ( s ) = 0 = G d o · 1 1 + s Q w o + ( s w o ) 2
and
G v o v g ( s ) = v o ^ ( s ) v g ^ ( s ) | d ^ ( s ) = 0 = ( n D D ) · 1 1 + s n L ( D ) 2 + s 2 n s 2 R L C ( D ) 2
where
G d o = ( n D D ) w o = D n L C Q = L C n · D R L .
G d o ,   ω o and Q are the analyzed keywords of the transfer function G v o v g ( s ) of the dual-mode control of a fly-back converter. In this mode, the physical parameter values R , L , and C serve a crucial role in designing the parameters for a QRF converter. To implement these parameters, the R, L, and C values used were respectively 3.61 Ω, 170 Ω, and 2000 μF at the heavier load. The control to input voltage transfer function can be estimated as follows:
G v o d ( s ) = v o ^ ( s ) d ^ ( s ) | v g ^ ( s ) = 0 = G d o · 1 s w z 1 + s Q w o + ( s w o ) 2
and
G v o d ( s ) = v o ^ ( s ) d ^ ( s ) | v g ^ ( s ) = 0 = ( D ( V g I R o n + V o n ) R D + D 2 R o n R D 2 R o n + ( D ) 2 R ) × [ 1 s ( ( I n ) D 2 R L D 2 R o n + ( D ) 2 R ) ( D 2 R o n + ( D ) 2 R D ( V g I R o n + V o n ) R D + D 2 R o n R ) ] 1 + ( D 2 L + D 2 R o n R C D 2 R o n + ( D ) 2 R ) s + ( D 2 R L C D 2 R o n + ( D ) 2 R ) s 2
and
G d o = D ( V g I R o n + V o n ) R D + D 2 R o n R D 2 R o n + ( D ) 2 R
and
w z = ( D 2 R o n + ( D ) 2 R ) [ D ( V g I R o n + V o n ) R D + D 2 R o n R ] ( I n ) D 2 R L ( D 2 R o n + ( D ) 2 R )
and
Q = ( D 2 R o n + ( D ) 2 R ) D 2 L + D 2 R o n R C D 2 R L C D 2 R o n + ( D ) 2 R
and
w o = D 2 R o n + ( D ) 2 R D 2 R L C .

3. Controller Design

To improve the frequency response of a dual-mode fly-back converter and simultaneously implement the converter performance, an adaptive compensator for obtaining the transfer function of G v o v g ( s ) and G v o d ( s ) is required. G v o d ( s ) is an important keyword of the system loop gain in a DMFBC and can be used to determine the performances of voltage and current loop compensators. A peak current control integrated circuit (IC) L6561 with a transient mode control performance was used in the fly-back converter. The fly-back converter is equipped with an adaptive detection circuit and judge circuit, and can be operated under heavy load or light load conditions to improve the converter efficiency of the converter.
When the fly-back converter with the constant duty cycle turn off control was operated under heavy load conditions, the converter entered to the CCM, the RMS current went through the power switch, and the quick diode was reduced. In contrast, the conduction loss increased. To apply the ZCD detection function of the IC L6561 control [22], the control gate drive signal was kept off until it was turned on in the next cycle of ZCD voltage level detection.
The ZCD action function can be estimated as follows:
{ V Z C D > V Z C D L i m i t = 5.7 V ,   G D = 0 V   ( L o w ) V Z C D < V Z C D _ T r i g e r = 0.7 V ,     G D = 15 V   ( H i g h ) .
A DMFBC with a ZCD detection strategy was presented in this study. The voltage-adjustable controller, optocoupler, PWM comparator, and fly-back converter were included in the control system. The transfer function of the circuit presented in Figure 5 can be expressed as follows. Figure 6 displays the fly-back converter and voltage regulation control system. Figure 6 presents a simplified block diagram of the dual-mode control, which is represented using dotted boxes.
G 1 ( s ) = s + w z R f 4 C b 1 s ( s + w p )
where
w z = 1 R f 4 C b 1   ( rad / s e c ) w P = C b 1 + C b 2 R f 4 C b 1 C b 2   ( rad / s e c )
and
G 2 ( s ) = v ^ b v ^ a = C T R · R f b 2 R f b 3
and
G 3 ( s ) = v ^ c o m p v ^ b = ( R f b 3 R f b 1 ) = [ ( 1 s C c o m p + R c o m p ) C b 5 ( 1 s C c o m p + R c o m p ) + C b 5 ] R f b 1
and
G 4 ( s ) = K 2 = d ^ v ^ c o m p = 1 V M
and
G 5 ( s ) = v ^ o d ^ = n V g
and
H ( s ) = R f 2 R f 1 + R f 2
G 1 ( s ) , G 2 ( s ) , G 3 ( s ) , G 4 ( s ) , G 5 ( s ) , and H ( s ) can be combined to obtain the open- and closed-loop voltage transfer function of a fly-back converter:
T F L Y _ O P E N ( s ) = G 1 ( s ) · G 2 ( s ) · G 3 ( s ) · G 4 ( s ) · G 5 ( s ) · H ( s )
Moreover, the closed-loop voltage transfer function can be expressed as follows:
T F L Y _ C L O S E D ( s ) = G 1 ( s ) · G 2 ( s ) · G 3 ( s ) · G 4 ( s ) · G 5 ( s ) 1 + G 1 ( s ) · G 2 ( s ) · G 3 ( s ) · G 4 ( s ) · G 5 ( s ) · H ( s )
The function characteristics of one compensator G V ( s ) are selected and explained by the following transfer function:
G 1 ( s ) = K s + w z s · ( s + w p )
Adding a zero point to the compensator reduces the phase lag and adds stability to a fly-back converter. It is expected that adding one pole point ( w p ) suppresses the switch noise to further increase the loop gain. Furthermore, it is expected that adding one pole point to the original point of the system would increase the low frequency gain of the studied fly-back converter.

4. Circuit Simulations and Experimental Verifications

Computer simulations were applied to validate the controller design criteria and the formula derived from the small-signal analysis model. The actual hardware specifications are presented in Table 1. MATLAB, a simulation tool, was used to obtain the Bode plot of the converter. Moreover, the mathematical equation of the transfer function was as follows:
The frequency response of the fly-back converter was simulated using the open-loop transfer functions G v o v g and G v o d at input voltages of 127 V d c and 380 V d c and at an output voltage of 19 V d c . For the compensator, a zero- and two-pole compensator (Type II) was used for the QRF converter:
C c o m p e n s a t o r ( s ) = 1 R f 4 C b 1 · ( s + ω z ) s · ( s + ω p )
This compensator can ensure closed-loop system stability, such as by increasing the low-frequency gain. For fly-back converter stability, the phase margin should be positive. As in [23], for an unconditionally stable switch mode, power conversion causes a gain margin of 6 dB and a phase margin of 45 ° . The design parameters of components were derived, and a real circuit was simulated and verified to determine the performance of a QRF converter when it is operated in the AC small-signal mode. A frequency domain response was obtained by substituting the component design parameters into the voltage open-loop transfer function and the voltage closed -loop transfer function of the fly-back converter. The responses of the voltage open- and closed-loop transfer functions of the fly-back converter are presented in Figure 7 and Figure 8, respectively. As presented in Figure 8, the fly-back converter is stable in voltage closed-loop mode, when the proposed design criterion is used because the phase margin is greater than 45 ° . Moreover, the figure can be used to validate the accuracy of the derived voltage closed-loop control, because the frequency response of the simulation is consistent with the principles of Bode plots.
The principle of a valley-switching detection technique is examined in this research. The valley-switching detector of the circuit in Figure 6 comprises a switch ( Q 2 ), comparator ( U 1 ), and resistors ( R f 8 R f 16 ). First, a voltage level ( V r e f 1 ) was applied to the valley voltage of the resonance at a half-resonance period. Then, the comparator captured the auxiliary winding feedback ( V a u x ) at the inverting input (−) pin and compared V a u x with the non-inverter input voltages ( V r e f 1 ) in the valley-switching detector. Each comparator had a non-inverting input (+), an inverting input (−), and an output. During the duration of t r e s o n a n t shown in Figure 2a and Figure 6, if V r e f 1 is higher than V a u x , the comparator’s output is at a high level, and Q 2 is turned on. When the GD’s output is at a high level, Q 1 is turned on while the ZCD pin voltage of L6561, V Z C D is lower than the internal voltage of L6561, V Z C D _ T r i g g e r (0.7V). Figure 9 shows the valley-switching waveform of the QRF converter at a light load when the input DC voltage is 380 V d c . However, when the trigger voltage signal ( V g s 2 ) is sufficiently higher than V t h   (the gate threshold voltage of the power switch, V t h ), Q 2 will turn on. Also, the power switch Q 1 will be turned on.
Figure 9 shows the experimental waveforms of the gate-to-source voltage V g s , the drain-to-source voltage V d s , and the gate-to-source voltage V g s 2 when the input DC voltage is 380   V d c at a light load. The fly-back converter is operated in DCM, and V d s resonates to its third valley before Q 1 is turned on. Figure 10b shows the waveforms of I d , I Q 1 , and V d s when the input DC voltage is 127   V d c and the load current is 5.26 A. The fly-back converter is operated in CCM at the same load level. Figure 10 shows the waveforms of I d , I Q , and V d s when the input voltage is 127 V d c and the output power is 100 W, respectively. Figure 11 shows the waveforms of I d , I Q , and V d s when the input voltage is 380   V d c and the output power is 100 W, respectively.
Table 2 presents the measured efficiencies of the proposed dual-mode controller for a QRF converter operated at an input voltage and constant output power of 127   V d c and 380   V d c , respectively.
The measured efficiency curves versus output powers with different input voltages are shown in Figure 12. A Voltech power analyzer (PM3000A) was used to measure the efficiency of the QRF converter. At the rated full load, the proposed conversion efficiency was about 88%.

5. Conclusions

A dual-mode control scheme for the QRF converter was used in this study. The dual-mode control scheme involved a valley-switching detection technique to satisfy the zero-voltage switching requirement. A constant frequency mechanism was proposed to reduce the conduction loss of the QRF converter when it was operated in the CCM and when a heavy load was applied. A 100 W QRF converter prototype with dual-mode control was proposed to verify the applicability of theoretical analysis. Moreover, an AC small-signal model for a QRF converter was proposed. An adaptive controller with a detection circuit that can operate under light- or heavy-load conditions was designed and used in the study. The simulation and experimental results of the proposed control scheme for the fly-back converter were demonstrated. Moreover, the accuracy of an AC small-signal model was compared and verified. An adaptive Type II compensation for a QRF converter that can operate under a heavy-load and a light-load was designed. The function and performance of a QRF circuit were evaluated to verify the practicality of the proposed dual-mode control approach.

Author Contributions

C.-C.C., C.-C.H., C.-Y.H. and L.-K.J. conceived and designed the prototype circuit; C.-C.C. and C.-Y.H. performed simulations and experiments, and analyzed data obtained by C.-C.C., C.-C.H., C.-Y.H. and L.-K.J.; C.-C.H. contributed equipment, materials, and analysis tools. C.-C.C., C.-C.H., C.-Y.H. and L.-K.J. wrote the paper.

Funding

This research was funding by the National Science Council of Taiwan under grant number MOST 107-2622-E-224-009-CC3.

Acknowledgments

This research was supported by the National Science Council of Taiwan under grant number MOST 107-2622-E-224-009-CC3. The equipment used for experiments was provided by the Basic Research Program, Renewable Energy Research Center, National Yunlin University of Science and Technology.

Conflicts of Interest

The authors have no conflict of interest to declare.

References

  1. Liu, K.H.; Qruganti, R.; Lee, F.C. Quasi-resonant converters—Topologies and characteristics. IEEE Trans. Power Electron. 1987, 2, 62–71. [Google Scholar] [CrossRef]
  2. Lee, F.C. High-Frequency Quasi-Resonant Converter Topologies. Proc. IEEE 1988, 76, 377–390. [Google Scholar] [CrossRef]
  3. Vorperian, V. Quasi-Square-wave Converters: Topologies and Analysis. IEEE Trans. Power Electron. 1998, 3, 183–191. [Google Scholar] [CrossRef]
  4. PWM Current-Mode Controller for Free Running Quasi-Resonant Operation, On Semiconductor NCP1207 Datasheet; Rev. 11; On Semiconductor: Denver, CO, USA, December 2011.
  5. Lo, Y.-K.; Lin, J.-Y.; Wang, C.-F.; Lin, C.-Y. Analysis and Design of a Dual-Model Flyback Converter. In Proceedings of the 2010 IEEE International Conference on Sustainable Energy Technologies (ICSET), Kandy, Sri Lanka, 6–9 December 2010; pp. 1–5. [Google Scholar]
  6. Yeh, C.A.; Lai, Y.S. Novel hybrid control technique with constant on/off time control for DC/DC converter to reduce the switching losses. In Proceedings of the 2009 International Conference on IEEE Power Electronics and Drives Systems Conference, Taipei, Taiwan, 2–5 November 2009; pp. 848–853. [Google Scholar]
  7. Watson, R.; Hua, G.C.; Lee, F.C. Characterization of an active clamp flyback topology for power factor correction applications. IEEE Trans. Power Electron. 1996, 11, 191–198. [Google Scholar] [CrossRef]
  8. Papanikolaou, N.P.; Tatakis, E.C. Active voltage clamp in flyback converters operating in CCM mode under wide load variation. IEEE Trans. Ind. Electron. 2004, 51, 632–640. [Google Scholar] [CrossRef]
  9. Ridley, R.B. A new continuous-time mode for current-mode control with a constant frequency, constant on-time, and constant off-time, in CCM and DCM. In Proceedings of the 21st Annual IEEE Conference on Power Electronics Specialists, San Antonio, TX, USA, 11–14 June 1990; pp. 382–389. [Google Scholar]
  10. Watson, R.; Lee, F.C.; Hua, G.C. Utilization of an active-clamp circuit to achieve soft switching in flyback converters. IEEE Trans. Power Electron. 1996, 11, 162–169. [Google Scholar] [CrossRef]
  11. Arouodi, A.E.; Mandal, K.; Giaouris, D.; Banerjee, S. Self-compensation of DC-DC converters under peak current mode control. Electron. Lett. 2017, 53, 345–347. [Google Scholar] [CrossRef]
  12. Kim, E.; Chung, B.; Jang, S.; Choi, M.; Key, M. A study of novel Flyback converter with very low power consumption at the standby operating mode. In Proceedings of the 2010 Twenty-Fifth Annual IEEE, Applied Power Electronics Conference and Exposition (APEC), Palm Springs, CA, USA, 21–25 February 2010; pp. 1833–1837. [Google Scholar]
  13. Alou, P.; Garcia, O.; Cobos, J.A.; Uceda, J.; Rason, M. Flyback with active clamp: A suitable topology for low power and very wide input voltage range applications. In Proceedings of the APEC Seventeenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No. 02CH37335), Dallas, TX, USA, 10–14 March 2002; Volume 1, pp. 242–248. [Google Scholar]
  14. Chen, B.Y.; Lai, Y.S. Novel dual mode operation of phase-shifted full bridge converter to improve efficiency under light load condition. In Proceedings of the IEEE Energy Conversion Congress and Exposition, San Jose, CA, USA, 20–24 September 2009; pp. 1367–1374. [Google Scholar]
  15. Jang, Y.; Jovanovic, M.M. Light-load efficiency optimization method. IEEE Trans. Power Electron. 2010, 25, 67–74. [Google Scholar] [CrossRef]
  16. Ayachit, A.; Reatti, A.; Kazimierczuk, M.K. Magnetising Inductance of Multiple-Output Flyback DC-DC Converter for Discontinuous-Conduction Mode. IET Power Electron. 2016, 10, 451–461. [Google Scholar] [CrossRef]
  17. Saliva, A. Design Guide for Off-Line Fixed Frequency DCM Flyback Converter, Infineon Technologies North America, Design Note DN 2013-01. Available online: https://www.infineon.com (accessed on 15 August 2017).
  18. Panov, Y.; Jovaovic, M. Small-Signal Analysis and Control Design of Isolated Power Supplies with Optocoupler Feedback. IEEE Trans. Power Electron. 2005, 20, 823–832. [Google Scholar] [CrossRef]
  19. Karvelis, G.A.; Manias, S.N. Analysis and Design of Flyback Zero-Current Switched (ZCS) Quasi-Resonant AC/DC Converter. Proc. IEEE Electr. Power Appl. 1997, 144, 401–408. [Google Scholar] [CrossRef]
  20. ST Microelectronics. Solution for Designing a 400W Fixed Off-Time Controlled PFC Pre-Regulator with the L6562A. Application Note AN2782. Available online: https://www.st.com (accessed on 15 August 2017).
  21. Kit Sum, K. Switch Mode Power Conversion; Marcel Dekker: New York, NY, USA, 1984. [Google Scholar]
  22. Ghaffarzadeh, H.; Stone, C.; Mehrizi-Sani, A. Predictive Set Point Modulation to Mitigate Transients in Lightly Damped Balanced and Unbalanced Systems. IEEE Trans. Power Electron. 2017, 32, 1041–1049. [Google Scholar]
  23. Adragna, C.; Gattavari, G. Fly-Back Converters with the L6561 PFC Controller; STMicroelectronics: Geneva, Switzerland, 2003. [Google Scholar]
  24. Erickson, R.W.; Maksimović, D. Fundamentals of Power Electronics, 2nd ed.; Kluwer Academic Publishers: Norwell, MA, USA, 2001. [Google Scholar]
Figure 1. Fly-back converter circuit.
Figure 1. Fly-back converter circuit.
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Figure 2. Drain-source voltage of the power switch used in a discontinuous conduction mode (DCM) fly-back converter and quasi-resonant fly-back (QRF) converter with a discontinuous conduction mode: (a) drain-source voltage of the power switch in the DCM fly-back mode and (b) drain-source voltage of the power switch in the QRF operation mode.
Figure 2. Drain-source voltage of the power switch used in a discontinuous conduction mode (DCM) fly-back converter and quasi-resonant fly-back (QRF) converter with a discontinuous conduction mode: (a) drain-source voltage of the power switch in the DCM fly-back mode and (b) drain-source voltage of the power switch in the QRF operation mode.
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Figure 3. Curve of the relationship between f s w and V g .
Figure 3. Curve of the relationship between f s w and V g .
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Figure 4. Small-signal ac equivalent circuit of the DMBFC.
Figure 4. Small-signal ac equivalent circuit of the DMBFC.
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Figure 5. Block diagram of the voltage closed-loop control of the DMBFC.
Figure 5. Block diagram of the voltage closed-loop control of the DMBFC.
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Figure 6. Simplified circuit diagram of dual-mode control.
Figure 6. Simplified circuit diagram of dual-mode control.
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Figure 7. Frequency domain response of the voltage open-loop transfer function of the fly-back converter.
Figure 7. Frequency domain response of the voltage open-loop transfer function of the fly-back converter.
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Figure 8. Frequency domain response of the voltage closed-loop transfer function of the fly-back converter.
Figure 8. Frequency domain response of the voltage closed-loop transfer function of the fly-back converter.
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Figure 9. The valley-switching waveforms V g s , V d s , and V g s 2 at a light load when the input DC voltage is 380 V d c . ( V g s : 10 V/div,   V d s : 10 V/div, V G s 2 : 10 V/div, time: 2 μ s / div ).
Figure 9. The valley-switching waveforms V g s , V d s , and V g s 2 at a light load when the input DC voltage is 380 V d c . ( V g s : 10 V/div,   V d s : 10 V/div, V G s 2 : 10 V/div, time: 2 μ s / div ).
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Figure 10. (a) A conventional QR-mode operation waveform, I o = 5.26 A ( I d : 10 A/div,   I Q 1 : 2 A/div, V d s : 200 V/div, time: 4 μ s / div ), and (b) A conventional QR-mode and continuous conduction mode (CCM) operation waveform, I o = 5.26 A ( I d : 10 A/div, I Q 1 : 2 A/div, V d s : 200 V/div, time: 4 μ s / div ).
Figure 10. (a) A conventional QR-mode operation waveform, I o = 5.26 A ( I d : 10 A/div,   I Q 1 : 2 A/div, V d s : 200 V/div, time: 4 μ s / div ), and (b) A conventional QR-mode and continuous conduction mode (CCM) operation waveform, I o = 5.26 A ( I d : 10 A/div, I Q 1 : 2 A/div, V d s : 200 V/div, time: 4 μ s / div ).
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Figure 11. (a) shows a conventional QR-mode operation waveform, I o = 5.26 A ( I d : 10 A/div, I Q 1 : 2 A/div, V d s : 500 V/div, time: 4 μ s / div ), and (b) shows a conventional QR-mode and CCM operation waveform, I o = 5.26 A ( I d : 10 A/div, I Q 1 : 5 A/div, V d s : 500 V/div, time: 4 μ s / div ).
Figure 11. (a) shows a conventional QR-mode operation waveform, I o = 5.26 A ( I d : 10 A/div, I Q 1 : 2 A/div, V d s : 500 V/div, time: 4 μ s / div ), and (b) shows a conventional QR-mode and CCM operation waveform, I o = 5.26 A ( I d : 10 A/div, I Q 1 : 5 A/div, V d s : 500 V/div, time: 4 μ s / div ).
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Figure 12. Experiment efficiencies of the dual-mode QRF converter.
Figure 12. Experiment efficiencies of the dual-mode QRF converter.
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Table 1. Converters specifications.
Table 1. Converters specifications.
SymbolValueSymbolValue
Vin127~380 VdcLm170 μ H
Vo19V dcCo2000 μ F / 63 V
Po(max)100 WDmax0.4
Io(max)5.26 Afsw(min)40 kHz
Table 2. Comparison with existing control mode.
Table 2. Comparison with existing control mode.
Control ModeVin (V)Iin (A)Pin (W)Vo (V)Io (A)Po (W)η (%)
QR Control1270.842106.6818.73593.6587.70
QR Control3800.281106.9518.81594.0587.90
DM Control1270.833105.4118.85594.2589.20
DM Control3800.277105.2618.90594.5089.70

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MDPI and ACS Style

Chuang, C.-C.; Hua, C.-C.; Huang, C.-Y.; Jhou, L.-K. Modeling a Dual-Mode Controller Design for a Quasi-Resonant Flyback Converter. Appl. Sci. 2019, 9, 1860. https://doi.org/10.3390/app9091860

AMA Style

Chuang C-C, Hua C-C, Huang C-Y, Jhou L-K. Modeling a Dual-Mode Controller Design for a Quasi-Resonant Flyback Converter. Applied Sciences. 2019; 9(9):1860. https://doi.org/10.3390/app9091860

Chicago/Turabian Style

Chuang, Ching-Chun, Chih-Chiang Hua, Chong-Yu Huang, and Li-Kai Jhou. 2019. "Modeling a Dual-Mode Controller Design for a Quasi-Resonant Flyback Converter" Applied Sciences 9, no. 9: 1860. https://doi.org/10.3390/app9091860

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