A Virtual Direct Current Control Method of LCL-DAB DC-DC Converters for Fast Transient Response and No Backflow Power

Abstract

The LCL-type dual active bridge (LCL-DAB) DC-DC converter is a promising part for DC micro-grids due to its high voltage gain and low bridge current, but the issues of backflow power elimination and transient response optimization deserve attention in its operation. In this article, a virtual direct current control (VDCC) method of the LCL-DAB converter for fast transient response and no backflow power is proposed, which can eliminate the backflow power and improve the transient response against the input voltage and load disturbances. With dual-phase-shift (DPS) modulation scheme, the voltage-current characteristics are first analyzed using the phasor method. The small-signal mathematic model of the LCL-DAB converter is then established. The power characteristic is derived so the design regions of no backflow power can be graphed. On this basis, an appropriate outer phase shift ratio can be estimated to ensure a wide range of no backflow power operation. Moreover, a virtual voltage is generated to compensate in the control loop, thus the transient response against disturbances of the LCL-DAB converter can be improved under no backflow power. Simulation and prototype experimental results are presented to verify the feasibility of the proposed VDCC method.

1. Introduction

Micro-grid technology is a key part of the future intelligent power system [1] due to its high receptiveness capacity of distributed generations in power systems and high utilization efficiency of intermittent distributed generations [2]. In DC micro-grids, the DC-DC converters connect the DC bus to the renewable power generation devices [3], the energy storage devices [4], electric vehicles [5], and other loads [6], which can achieve reliable interconnection, fewer conversion devices, etc. [7] Compared with the traditional DC-DC converters such as the buck converter [8], dual active bridge (DAB) DC-DC converters have been widely used in the high power conversion, because they can achieve high power density, bidirectional power flow, and electrical isolation [9,10].

During the development of DAB converters, their topologies have been improved to meet various requirements. Resonant-type DAB converters account for a significant proportion of the improved converters. The LC resonant type DAB converter [11,12] replaces the filter inductor of the traditional DAB converter with a series inductor–capacitor tank, which can achieve the maximal voltage gain at the resonant frequency, but its regulating range of output voltage is limited. The LLC resonant type DAB converter [13,14] can achieve zero-voltage-switching (ZVS) in the whole operating range, but the wide range of frequency modulation control brings a burden to the controller. Different from the LLC resonant type DAB converter, the CLLC resonant-type DAB converter [15,16] can obtain the consistent forward and reverse characteristics, but the difficulty of parameter design and control is increased. Moreover, the LCL resonant-type DAB (LCL-DAB) converter [17,18] was proposed to significantly improve the voltage gain and reduce the bridge currents, and the adopted phase shift modulation scheme is simple and easy to implement.

Thus far, some research has been conducted on the operation principle, characteristic analysis, and optimized control methods of them. In [19], the operating mode with extended-phase-shift (EPS) modulation scheme and the principles of parametric design for the LCL-DAB converter were analyzed. Over the same period, the characteristics of the LCL-DAB converter with a dual-phase-shift (DPS) modulation scheme were mathematically derived in [20,21], but lacked a further control method, same as [19]. To ensure the ZVS of the LCL-DAB converter, the half-bridge ZVS boundaries were predicted using the frequency domain analysis method, which considers all relevant harmonics in the derivation. In terms of optimized control method, improved control strategies for the LCL-DAB converter with DPS [22], and triple-phase-shift (TPS) [23] modulation schemes were successively proposed, which can achieve ZVS operation in a wide range, but the complication of the algorithms made them difficult to apply.

However, for the LCL-DAB converter, most of these articles focus on the analysis and implementation of ZVS operation [24]. Compared with ZVS implementation, backflow power elimination and transient performance optimization also deserve, but lack, attention, because backflow power can increase current stress and conduction losses, and outstanding transient response can improve dynamic performance against disturbances. An optimized design method for the LCL-DAB converter was proposed in [25] to discuss the relationship between the backflow power and the harmonic components, but it cannot detail the exact design boundaries. A TPS modulation strategy for the LCL-DAB converter was presented in [26,27] to achieve the united power factor, i.e., eliminating the reactive power, but only the reactive power generated by the fundamental component can be eliminated due to the 1st harmonic approximation. Based on the ZVS conditions derived in [22], a model predictive control method for the LCL-DAB converter was proposed in [28] to improve the dynamic response under ZVS, but the adopted 1st harmonic approximation method is similarly less precise. It can be summarized that although the 1st harmonic approximation method has been mostly adopted in the analysis of the LCL-DAB converter, the error caused by it cannot be negligible.

Consequently, the voltage–current characteristics are derived in the time domain to propose the optimized control method in this article, based on the simple and highly controlled DPS modulation scheme. The rest of the article is given as follows. The voltage–current characteristic of the LCL-DAB converter is first analyzed in Section 2. Then, the mathematical model of the LCL-DAB converter with DPS modulation scheme is established in Section 3, according to the analyzed voltage–current characteristic in the time domain. In Section 4, the design regions of no backflow power are graphed so as to estimate an appropriate outer phase shift ratio, and on this basis, a virtual direct current control (VDCC) method of the LCL-DAB converter is proposed to improve the transient performance under no backflow power. The proposed control method is verified by the simulation and experimental results in Section 5, and Section 6 eventually summarizes the article.

2. Voltage–Current Characteristic

Figure 1 shows the typical topology of an LCL-DAB converter, consisting of input and output parts, two H bridges, an LCL resonant tank, and a high-frequency transformer. In the LCL-DAB converter, each H bridge is composed of four switches, used for DC-AC and AC-DC conversion. The LCL resonant tank is the key component for power transmission, including two filter inductors, L₁ and L₂, and a filter capacitor, C₁. Compared to a line-frequency transformer, a high-frequency transformer can decrease the volume of the converter to increase the power density, and the turns ratio of it is N:1. To make the structure symmetric, L₁ = L₂ by default. The LCL tank complicates the time-domain analysis of the converter characteristics, so an effective solution is to adopt the phasor method. The LCL-DAB converter can be equivalent to a simplified model, as shown in Figure 2. The voltages at both sides of the LCL resonant tank are three-level square waves, so they can be seen as the superposition of infinite sinusoidal voltages. The voltages u_P and u_S at each frequency excite the currents i_P and i_S at the same frequency.

Taking forward power flow as an example, Figure 3 shows the main operating waveforms with the DPS modulation scheme, which shows that the duty ratios of all gate signals are 50%. The inner phase shift time d₁T is the phase shift time between S₁ and S₄, or Q₁ and Q₄, corresponding to the time interval of zero voltage time of u_P and u_S. The outer phase shift time dT is defined as the time difference between the symmetry axis of u_P and u_S, and its polarity determines the direction of power flow. Since the time origin setting does not affect the conclusion of the following analysis, the origin of the time axis is set to the midpoint of the positive level of u_S for convenience of derivation. Therefore, the time-domain expressions of u_P and u_S are

$$u_{\mathrm{P}}(t)=\left\{\begin{array}{cc}0& (\frac{1-4d}{4}T<t<\frac{1-4d+2d_1}{4}T)\\ -U_{\mathrm{in}}& (\frac{1-4d+2d_1}{4}T<t<\frac{3-4d-2d_1}{4}T)\\ 0& (\frac{3-4d-2d_1}{4}T<t<\frac{3-4d+2d_1}{4}T)\\ U_{\mathrm{in}}& (\frac{3-4d+2d_1}{4}T<t<\frac{5-4d-2d_1}{4}T)\\ 0& (\frac{5-4d-2d_1}{4}T<t<\frac{5-4d}{4}T)\end{array}\right.$$

(1)

$$u_{\mathrm{S}}(t)=\left\{\begin{array}{cc}0& (\frac{1}{4}T<t<\frac{1+2d_1}{4}T)\\ -N{U}_{\mathrm{o}}& (\frac{1+2d_1}{4}T<t<\frac{3-2d_1}{4}T)\\ 0& (\frac{3-2d_1}{4}T<t<\frac{3+2d_1}{4}T)\\ N{U}_{\mathrm{o}}& (\frac{3+2d_1}{4}T<t<\frac{5-2d_1}{4}T)\\ 0& (\frac{5-2d_1}{4}T<t<\frac{5}{4}T)\end{array}\right.$$

(2)

For a periodic signal f(x), it can be expanded into the form shown in (3), i.e., Fourier series.

$$f(x)=\frac{1}{2}{a}_0+{\displaystyle \sum _{n=1}^{\infty }\left[a_n\cos (n\omega x)+b_n\sin (n\omega x)\right]}$$

(3)

$$\left\{\begin{array}{c}{a}_n=\frac{2}{T}{\displaystyle \underset{T}{\int }f(x)\cos (n\omega x)dx}\\ b_n=\frac{2}{T}{\displaystyle \underset{T}{\int }f(x)\sin (n\omega x)dx}\end{array}\right.$$

(4)

where T is the period of f(x) and ω = 2π/T. Since the voltages and currents of the LCL resonant tank are periodic signals, the Fourier series expressions of them can be derived to (5) by substituting (1) and (2) into (4), respectively. Then, the phasor expression at each frequency can be expressed as (6).

$$\left\{\begin{array}{l}{u}_{\mathrm{P}}(t)={\displaystyle \sum _{n=1,3,5\dots }{(-1)}^{\frac{n-1}{2}}\frac{4U_{\mathrm{in}}}{n\mathsf{\pi }}\times \cos (n\mathsf{\pi }{d}_1)}\cos (n{\omega }_{s}t+2n\mathsf{\pi }d)\hfill \\ u_{\mathrm{S}}(t)={\displaystyle \sum _{n=1,3,5\dots }{(-1)}^{\frac{n-1}{2}}\frac{4N{U}_{\mathrm{o}}}{n\mathsf{\pi }}\cos (n\mathsf{\pi }{d}_1)\cos (n{\omega }_{s}t)}\hfill \end{array}\right.$$

(5)

$$\left\{\begin{array}{l}{\stackrel{·}{U}}_{\mathrm{P}\_n}={(-1)}^{\frac{n-1}{2}}\frac{2\sqrt{2}{U}_{\mathrm{in}}}{n\mathsf{\pi }}\times \cos (n\mathsf{\pi }{d}_1)[\cos (2n\mathsf{\pi }d)+j\sin (2n\mathsf{\pi }d)]\hfill \\ {\stackrel{·}{U}}_{\mathrm{S}\_n}={(-1)}^{\frac{n-1}{2}}\frac{2\sqrt{2}N{U}_{\mathrm{o}}}{n\mathsf{\pi }}\cos (n\mathsf{\pi }{d}_1)\hfill \end{array}\right.$$

(6)

where n = 1, 3, 5…. Here the resonant frequency is defined as ${\omega }_{\mathrm{s}}=1/\sqrt{L_1{C}_1}=2\mathsf{\pi }{f}_s$, where f_s is the switching frequency, and the resonant impedance is defined as $Z_0={\omega }_s{L}_1=\sqrt{L_1/C_1}$. According to Figure 1, the voltage-current characteristic of the equivalent model is derived as

$$\left[\begin{array}{c}{\stackrel{·}{I}}_{\mathrm{P}\_n}\\ {\stackrel{·}{I}}_{\mathrm{S}\_n}\end{array}\right]=\left[\begin{array}{cc}\frac{(1-n^2)}{jn{Z}_0(2-n^2)}& \frac{-1}{jn{Z}_0(2-n^2)}\\ \frac{1}{jn{Z}_0(2-n^2)}& \frac{(n^2-1)}{jn{Z}_0(2-n^2)}\end{array}\right]\left[\begin{array}{c}{\stackrel{·}{U}}_{\mathrm{P}\_n}\\ {\stackrel{·}{U}}_{\mathrm{S}\_n}\end{array}\right]$$

(7)

Substituting (6) into (7), the phasor expression of i_P and i_S can be deduced as

$$\left[\begin{array}{c}{\stackrel{·}{I}}_{\mathrm{P}\_n}\\ {\stackrel{·}{I}}_{\mathrm{S}\_n}\end{array}\right]=\left[\begin{array}{cc}\frac{(1-n^2)}{jn{Z}_0(2-n^2)}& \frac{-1}{jn{Z}_0(2-n^2)}\\ \frac{1}{jn{Z}_0(2-n^2)}& \frac{(n^2-1)}{jn{Z}_0(2-n^2)}\end{array}\right]\left[\begin{array}{c}{\stackrel{·}{U}}_{\mathrm{P}\_n}\\ {\stackrel{·}{U}}_{\mathrm{S}\_n}\end{array}\right]$$

(8)

where k = NU_o/U_in. Therefore, the time-domain expressions of i_P and i_S can be expressed by inverse derivation of (8), as

$$\left\{\begin{array}{l}{i}_{\mathrm{P}}(t)={\displaystyle \sum _{n=1,3,5\dots }\frac{{(-1)}^{\frac{n-1}{2}}4U_{\mathrm{in}}\cos (n\mathsf{\pi }{d}_1)}{n^2(2-n^2)Z_0\mathsf{\pi }}}\times \left\{(1-n^2)\sin (2n\mathsf{\pi }d)\cos (n{\omega }_{s}t)+\left[(1-n^2)\cos (2n\mathsf{\pi }d)-k\right]\sin (n{\omega }_{s}t)\right\}\hfill \\ i_{\mathrm{S}}(t)={\displaystyle \sum _{n=1,3,5\dots }\frac{{(-1)}^{\frac{n-1}{2}}4U_{\mathrm{in}}\cos (n\mathsf{\pi }{d}_1)}{n^2(2-n^2)Z_0\mathsf{\pi }}\times }\left\{\sin (2n\mathsf{\pi }d)\cos (n{\omega }_{s}t)+\left[k(n^2-1)+\cos (2n\mathsf{\pi }d)\right]\sin (n{\omega }_{s}t)\right\}\hfill \end{array}\right.$$

(9)

3. Modeling of the LCL-DAB Converter with DPS Modulation Scheme

Due to the switching action of the LCL-DAB converter, a severe nonlinear is presented in the system, which brings great difficulty to the system design process. Therefore, the small-signal analysis method is adopted to build the mathematical model of the LCL-DAB converter. The variables are approximated to the 0 and 1st order, which can avoid complex calculations and ensure high accuracy.

With DPS modulation scheme, the switching functions of H₁ and H₂ are defined respectively as

$$s_1(t)=\left\{\begin{array}{ll}1,\hfill & {\mathrm{S}}_1{ \mathrm{and} \mathrm{S}}_4 \mathrm{are} \mathrm{turned} \mathrm{on}\hfill \\ 0,\hfill & {\mathrm{S}}_1{ \mathrm{and} \mathrm{S}}_3{, \mathrm{or} \mathrm{S}}_2{ \mathrm{and} \mathrm{S}}_4 \mathrm{are} \mathrm{turned} \mathrm{on}\hfill \\ -1,\hfill & {\mathrm{S}}_2{ \mathrm{and} \mathrm{S}}_3 \mathrm{are} \mathrm{turned} \mathrm{on}\hfill \end{array}\right.$$

(10)

$$s_2(t)=\left\{\begin{array}{ll}1,\hfill & {\mathrm{Q}}_1{ \mathrm{and} \mathrm{Q}}_4 \mathrm{are} \mathrm{turned} \mathrm{on}\hfill \\ 0,\hfill & {\mathrm{Q}}_1{ \mathrm{and} \mathrm{Q}}_3{, \mathrm{or} \mathrm{Q}}_2{ \mathrm{and} \mathrm{Q}}_4 \mathrm{are} \mathrm{turned} \mathrm{on}\hfill \\ -1,\hfill & {\mathrm{Q}}_2{ \mathrm{and} \mathrm{Q}}_3 \mathrm{are} \mathrm{turned} \mathrm{on}\hfill \end{array}\right.$$

(11)

Therefore, based on the above analysis, the time-domain expression of u_P and u_S can be rewritten to

$$u_{\mathrm{P}}{\left(\mathrm{t}\right)=\mathrm{s}}_1(t)\cdot U_{\mathrm{in}}$$

(12)

$$u_{\mathrm{S}}{\left(\mathrm{t}\right)=\mathrm{s}}_2(t)\cdot N{U}_{\mathrm{o}}$$

(13)

Since s₁(t) and s₂(t) are symmetrical in each half period, the DC terms of them are zero, and the real and imaginary parts of the 1st coefficient of their Fourier series expression are

$$\left\{\begin{array}{l}{〈{\mathrm{s}}_1〉}_{1\mathrm{R}}=\frac{2}{\mathsf{\pi }}\cos (\mathsf{\pi }{d}_1)\cos (2\mathsf{\pi }d)\hfill \\ {〈{\mathrm{s}}_1〉}_{1\mathrm{I}}=\frac{2}{\mathsf{\pi }}\cos (\mathsf{\pi }{d}_1)\sin (2\mathsf{\pi }d)\hfill \end{array}\right.$$

(14)

$$\left\{\begin{array}{l}{〈{\mathrm{s}}_2〉}_{1\mathrm{R}}=\frac{2\cos (\mathsf{\pi }{d}_1)}{\mathsf{\pi }}\hfill \\ {〈{\mathrm{s}}_2〉}_{1\mathrm{I}}=0\hfill \end{array}\right.$$

(15)

Assuming that the current of inductors and the voltage of capacitors are state variables, so the continuous-time large-signal average equations are

$$\left\{\begin{array}{l}L\frac{\mathrm{d}{i}_{\mathrm{P}}(t)}{\mathrm{d}t}=s_1(t)u_{\mathrm{in}}(t)-u_{C1}(t)\hfill \\ L\frac{\mathrm{d}{i}_{\mathrm{S}}(t)}{\mathrm{d}t}=-N{s}_2(t)u_{\mathrm{o}}(t)+u_{C1}(t)\hfill \\ C_{\mathrm{dc}2}\frac{\mathrm{d}{u}_{C_{\mathrm{dc}2}}(t)}{\mathrm{d}t}=N{s}_2(t)i_{\mathrm{S}}(t)-\frac{u_{\mathrm{o}}(t)}{R}\hfill \\ C_1\frac{\mathrm{d}{u}_{C1}(t)}{\mathrm{d}t}=i_{\mathrm{P}}(t)-i_{\mathrm{S}}(t)\hfill \\ u_{C_{\mathrm{dc}2}}(t)=u_{\mathrm{o}}(t)\hfill \end{array}\right.$$

(16)

It can be analyzed that all the DC terms of i_P, i_S and u_C1 are equal to zero, and the ac terms of u_o are zero. Then, a new matrix equation can be derived as

$${\dot{X}}_1=A_1\cdot X_1+B_1\cdot \left[{〈u_{\mathrm{in}}〉}_0\right]$$

(17)

where

$$X_1={\left[\begin{array}{lllllll}{〈i_{\mathrm{P}}〉}_{1\mathrm{R}}\hfill & {〈i_{\mathrm{P}}〉}_{1\mathrm{I}}\hfill & {〈i_{\mathrm{S}}〉}_{1\mathrm{R}}\hfill & {〈i_{\mathrm{S}}〉}_{1\mathrm{I}}\hfill & {〈u_{\mathrm{C}1}〉}_{1\mathrm{R}}\hfill & {〈u_{\mathrm{C}1}〉}_{1\mathrm{I}}\hfill & {〈u_{\mathrm{o}}〉}_0\hfill \end{array}\right]}^{\mathrm{T}}$$

(18)

$$A_1=\left[\begin{array}{ccccccc}0& \omega & 0& 0& \frac{-1}{L}& 0& 0\\ -\omega & 0& 0& 0& 0& \frac{-1}{L}& 0\\ 0& 0& 0& \omega & \frac{1}{L}& 0& \frac{-2N\cos (\mathsf{\pi }{d}_1)}{\mathsf{\pi }L}\\ 0& 0& -\omega & 0& 0& \frac{1}{L}& 0\\ \frac{1}{C_1}& 0& \frac{-1}{C_1}& 0& 0& \omega & 0\\ 0& \frac{1}{C_1}& 0& \frac{-1}{C_1}& -\omega & 0& 0\\ 0& 0& \frac{4N\cos (\mathsf{\pi }{d}_1)}{\mathsf{\pi }{C}_{\mathrm{dc}2}}& 0& 0& 0& \frac{-1}{R{C}_{\mathrm{dc}2}}\end{array}\right]$$

(19)

$$B_1={\left[\begin{array}{lllllll}\frac{2\cos (\mathsf{\pi }{d}_1)\cos (2\mathsf{\pi }d)}{\mathsf{\pi }L}\hfill & \frac{2\cos (\mathsf{\pi }{d}_1)\sin (2\mathsf{\pi }d)}{\mathsf{\pi }L}\hfill & 0\hfill & 0\hfill & 0\hfill & 0\hfill & 0\hfill \end{array}\right]}^{\mathrm{T}}$$

(20)

For the design and analysis of the system controller, the input-output small-signal model needs to be built, which is linear. Assuming that each of the state variables includes a large-signal state and a small-signal state, i.e., x = Δx + X, the expression of (17) can be rewritten. After extracting the small-signal state variables, the seventh-order small-signal model can be obtained, as

$${\dot{X}}_2=A_2\cdot X_2+B_2\cdot Y$$

(21)

where

$$X_2={\left[\begin{array}{lllllll}\Delta {〈i_{\mathrm{P}}〉}_{1\mathrm{R}}\hfill & \Delta {〈i_{\mathrm{P}}〉}_{1\mathrm{I}}\hfill & \Delta {〈i_{\mathrm{S}}〉}_{1\mathrm{R}}\hfill & \Delta {〈i_{\mathrm{S}}〉}_{1\mathrm{I}}\hfill & \Delta {〈u_{\mathrm{C}1}〉}_{1\mathrm{R}}\hfill & \Delta {〈u_{\mathrm{C}1}〉}_{1\mathrm{I}}\hfill & \Delta {〈u_{\mathrm{o}}〉}_0\hfill \end{array}\right]}^{\mathrm{T}}$$

(22)

$$A_2=\left[\begin{array}{ccccccc}0& \omega & 0& 0& \frac{-1}{L}& 0& 0\\ -\omega & 0& 0& 0& 0& \frac{-1}{L}& 0\\ 0& 0& 0& L& \frac{1}{L}& 0& \frac{-2N\cos (\mathsf{\pi }{D}_1)}{\mathsf{\pi }L}\\ 0& 0& -\omega & 0& 0& \frac{1}{L}& 0\\ \frac{1}{C_1}& 0& \frac{-1}{C_1}& 0& 0& \omega & 0\\ 0& \frac{1}{C_1}& 0& \frac{-1}{C_1}& -\omega & 0& 0\\ 0& 0& \frac{4N\cos (\mathsf{\pi }{D}_1)}{\mathsf{\pi }{C}_{\mathrm{dc}2}}& 0& 0& 0& \frac{-1}{R{C}_{\mathrm{dc}2}}\end{array}\right]$$

(23)

$$B=\left[\begin{array}{ccc}\frac{2\cos (\mathsf{\pi }{D}_1)\cos (2\mathsf{\pi }D)}{\mathsf{\pi }L}& \frac{-2U_{\mathrm{in}}\sin (\mathsf{\pi }{D}_1)\cos (2\mathsf{\pi }D)}{L}& \frac{-4U_{\mathrm{in}}\cos (\mathsf{\pi }{D}_1)\sin (2\mathsf{\pi }D)}{L}\\ \frac{2\cos (\mathsf{\pi }{D}_1)\sin (2\mathsf{\pi }D)}{\mathsf{\pi }L}& \frac{-2U_{\mathrm{in}}\sin (\mathsf{\pi }{D}_1)\sin (2\mathsf{\pi }D)}{L}& \frac{4U_{\mathrm{in}}\cos (\mathsf{\pi }{D}_1)\cos (2\mathsf{\pi }D)}{L}\\ 0& \frac{2N{U}_{\mathrm{o}}\sin (\mathsf{\pi }{D}_1)}{L}& 0\\ 0& 0& 0\\ 0& 0& 0\\ 0& 0& 0\\ 0& \frac{-4N{I}_{\mathrm{S}1\mathrm{R}}\sin (\mathsf{\pi }{D}_1)}{C_{\mathrm{dc}2}}& 0\end{array}\right]$$

(24)

$$Y={\left[\begin{array}{ccc}\Delta {〈u_{\mathrm{in}}〉}_0& \Delta d_1& \Delta d\end{array}\right]}^{\mathrm{T}}$$

(25)

4. Direct Output Current Control Based on Virtual Voltage Compensation under No Backflow Power

In this section, the transmission power of LCL-DAB converters is derived. To ensure that the LCL-DAB converter operates without backflow power in a wide range and possesses a satisfactory transient response against input/output disturbances, a VDCC method of the LCL-DAB converter is proposed in this section. The power characteristic is first derived to estimate an appropriate value of d, enabling a wide range of no backflow power operation. Then, a VDCC method is proposed and analyzed to improve the transient performance.

4.1. Power Characteristic Analysis

For a two-port network with sinusoidal voltages and currents, the instantaneous power can be expressed as (26), where $P_{\ast }$ and $Q_{\ast }$ are the active and reactive power, respectively. As shown in Figure 4, the first part of (26) is always positive while the second part is sometimes negative. Therefore, $p_{\ast }(t)$ will be always positive if $Q_{\ast }$ is eliminated, i.e., the backflow will be eliminated.

$$p_{\ast }(t)=P_{\ast }[1-\cos (2\omega t)]-Q_{\ast }\sin (2\omega t)$$

(26)

If the parasitic parameters and losses of the converter are ignored, the output active power can be seen as the sum of the active power transferred by each harmonic, i.e.,

$$P={\displaystyle \sum P_n}=\frac{8N{U}_{\mathrm{in}}{U}_{\mathrm{o}}}{{\mathsf{\pi }}^2{Z}_0}{\displaystyle \sum _{n=3,5,7\cdots }\frac{{\cos }^2(n\mathsf{\pi }{d}_1)\sin (2n\mathsf{\pi }d)}{n^3(2-n^2)}}$$

(27)

Similarly, the reactive power can be derived as

$$Q={\displaystyle \sum Q_n}=\frac{8N{U}_{\mathrm{in}}{U}_{\mathrm{o}}}{{\mathsf{\pi }}^2{Z}_0}{\displaystyle \sum _{n=3,5,7\cdots }\frac{{\cos }^2(n\mathsf{\pi }{d}_1)\left[\cos (2n\mathsf{\pi }d)+k(n^2-1)\right]}{n^3(2-n^2)}}$$

(28)

According to (28), it can be seen that Q₁ = 0 when d = 0.25, which means that the backflow power corresponding to the fundamental component is eliminated. However, the reactive power of other harmonic components is not zero, meaning that the backflow power actually exists. To analyze the proportion of power generated by the harmonic components, the ratios of active and reactive generated by the harmonic components to the active power generated by the fundamental component are defined as the active power ratio Y_P and the reactive power ratio Y_Q, expressed as

$$Y_P={\displaystyle \sum _{n=1,3,5\cdots }\left(\frac{P_n}{P_1}\right)}\times 100\%$$

(29)

$$Y_Q={\displaystyle \sum _{n=1,3,5\cdots }\left(\frac{Q_n}{P_1}\right)}\times 100\%$$

(30)

Figure 5 shows the relationship between the active power ratio and phase shift ratios, indicating the active power ratio is closed 0 in most regions. Taking k = 1 as an example, Figure 6 shows the relationship between the reactive power ratio and phase shift ratios. Different from the active power ratio, the reactive power ratio changes significantly for different phased shift ratios. As a result, the transmission power expression can be expressed using the 1st harmonic approximation method, reduced from (27) to (31). However, 1st harmonic approximation method should not be utilized in the backflow elimination analysis, so it is necessary to adopt another method in the following calculation of design regions of no backflow power.

$$P=\frac{8N{U}_{\mathrm{in}}{U}_{\mathrm{o}}{\cos }^2(\mathsf{\pi }{d}_1)\sin (2\mathsf{\pi }d)}{{\mathsf{\pi }}^2{Z}_0}$$

(31)

The DC voltage gain of LCL-DAB converters is defined as G_DC = U_o/U_in. With the resistive load R, the DC voltage gain can be calculated as

$$G_{\mathrm{DC}}=\frac{8NR{\cos }^2(\mathsf{\pi }{d}_1)\sin (2\mathsf{\pi }d)}{{\mathsf{\pi }}^2{Z}_0}$$

(32)

After removing the filter capacitor, the LCL-DAB converter can be regarded as a traditional DAB converter. Figure 7 shows the voltage gain curves of the LCL-DAB and the traditional DAB converter varying with phase shift ratios d₁ and d. For both types of converters, the voltage gain G_DC increases and then decreases with the increase in d and the curves are symmetric about the plane d = 0.25. Furthermore, G_DC decreases with the increase in d₁ and reaches zero when d₁ = 0.5. It can be seen that the LCL-DAB converter can achieve higher voltage gain than the traditional DAB converter under the same inductance.

The above analysis indicates that it is inaccurate and infeasible to eliminate backflow power by eliminating reactive power using 1st harmonic approximation. Therefore, the exact design regions of no backflow power are presented and analyzed in the following section.

4.2. The Estimation of d

The waveforms of voltages and currents of the LCL-DAB converter are symmetrical in each half period, so the operating state only needs to be analyzed in half period. Taking the waveforms under no backflow power operation in Figure 3 as an example, the backflow power can be regarded as the negative part of the instantaneous power. Therefore, the consistent directions of u_P and i_P can be regarded as the criterion of no backflow power operation for H₁, as expressed in (33) and (34). Similarly, the consistent directions of u_S and i_S can be regarded as the criterion of no backflow power operation for H₂, as expressed in (35) and (36).

$$i_{\mathrm{P}}\left(t_4\right)\le 0$$

(33)

$$i_{\mathrm{P}}\left(t_7\right)\ge 0$$

(34)

$$i_{\mathrm{S}}\left(t_1\right)\ge 0$$

(35)

$$i_{\mathrm{P}}\left(t_3\right)\le 0$$

(36)

Substituting (9) into (33)–(36), the solutions of d₁ and d of these constraints can be solved. Figure 8 shows the design boundaries of no backflow power for LCL-DAB converters with DPS modulation scheme, in which the regions surrounded by the curves are the design regions with different k. It also shows that the design regions for H₁ expand with the increase in k, and the trend becomes unapparent with large values of k. On the contrary, the design regions for H₂ shrink with the increase in k, and the trend becomes unapparent with small values of k. Notably, the design regions for H₁ and H₂ overlap when k = 1 (voltage matching), which means the same operating state of two bridges in the converter. Therefore, a reasonable k can be determined to avoid too narrow regions for H₁ or H₂ during the system design process.

The above analysis reveals that, for most values of k, the wide design ranges of d₁ can be obtained when d is around 0.2, i.e., an appropriate value of d₁ can ensure no backflow power operation in a wide range. Given that the output voltage gain is symmetric at d = 0.25, the preset modulation range of d should be determined for the first time according to the design acquirement. Moreover, other control objectives should be considered in the actual application, such as transmission power, output voltage, etc. Taking voltage gain as an example, for a fixed d, the uppercase form of it D denotes its steady state, so the maximal voltage gain can be expressed as (37), representing the voltage conversion ability. According to (37), the power conversion ability increases and then decreases with the increase in d and reaches the maximal value when D = 0.25. However, if only voltage gain is considered, the design region of no backflow operation could be nonexistent under a too tiny k for H₁, or under a too large k for H₂. Generally, the value of d should be weighed and determined according to the actual requirement.

$$G_{\mathrm{DCmax}}=\frac{8NR\sin (2\mathsf{\pi }D)}{{\mathsf{\pi }}^2{Z}_0}$$

(37)

4.3. Proposed VDCC Method

For the traditional output voltage control, the value of the feedforward compensation is constant, with the result that the PI controller will bear all the burden of adjusting the system for disturbances. In terms of transient response optimization against input voltage or load disturbances, a VDCC method is thus proposed, and its main principle is that the output current is directly controlled to meet the output current requirement.

Although the transmission power and voltage gain of the LCL-DAB converter are derived respectively as (31) and (32) based on the premise of lossless transmission, power losses cannot be ignored in the actual operation. Therefore, the input and output power are not equal, which means the calculated control variables are less accurate only according to the ideal equations. Moreover, the system parameters also can change varying to the operating conditions such as the inductance of the filter inductor, which also will result in the difference between ideal and required control variables. Therefore, a virtual voltage u_ov is introduced in the control loop to compensate for the difference, defined as

$$i_{\mathrm{oref}}=\frac{u_{\mathrm{ov}}}{R}$$

(38)

where i_oref is the desired output current reference. Given that the resistance of the load is not constant, the instantaneous sampling values of the output voltage and current are utilized to calculate R, i.e.,

$$R=\frac{u_{\mathrm{o}}}{i_{\mathrm{o}}}$$

(39)

Substituting (39) into (38), the output current reference is derived as (40). Then, the instantaneous output current can be deduced, based on (31), as (41).

$$i_{\mathrm{oref}}=\frac{u_{\mathrm{ov}}{i}_{\mathrm{o}}}{u_{\mathrm{o}}}$$

(40)

$$i_{\mathrm{o}}=\frac{8N{U}_{\mathrm{in}}{\cos }^2(\mathsf{\pi }{d}_1)\sin (2\mathsf{\pi }d)}{{\mathsf{\pi }}^2{Z}_0}$$

(41)

According to (40) and (41), the actual inner phase shift ratio d₁* corresponding to the virtual output voltage can be derived, expressed as

$$d_1^{\ast }=\frac{1}{\mathsf{\pi }}{\cos }^{-1}{\left[\frac{k_{\mathrm{f}}{u}_{\mathrm{ov}}{i}_{\mathrm{o}}}{u_{\mathrm{o}}{u}_{\mathrm{in}}}\right]}^{\frac{1}{2}}$$

(42)

$$k_{\mathrm{f}}=\frac{{\mathsf{\pi }}^2{Z}_0}{8N\sin (2\mathsf{\pi }D)}$$

(43)

$$\left(\frac{u_{\mathrm{ov}}{i}_{\mathrm{o}}}{u_{\mathrm{o}}}\right)\in \left[0, \frac{8N{U}_{\mathrm{in}}}{{\mathsf{\pi }}^2{Z}_0}\right]$$

(44)

where k_f is a constant expressed as (43) and D is the estimated outer phase shift ratio. Based on the above analysis, Figure 9 shows the block diagram of the proposed VDCC method. The outer phase shift ratio is estimated based on Section 4.2 to ensure a wide range of no backflow operation, while the PI controller regulates the inner phase shift ratio mainly to make the output voltage follow the reference value. The input voltage u_in, output voltage u_o, and output current i_o need to be sampled once per cycle. The error between the sampled output voltage and the output voltage reference is calculated by the PI controller, and the output of the controller is set as the virtual voltage u_ov corresponding to the desired output current. The dynamic response improvement of the utilization of the virtual voltage has been verified in the traditional DAB converter [29,30]. Notably, the maximal value of the calculated direct output current should be limited according to the maximal output current of the converter, expressed as (44). Then, according to (42), the actual control variable d₁* is calculated to improve the transient response against input voltage or load disturbances. Moreover, the introduction of the virtual voltage also can compensate for the difference between the calculated and the actual k_f, which can be more flexible compared with the traditional constant feedforward compensation. Finally, the gate signals of the switches are generated according to d₁* and D.

4.4. Disturbance Analysis of the VDCC Method

In the proposed VDCC method, the output voltage, the output current, and the input voltage have drastic influences on the system’s stability. Hence, the influences of output voltage, output current, and input voltage on the output voltage need to be discussed.

According to (42), the output voltage-to-inner phased shift transfer function can be expressed as

$$G_{d_1{u}_{\mathrm{o}}}=\frac{K_{\mathrm{f}}{U}_{\mathrm{ov}}{I}_{\mathrm{o}}}{\mathsf{\pi }{U}_{\mathrm{o}}^2{U}_{\mathrm{in}}\sin (2\mathsf{\pi }{D}_1)}$$

(45)

Similarly, the input voltage-to-inner phased shift and the output current-to-inner phased shift transfer functions can be derived, respectively as (46) and (47).

$$G_{d_1{u}_{\mathrm{in}}}=\frac{K_{\mathrm{f}}{U}_{\mathrm{ov}}{U}_{\mathrm{o}}}{\mathsf{\pi }{I}_{\mathrm{o}}{U}_{\mathrm{in}}^2\sin (2\mathsf{\pi }{D}_1)}$$

(46)

$$G_{d_1{i}_{\mathrm{o}}}=\frac{K_{\mathrm{f}}{U}_{\mathrm{ov}}}{-\mathsf{\pi }{U}_{\mathrm{o}}{U}_{\mathrm{in}}\sin (2\mathsf{\pi }{D}_1)}$$

(47)

since the effects of the input voltage and the load disturbances are ultimately reflected in the output voltage. Based on (46), (47), and the small-signal model built in Section 4.3, the input voltage-to-output voltage and the output current-to-output voltage transfer functions can be derived, respectively as (48) and (49).

$$G_{u_{\mathrm{o}}{u}_{\mathrm{in}}}=\frac{-4\sqrt{2}NR{K}_{\mathrm{f}}{U}_{\mathrm{ov}}{U}_{\mathrm{o}}\sin (2\mathsf{\pi }D)}{{\mathsf{\pi }}^2{Z}_0{U}_{\mathrm{in}}{I}_{\mathrm{o}}(R{C}_{\mathrm{dc}2}s+1)}$$

(48)

$$G_{u_{\mathrm{o}}{i}_{\mathrm{o}}}=\frac{-4\sqrt{2}NR{K}_{\mathrm{f}}{U}_{\mathrm{ov}}\sin (2\mathsf{\pi }D)}{-{\mathsf{\pi }}^2{Z}_0{U}_{\mathrm{o}}(R{C}_{\mathrm{dc}2}s+1)}$$

(49)

It can be summarized according to the above analysis that the small signals of the input voltage and the output current will affect the small signals of the output voltage due to the introduction of the compensation loop. Therefore, accurate sampled values of the control loop are needed to ensure control performance.

5. Simulation and Experimental Verification

5.1. Numerical Simulation Results

First of all, the wide range of no backflow power operation under an appropriate outer phase shift ratio is verified. For a fixed d which is set to 0.22, the value of d₁ is changed to observe the open-loop results in the Matlab/Simulink model. The main simulation parameters are shown in

Table 1. Main simulation parameters.

Symbol	Value	Symbol	Value	Symbol	Value
L	1.15 mH	f	10 kHz	Uin	100 V
N	2	C1	220 nF

and the simulation waveforms are shown in Figure 10. According to the open-loop simulation results, the backflow power is basically eliminated for both bridges of the converter, for various values of k. Therefore, it can be summarized that an appropriate d ensures a wide range of no backflow power operation.

5.2. Experimental Results

To verify the proposed VDCC method for fast transient response and no backflow power, the experimental prototype has been built, as shown in Figure 11. For experimental comparison, steady-state and transient experiments using the traditional constant compensation control method and the proposed VDCC method are conducted. The steady-state experiments are divided into four groups with the same output voltage U_o = 50 V, as shown in

Table 2. Main experimental parameters.

Symbol	Value	Symbol	Value	Symbol	Value
Uin(1)	80 V	R(1)	50 Ω	k(1)	1.25
Uin(2)	100 V	R(2)	50 Ω	k(2)	1
Uin(3)	130 V	R(3)	50 Ω	k(3)	0.77
Uin(4)	100 V	R(4)	45.4 Ω	k(4)	1
Uo	50 V	N	2	f	10 kHz
L	1.15 mH	C1	220 nF

, i.e., U_in = 80 V, R = 50 Ω; U_in = 100 V, R = 50 Ω; U_in = 130 V, R = 50 Ω; U_in = 100 V, and R = 45.4 Ω.

Since the performance of backflow power elimination is mainly affected by the value of d, the traditional constant compensation control method and the proposed VDCC method have no obvious effect on the steady-state results of the backflow elimination. Therefore, for a unified comparison, the steady-state waveforms are obtained with the two control methods, as shown in Figure 12 and Figure 13. In Figure 12, d is set to 0.38, which is an inappropriate value of the outer phase shift ratio to achieve no backflow power operation according to the above analysis. It can be observed from Figure 12a to Figure 11d that the direction of currents and voltages sometimes are opposite at both sides of the LCL resonant tank, representing that the backflow is not eliminated in the input and output of the converter. In Figure 13, d is set to 0.22, which is an appropriate value of the outer phase shift ratio. According to these four figures, the currents are always reversed at zero voltage, so the backflow power is eliminated for both bridges of the converter. The elimination effectiveness of backflow power for an appropriate d matches the above simulation results, and, in addition, the current stress also decreases correspondingly.

To verify the transient response of the proposed VDCC method, the starting process, the transient response against input voltage disturbance, and the transient response against load disturbance are observed and compared with the traditional constant compensation control method.

Figure 14 shows the starting process of the two control methods, which indicates that the settling time with the proposed VDCC method is 121 ms, shorter than that with the traditional control method. Figure 15 and Figure 16 compare the transient response with two control methods under input voltage and load disturbances, and the steady-state waveforms before and after disturbances are the same as those in Figure 13b–d. As shown in Figure 15, when input voltage U_in is changed from 100 V to 130 V, the output voltage with the traditional constant compensation method first increases, and then is adjusted to the reference value while the output voltage with the proposed VDCC method remains stable. As shown in Figure 16, when the load R is changed from 50 Ω to 45.4 Ω, the overshoot of the output voltage with the proposed VDCC method is smaller than that with the traditional constant compensation method. Figure 15 and Figure 16 prove that the proposed VDCC method has superior transient performance against input voltage and load disturbances.

5.3. Experimental Efficiency Results Comparison

The efficiency of the LCL-DAB converter is mainly affected by the phase shift ratios, and the feedforward compensation type has no significant effect on it. Therefore, the experimental efficiency results are obtained with two values of d, corresponding to the above experiments. All experiments are implemented for a fixed 50 V output voltage and 50 Ω resistance of the load. As shown in Figure 17, the efficiency with the two outer phase shift ratios decreases with the increase in the input voltage, and the efficiency for d = 0.22 is higher than that for d = 0.38. Therefore, Figure 17 indicates the proposed VDCC method can improve the overall efficiency of the LCL-DAB converter in a wide range.

6. Conclusions

In this article, to eliminate the backflow power and improve the transient response against input voltage and load disturbances, a VDCC method for fast transient response and no backflow power is proposed. The voltage–current characteristic is first analyzed using the phasor method. Then the mathematical model of the LCL-DAB converter with DPS modulation scheme is built. On the basis of the derived power characteristics, the design regions of no backflow power are established, proving that an appropriate value of outer phase shift can ensure a wide range of no backflow power generation. Moreover, a VDCC method is proposed to improve the transient performance. Through the combination of the estimation of the outer phase shift and the virtual voltage compensation, the LCL-DAB with fast transient response can operate in a wide range of no backflow power, which can also compensate for the difference in the actual system parameters. Finally, the experimental prototype has verified that the proposed VDCC method with these system parameters can reduce the settling time of the starting process from 223 ms to 121 ms, and the system can remain at 0 ms settling time under the input voltage and load disturbances in a wide range of no backflow power operation.