A Survey on Dynamic Corrective Control of Asynchronous Sequential Machines
Abstract
:1. Introduction
- (i)
- Supervisors for DESs receive traces of inputs (or events) so as to generate commands specifying whether the current (controllable) input be enabled or disabled. Hence a supervisor cannot enlarge the controlled behavior of a DES; the supervisor can only curtail it to meet a given specification. On the other hand, since a corrective controller generates its own control input sequences while suppressing the current external input, it can provide the controlled ASM with new stable-state behaviors that otherwise could not be displayed.
- (ii)
- Rather than using the method of formal languages, corrective control theory exploits transition equivalence in evaluating the success of control goals. In the case of model matching, for example, the stable-state behavior of the closed-loop system is deemed to be matched with that of the reference model if, staying at the same state, they move to the same next stable state in response to a common input. In this sense, the control specification of corrective control is stricter than supervisory control.
- (iii)
- Although having a conceptual similarity to corrective control, supervisory control cannot be applied to controlling ASMs since it does not consider intrinsic characteristics of ASMs such as discrimination between stable and transient states and abiding by the principle of fundamental mode operations.
2. Mathematical Formulation of Corrective Control
2.1. Modeling of ASMs
2.2. Closed-Loop System
- (a)
- When one of B, C, and Σ changes its output or undertakes state transitions, the others must maintain their stable states.
- (b)
- The external input v must remain unchanged when either of B, C, or Σ is under transient transitions.
3. Stable Reachability and Detectability
3.1. Stable Reachability of Input/State ASMs
3.2. Detectability and Stable Reachability of Input/Output ASMs
4. Model Matching Control
4.1. Model Matching for Input/State ASMs
4.2. Model Matching for Input/Output ASMs
4.3. Model Matching for Composite ASMs
5. Fault-Tolerant Control
5.1. Transient Faults
5.2. Permanent Faults and Intermittent Faults
5.3. Intelligent and Cyber Attacks
5.4. Applications to Space-Borne Digital Systems
6. Conclusions and Future Studies
- (i)
- It is anticipated that fault-tolerant corrective control schemes can be further developed by presenting dominant cyber attacks, e.g., false data injection attacks [108,109,110] and denial of service (DoS) attacks [111,112,113], to the configuration of the corrective control system in a more practical way. To this end, previous research on network attacks in cyber-physical systems (CPSs) [114,115,116] must be incorporated into corrective control theory.
- (ii)
- Though many convincing experimental evaluations of corrective controllers exist, there is still a lack of application studies which validate that asynchronous digital systems embedded with the corrective controller show fault-hardening ability [117,118,119] against real radiation-related faults. For this purpose, radiation exposure experiments [120] on the implemented corrective control systems must be conducted.
- (iii)
- All previous researches on dynamic corrective control aim at controlling ASMs only. However, synchronous sequential machines comprise the majority of existing digital systems. Hence, it would represent trailblazing work if a novel corrective control methodology is developed that can improve the behavior of synchronous sequential machines, possibly under the globally asynchronous locally synchronous (GALS) architecture [121,122,123].
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Data Availability Statement
Conflicts of Interest
References
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System | ASM Type | Fault Type | Result |
---|---|---|---|
Error counter [93,94,95,96] | Input/output | Transient fault | [71] |
Input/state | Input constraint | ||
Scrubbing scheduler | Input/output | Permanent fault | [83] |
for memory [97,98,99] | Input/state | Attack to controller | |
ROM controller [102] | Switched | Intermittent fault | [77] |
Transient fault | |||
TMR memory [90,106] | Input/state | Transient fault | [107] |
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Yang, J.-M.; Kwak, S.-W. A Survey on Dynamic Corrective Control of Asynchronous Sequential Machines. Appl. Sci. 2022, 12, 2562. https://doi.org/10.3390/app12052562
Yang J-M, Kwak S-W. A Survey on Dynamic Corrective Control of Asynchronous Sequential Machines. Applied Sciences. 2022; 12(5):2562. https://doi.org/10.3390/app12052562
Chicago/Turabian StyleYang, Jung-Min, and Seong-Woo Kwak. 2022. "A Survey on Dynamic Corrective Control of Asynchronous Sequential Machines" Applied Sciences 12, no. 5: 2562. https://doi.org/10.3390/app12052562
APA StyleYang, J.-M., & Kwak, S.-W. (2022). A Survey on Dynamic Corrective Control of Asynchronous Sequential Machines. Applied Sciences, 12(5), 2562. https://doi.org/10.3390/app12052562