Low-Noise Potentiostat Readout Circuit with a Chopper Fully Differential Difference Amplifier for Glucose Monitoring

Abstract

This paper presents a low-noise potentiostat readout circuit with a chopper fully differential difference amplifier (FDDA) for glucose monitoring. Glucose monitoring is necessary for the early diagnosis of diabetes complications and for health management. Ammeter electrochemical sensors are widely used for glucose detection, and in general, a three-electrode structure of a reference electrode (RE), a counter electrode (CE), and a working electrode (WE) is implemented with a potentiostat structure. A low-noise characteristic of the readout circuit is essential for highly accurate glucose monitoring. The chopping technique can reduce low-frequency noises such as 1/f noise and can achieve the required low-noise characteristic. The proposed potentiostat readout circuit is based on a low-noise chopper FDDA with a class-AB output stage. The implementation of the chopper FDDA scheme of the potentiostat readout circuit can decrease the number of amplifiers in the control part of the potentiostat, with reduced power consumption and a wide dynamic output range. The negative feedback loop of the inverting amplifier scheme with the FDDA maintains the voltage between the WE and RE constants. The negative feedback loop tracks the reference voltage of the RE with an input voltage of the WE. The proposed potentiostat readout circuit is designed in the standard 0.18 µm CMOS process, and the simulated current consumption is 48.54 μA with a 1.8 V power supply. The simulated input-referred noise level was 8.53 pArms.

1. Introduction

Diabetic status, such as improved hemoglobin A1C levels and reduced long-term microvascular and macrovascular complications, can be detected through a glucose monitoring system [1]. Current mode electrical sensors that detect glucose concentrations have been widely used to detect diabetes [2,3,4]. A glucose monitoring system based on electrochemical current mode sensors using a potentiostat biasing circuit was reported in [2,3].

The sensing mechanism using a three-electrode potentiostat sensor is shown in Figure 1. A general potentiostat circuit consists of a control unit (control amplifier), a measurement unit that measures the sensing current (I_sense) according to the impedance of the solution, and three electrodes [5]. The potentiostat control unit operates by maintaining the voltage difference between a working electrode (WE) and a reference electrode (RE) to the desired voltage potential, V_cell, for which the analyte under study can generate a redox current. The generated redox current flows from the counter electrode (CE) to the WE, or vice versa, and the solution concentration can be monitored by detecting this current. In the case of electrochemical current mode sensors for glucose detection, the level of diabetes can be detected by observing the current generated through a constant potential difference according to changes in the glucose concentration. This characteristic of the current mode potentiostat sensor is suitable not only for glucose monitoring, but also for other biometric applications such as virus detection [6,7].

Figure 2a shows a typical potentiostat with a single-end (SE) topology [7,8,9]. The negative feedback of the potentiostat ensures that V_cell tracks an applied potential difference V_src under varying current–load conditions. The WE is indirectly biased to the ground potential by the virtual ground of OP₃. The OP₁ buffers the voltage of the RE, and the negative input terminal of OP₂ is maintained to the ground by the electrochemical feedback loop; thus, the potential of the RE is maintained at –V_src. The voltage swing of V_cell in the SE topology, S_SE, assuming that OP₂ has a rail-to-rail output, is then defined by the voltage swing at the CE:

$$S_{SE}=\left|V_{dd}-V_{ss}\right|\frac{R_{WE}}{R_{WE}+R_{CE}}$$

(1)

where V_dd is the positive supply voltage and V_ss is the negative supply voltage.

To maintain the voltage potential between the WE and RE by the virtual ground using negative feedback and to extend the allowable voltage swing of the V_cell under a low-supply-voltage condition, the SE scheme can be expanded to a fully differential (FD) potentiostat scheme, as shown in Figure 2b [10]. The negative feedback of OP₆ ensures that V_cell tracks an applied potential difference, V_src, similar to the SE topology. In the FD topology, however, assuming that OP₆ has a rail-to-rail output, the voltage swing for the FD potentiostat S_FD is expressed as:

$$S_{FD}=2\left|V_{dd}-V_{ss}\right|\frac{R_{WE}}{R_{WE}+2R_{sense}+R_{CE}}$$

(2)

Assuming that R_sense is negligible, the FD potentiostat can double the voltage swing range of the SE topology.

In addition to the improved signal swing, the FD potentiostat suppresses the common mode noise and doubles the operating range of the sensor’s output owing to its differential characteristics. Expanding the voltage swing of the potentiostat using the FD architecture offers a wider range of voltages for glucose detection. The circuit with a wider output range is required when the supply voltage is lowered or when the output voltage is measured in by the transimpedance amplifier. In addition, the FD potentiostat may solve the performance degradation due to common mode interference. Owing to these advantages of the FD potentiostat, many studies [10,11,12] have implemented a potentiostat using the FD structure. In [10], a potentiostat was designed to directly detect analytes through on-chip recording electrodes while using an FD structure to suppress common mode noise. In [11], a low power consumption and high resolution suitable for portable potentiostats were implemented through the FD architecture.

By using the fully differential difference amplifier (FDDA) structure as shown in Figure 2c, there is no input buffering and resistance driving with the advantages of the FD structure. The two input stages share the output stage to make it power efficient.

In this paper, an FDDA potentiostat amplifier with a low-noise chopper scheme is presented.

2. Proposed Potentiostat Readout Circuit

In [12], the FDDA used in the FD potentiostat was implemented as shown in Figure 3.

The FDDA was implemented in a two-stage amplifier, and common mode feedback (CMFB) was implemented using a switched capacitor. The balanced outputs of the FDDA are given in Equation (3), in which A_O is the open-loop gain of the FDDA, V_pp and V_pn are the non-inverting pairs, and V_np and V_nn are the inverting pairs.

$$V_{op}=-V_{on}=A_O\left[(V_{pp}-V_{pn})-(V_{np}-V_{nn})\right]$$

(3)

With the negative feedback loop, the two differential pairs of the FDDA become equal, as shown in Equation (4).

$$V_{pp}-V_{pn}=V_{np}-V_{nn}; A_O\to \infty$$

(4)

Therefore, the FDDA requires a very large open-loop gain for V_cell to track V_src. However, the two-stage structure has a low open-loop gain, so V_cell cannot completely track V_src. In addition, the switched capacitor increases the switching noise in the monitoring system, which requires high precision, thereby degrading the noise performance.

Since the monitoring system should be sensitive and linear to the target glucose concentration, the readout circuit should have a low noise characteristic. Chopping techniques are widely used to reduce low-frequency noise in the continuous time domain [13]. As shown in Figure 4, the chopping technique modulates and amplifies a low-frequency signal to a high-frequency band with more than 1/f corner noise using a chopper composed of four switches. Thereafter, through demodulation, the signal moves to a low frequency and the noise moves to a high frequency to obtain the low-noise amplified signal after passing through the low-pass filter (LPF).

When using the chopping technique, the chopper switch and input parasitic capacitance determine the input impedance, so the chopper frequency and input transistor size should have appropriate values.

In this paper, a low-noise potentiostat readout circuit with a chopper FDDA is proposed. The maximum signal swing can be realized using the rail-to-rail input and class-AB output stage, and a high open-loop gain is obtained through the cascode stage, allowing V_cell to track close to V_src. In addition, the implemented Monticelli style class-AB output stage can increase the power efficiency. Further, the low noise characteristic was implemented by adopting a chopping technique.

The top architecture of the proposed potentiostat readout integrated circuit (ROIC) is shown in Figure 5a. The proposed circuit implements a control unit that maintains a constant potential difference and a measurement unit that detects current changes by using only one FDDA. The three electrodes make current changes, and then, feedback resistors cause a voltage drop between the OUTN and OUTP. The differential voltage between two differential signals can swings from −VDD to +VDD, and each of the positive and negative output voltages swings from the ground to the VDD.

The feedback resistor can be adjusted to the value of the selected programmable resistor array through the serial peripheral interface (SPI) or connected to the external resistor. The bias circuit, timing generator, and SPI were on-chip. The structure of the FDDA control unit is shown in Figure 5b. The output of the FDDA and the input from the electrode form a negative feedback structure because the internal connection has a structure in which the current is merged between the positive input stage.

A schematic of the proposed internal circuit of the chopper FDDA is shown in Figure 6. The proposed circuit uses the chopping technique at the input stage and the cascode stage to reduce low-frequency noise. The maximum signal swing was implemented using the rail-to-rail input stage, and the finite gain error was reduced by the high open-loop gain of over 110 dB. In the output stage, the transconductance (g_m) of the PMOS and NMOS can be combined to drive a larger load and can increase the power efficiency by the Monticelli class-AB output stage [14]. In the CMFB circuit, the R_CM and C_CM detect the output common mode voltage. The error amplifier consists of MN20, MN21, MN22, MP20, and MP21, which generate the control voltage V_cmfb, which controls the bias current of the cascode stages. By using an error amplifier, common mode feedback is possible without switching noise. The fast CMFB path [15] can provide quick common mode feedback by simultaneously transmitting back through the NMOS (NM11–NM15) and PMOS (PM11–PM15). In addition, for frequency stability, a nested Miller capacitor was added to the CMFB stage and the main amplifier to ensure a stable frequency of the phase margin of 50°. The values of the transistors and passive elements in the FDDA are listed in

Table 1. Values of transistors in the proposed FDDA.

Transistor	Size (W/L) (μm)	Transistor	Size (W/L) (μm)
MP1, MP2	60/2.5	MN1, MN2	16/4
MP3–MP6	40/0.5	MN3–MN6	40/0.5
MP7, MP8	20/2	MN7, MN8	16/4
MP9, MP10	160/0.5	NM9, MN10	80/0.5
MP11	5/2	MN11, MN12	4/4
MP12	50/2	MN13, MN14	20/0.5
MP13, MP14	40/0.5	MN15	5/4
MP15	200/2	MN16, MN17	5/4
MP16, MP17	80/2	MP18, MP19	5/0.5
MP18, MP19	10/0.5	MN20	4/2
MP20, MP21	12/5	MN21, MN22	40/0.5

and

Table 2. Values of passive components in the FDDA.

Component	Value
CF	4.8 pF
CCM	412 fF
RCM	562.615 kΩ
CE	3.2 pF
RE	1 MΩ

.

The glucose concentration ranges and the equivalent resistance variation of commercial glucose strips are shown in

Table 3. The concentration ranges and the equivalent resistance variation of glucose strips.

Test Strip Name	Glucose Conc. Range (mg/dL)	Resistance (kΩ)
		Minimum	Maximum
Optimum®, Abbott	46–393	4.58	5.64
Contour®, Bayer	34–522	35.71	500
OneTouch Ultra®, Johnson & Johnson	36–450	250	2000

[16].

With the resistance according to the glucose concentration of 36–450 mg/dL, it had a value of 250–2250 kΩ when using the OneTouch Ultra^® test strip from Johnson & Johnson. This functionality enabled it to read hypoglycemia with glucose levels lower than the normal range (80–130 mg/dL) or hyperglycemia with blood sugar levels of 180 mg/dL or more. In this paper, as shown in Figure 7, the Verilog-A equivalent voltage-controlled resistor modeling of the glucose sensor and its specifications are similar to the OneTouch Ultra^® test strip, which was is implemented and simulated. The resistance between the RE and CE was modeled as a constant resistor at 10 kΩ. In this circuit, the WE and RE are indirectly biased to 1.2 V and 600 mV, respectively, by the virtual short between each amplifier input node.

Figure 8 shows the current and differential output voltage according to the impedance change. The voltage-controlled resistance between the WE and RE varied from 250 to 2250 kΩ, as shown in Figure 7. As the resistance changes, a change in current I_sense occurs. As a result of simulating the resistance range of 250 to 2250 kΩ, the amount of current (I_sense) was 2.3995 μA (at 250 kΩ) and 266.68 nA (at 2250 kΩ). The current was converted into an output differential voltage, amplified according to the feedback resistance value. The current signal flowing through the feedback resistor generates spikes by the chopper clock; however, the spikes in the common mode are removed by the output voltage in the differential mode. Because the output current is inversely proportional to the sinusoidal input resistance change of the electrochemical sensor, I_sense and V_out have waveform shapes of 1/[1 + sin (x)].

The amplitude of the output voltage of the proposed circuit is determined by the value of the feedback resistance, as shown in Figure 9. The proposed circuit has a controllable resistance array, which has three resistance values of 100, 150, and 200 kΩ, which can be set through a serial peripheral interface (SPI). Figure 9a shows the use of the feedback resistance of 100 kΩ, and Figure 9b shows the use of the feedback resistance value of 200 kΩ. When feedback resistors of 100 kΩ and 200 kΩ are used, differential output voltages of 656 mV to 1.1 V and 710 mV to 1.59 V can be obtained from the output, respectively.

3. Measurement Results

Figure 10 shows a die photograph of the proposed potentiostat ROIC. The circuit was implemented using a 0.18 μm CMOS process, and the proposed potentiostat biasing circuit had an area of 330 μm × 374 μm. Figure 11 shows the differential output voltage according to a glucose concentration of 2 mM to 20 mM. In Figure 11a, the differential voltage is 679 mV and 960 mV at concentrations of 2 mM and 20 mM, respectively, 8 s after sensing starting. The linearity is shown in Figure 11b. The coefficient of determination R² with a feedback resistor of 200 kΩ was 0.9997.

The input-referred noise results are shown in Figure 12. The input-referred noise at 1 Hz was 802.2 fA/√Hz of the 200 kΩ feedback resistor. The input-referred RMS noise from 0.1 Hz to 50 Hz was 11.2 pA_RMS.

Table 4. Comparison of performance with previous studies.

	This Work	IEEE MIEL 2021 [19]	IEEE iSES 2021 [20]	IEEE Access 2020 [17]	Sensors 2017 [13]	ISCAS 2015 [18]
Process (μm)	0.18	0.18	0.18	0.065	0.18	0.18
Architecture	FDDA	Current conveyer	Current conveyer	1st-order delta-sigma converter	FDDA	DDA
Chopper	Y (8 kHz)	N	N	N	N	N
Output format	Voltage	Current	Voltage	Digital codes	Voltage	Voltage
Supply voltage (V)	1.8	1.8	1.5	1.2	1.8	1.8
Power consumption (μW)	86.4	2300	124	15–25 (0.1–1.5 μA)	53	72.36
Input-referred noise (pARMS)	11.2 (50 Hz BW) (measured)	153 (0.01~1 kHz)	N/A	168.3 1 (1 Hz BW) (measured)	N/A	N/A

¹ Output digital code is limited to 10 bits.

summarizes the performance of the proposed potentiostat readout circuit with those of previous studies [11,15,16,17,18].

4. Conclusions

This paper proposed a low-noise potentiostat readout circuit with a chopper fully differential difference amplifier for glucose monitoring. The potentiostat electrochemical current mode sensors convert potential differences into current signals according to the concentration of the solution, and the readout circuit converts current signals into voltage signals.

The proposed potentiostat ROIC consists of a potentiostat biasing circuit with a chopper FDDA, bias circuit, SPI, and timing logic. The implementation of the chopper FDDA scheme for the potentiostat readout circuit can decrease the number of amplifiers in the control part, with reduced power consumption and a wide dynamic output range. In addition, the maximum signal swing can be realized using the rail-to-rail input stage, and a high open-loop gain is obtained through the cascode stage, allowing V_cell to track close to V_src. Moreover, the implemented Monticelli-style class-AB output stage can increase the power efficiency. The chopping technique can reduce low-frequency noises, such as 1/f noise, thereby achieving the requisite low-noise characteristic for highly accurate glucose monitoring.

The proposed potentiostat readout circuit was designed in the standard 0.18 µm CMOS process, and the current consumption was 48.54 μA with a 1.8 V power supply. The measured input-referred noise at 1 Hz was 802.2 fA/√Hz by the chopper operation with a 200 kΩ feedback resistor. The input-referred RMS noise from 0.5 Hz to 50 Hz was 11.2 pA_RMS.