A Control Strategy for Suppressing Zero-Sequence Circulating Current in Paralleled Three-Phase Voltage-Source PWM Converters

Abstract

In microgrids, paralleled converters can increase the system capacity and conversion efficiency but also generate zero-sequence circulating current, which will distort the AC-side current and increase power losses. Studies have shown that, for two paralleled three-phase voltage-source pulse width modulation (PWM) converters with common DC bus controlled by space vector PWM, the zero-sequence circulating current is mainly related to the difference of the zero-sequence duty ratio between the converters. Therefore, based on the traditional control ideal of zero-vector action time adjustment, this paper proposes a zero-sequence circulating current suppression strategy using proportional–integral quasi-resonant control and feedforward compensation control. Firstly, the dual-loop decoupled control was utilized in a single converter. Then, in order to reduce the amplitude and main harmonic components of the circulating current, a zero-vector duty ratio adjusting factor was initially generated by a proportional–integral quasi-resonant controller. Finally, to eliminate the difference of zero-sequence duty ratio between the converters, the adjusting factor was corrected by a feedforward compensation link. The simulation mode of Matlab/Simulink was constructed for the paralleled converters based on the proposed control strategy. The results verify that this strategy can effectively suppress the zero-sequence circulating current and improve power quality.

1. Introduction

With the wide application of distributed generations (DGs), such as photovoltaic and wind turbines in microgrids, power electronic technology has also rapidly developed [1,2,3]. Among them, the three-phase voltage-source pulse width modulation (PWM) converter has the advantages of high efficiency, low harmonics, simple topology, adjustable power factor, and various control methods. It is mainly used as the interface connected between the DG and the bus or the AC bus and the DC bus [4,5]. However, because the transmission efficiency of a single converter is constrained by semiconductor devices, switching frequencies, and other conditions, it cannot meet the actual demand of power conversion. To solve this problem, the modular parallel operation of converters has been applied in conditions of low voltage and high current [6].

The parallel operation of the power module can increase the system capacity and conversion efficiency as well as improve the stability and reliability of the grid [7,8,9]. However, due to the different hardware parameters between the parallel converters, their switching action cannot be fully synchronized, which will generate zero-sequence voltage. The voltage soon acts on the equivalent resistance between the converters to generate zero-sequence circulating current (ZSCC) [10]. The circulating current will increase the switching loss, reduce the efficiency of the system, increase the probability of converter failure and shutdown, and even destroy the whole system [11,12].

In order to further solve the problem of circulating current in parallel systems, scholars in China and abroad have put forward some active methods. Walker utilized a voltage source converter consisting of gate turn-off thyristors (GTOs) to connect the energy storage system to the AC bus [13]. In this converter, the active and reactive power can be managed independently and quickly by controlling the on/off of the current. Zhang et al. explained that the reason there is a path for ZSCC in the three-phase converter parallel system shown in some studies is because they ignore the magnetic couples caused by the three-pole reactors and the three-pole transformers [14]. Therefore, it is obvious that the addition of three-pole reactors and transformers at the output of the three-phase converter can block this path, which effectively suppresses the ZSCC. Borrega et al. designed a photovoltaic inverter that connects multiple parallel converters to inductors and transformers to reduce the zero-sequence voltage [15]. Bede et al. showed that adding a coupled inductor to the output of paralleled converters can reduce the circulating current. However, the authors also noted that the system is sensitive to low-order harmonics, and adopting proportional resonance (PR) control to improve the scheme can therefore result in better performance [16]. All the above methods take the measure of hardware isolation to block the current path to eliminate the circulating current. Although it is simple and easy, it requires the connection of additional hardware, which will increase the weight, volume, and cost of the system and reduce the system efficiency. Therefore, more and more modulation and control strategies have been proposed. Chen indicated that the zero-sequence problem is mostly caused by zero-sequence low-frequency harmonics. He therefore proposed a ZSCC control method based on harmonic elimination pulse width modulation (HEPWM) [17]. Similarly, a new selective harmonic elimination pulse width modulation (SHE-PWM) control technique was developed by Narimani and Moschopoulos, which can eliminate the ZSCC generated by paralleled modular voltage-source inverters (MVSIs) [18]. Although these modulation methods can reduce low-frequency and high-frequency circulating current, the high switching frequency will increase the switching loss and limit conversion efficiency. Hou put forward a multicarrier PWM technique for parallel three-phase active front-end converters (AFECs) [19]. Without using zero vectors to reduce the circulating current, this modulation synchronizes the output voltage of the converter by carrier phase shifting; however, this is so complex that it is not easy to realize. After analyzing the production principle of ZSCC, Ye et al. proposed a method to suppress it using a proportional–integral (PI) controller to regulate the zero-vector action time in a space vector pulse width modulation (SVPWM) controller [20]. This control scheme is simple to implement, but the PI technique is susceptible to different operating conditions [21]. Zhang et al. used a deadbeat controller instead of a PI controller, which further verified the correctness of the zero-vector action time adjustment method [22]. Zhang et al. improved the traditional PI control method by adding zero-vector feedforward to SVPWM control [23]. Li et al. divided the ZSCC into a small number of high-frequency components and a large number of low-frequency components. The high-frequency components were suppressed by a dual-carrier SVPWM, and a variety of low-frequency harmonics were controlled by a PR controller [24].

In view of the above analysis, this paper examines the ZSCC of two paralleled three-phase full-bridge voltage-source PWM converters with common DC bus and proposes a strategy to suppress ZSCC based on proportional–integral quasi-resonant (PIQR) control and feedforward compensation control. Firstly, for a single converter, the dual-loop decoupled control of inner current loop and outer voltage loop was used to generate the reference voltage, and the switching signal was generated by an SVPWM controller. Then, by establishing an equivalent physical model of ZSCC, the causes were analyzed. To reduce the amplitude and main harmonic components of the ZSCC, a zero-vector duty ratio adjusting factor was initially generated by the PIQR controller. Finally, for the purpose of eliminating the effect of the difference of the zero-sequence duty ratio on the system and improving the dynamic response of the zero-sequence current loop, a feedforward compensation controller was added to correct the adjusting factor. The simulation results showed that the proposed method could effectively reduce ZSCC, and its performance was better than the traditional PI control.

The rest of this paper is organized as follows. In Section 2, the voltage–current dual-loop decoupled control strategy of a single PWM converter is presented. Section 3 establishes the mathematical and physical models of paralleled PWM converters and analyzes the generation of ZSCC. The proposed control strategy in parallel systems is introduced in Section 4. Section 5 illustrates the simulation process and presents the results in detail. Section 6 concludes the paper.

2. Dual-Loop Decoupled Control Strategy of PWM Converter

The control of a single converter was the basis for studying the ZSCC problem. The three-phase full-bridge voltage-source PWM converter was used in this study. Its input is three-phase balanced AC current, and the output is DC current. Figure 1 illustrates the main circuit structure of this kind of converter [25], where $u_i\left(i=\mathrm{a},\mathrm{b},\mathrm{c}\right)$ is the voltage of the AC side, L is the filter inductance at the AC side, $R$ is the equivalent resistance of the converter, $i_k\left(k=\mathrm{a},\mathrm{b},\mathrm{c}\right)$ is the three-phase current at the AC side, $S_i\left(i=\mathrm{a},\mathrm{b},\mathrm{c}\right)$ is the three bridge arms, $C_{\mathrm{dc}}$ is the capacitor at the DC side, $u_{\mathrm{dc}}$ is the DC bus voltage, $i_{\mathrm{o}}$ is the load current at the DC side, and $R_{\mathrm{L}}$ is the DC-side resistance.

Assuming the negative pole of the DC-side capacitor as the reference point, the mathematical model of a single PWM converter shown in Figure 1 can be expressed as follows:

$$\{\begin{array}{l}L\frac{\mathrm{d}{i}_{\mathrm{a}}}{\mathrm{d}t}+R{i}_{\mathrm{a}}=u_{\mathrm{a}}-d_{\mathrm{a}}{u}_{\mathrm{dc}}-u_{\mathrm{NO}}\\ L\frac{\mathrm{d}{i}_{\mathrm{b}}}{\mathrm{d}t}+R{i}_{\mathrm{b}}=u_{\mathrm{b}}-d_{\mathrm{b}}{u}_{\mathrm{dc}}-u_{\mathrm{NO}}\\ L\frac{\mathrm{d}{i}_{\mathrm{c}}}{\mathrm{d}t}+R{i}_{\mathrm{c}}=u_{\mathrm{c}}-d_{\mathrm{c}}{u}_{\mathrm{dc}}-u_{\mathrm{NO}}\\ C_{\mathrm{dc}}\frac{\mathrm{d}{u}_{\mathrm{dc}}}{\mathrm{d}t}=d_{\mathrm{a}}{i}_{\mathrm{a}}+d_{\mathrm{b}}{i}_{\mathrm{b}}+d_{\mathrm{c}}{i}_{\mathrm{c}}-i_{\mathrm{o}}\end{array}$$

(1)

where $u_{\mathrm{NO}}$ is the neutral voltage at the AC side, and $d_i\left(i=\mathrm{a},\mathrm{b},\mathrm{c}\right)$ represents the output duty ratio of the three-phase bridge arm.

The above mathematical model of a converter in static three-phase coordinates is very intuitive. However, because the voltage and current on the AC side are time-varying AC variables, in order to realize the zero steady-state error control, it is necessary to change the three-phase sinusoidal quantities into DC quantities. At present, the transformation from three-phase static coordinate system ABC to two-phase synchronous rotating coordinate system d-q is mostly realized by three-dimensional coordinate transformation [26]. The d-q type mathematical model of the converter can be derived as follows:

$$\{\begin{array}{l}L\frac{\mathrm{d}{i}_{\mathrm{d}}}{\mathrm{d}t}+R{i}_{\mathrm{d}}=u_{\mathrm{d}}-d_{\mathrm{d}}{u}_{\mathrm{dc}}+\omega L{i}_{\mathrm{q}}\\ L\frac{\mathrm{d}{i}_{\mathrm{q}}}{\mathrm{d}t}+R{i}_{\mathrm{q}}=u_{\mathrm{q}}-d_{\mathrm{q}}{u}_{\mathrm{dc}}-\omega L{i}_{\mathrm{d}}\\ C_{\mathrm{dc}}\frac{\mathrm{d}{u}_{\mathrm{dc}}}{\mathrm{d}t}=\frac{3}{2}\left(d_{\mathrm{d}}{i}_{\mathrm{d}}+d_{\mathrm{q}}{i}_{\mathrm{q}}\right)-i_{\mathrm{o}}\end{array}$$

(2)

where $\omega$ is the fundamental frequency of three-phase alternating current.

According to Equation (2), in the mathematical model of d-q reference frame, there is a coupling phenomenon between the d-axis component and the q-axis component, which leads to the inability to adjust the active and reactive components, respectively, of the system. Therefore, it is necessary to decouple these coupling terms. In addition, PI control was utilized in this study to achieve the goal of zero steady-state error tracking [27]. Based on these theories, the inner current control loop is as follows:

$$\{\begin{array}{l}{u}_{\mathrm{d}}^{\ast }=-\left(k_{\mathrm{ip}}+\frac{k_{\mathrm{ii}}}{s}\right)\left(i_{\mathrm{d}}^{\ast }-i_{\mathrm{d}}\right)+u_{\mathrm{d}}+\omega L{i}_{\mathrm{q}}\\ u_{\mathrm{q}}^{\ast }=-\left(k_{\mathrm{ip}}+\frac{k_{\mathrm{ii}}}{s}\right)\left(i_{\mathrm{q}}^{\ast }-i_{\mathrm{q}}\right)+u_{\mathrm{q}}-\omega L{i}_{\mathrm{d}}\end{array}$$

(3)

where $k_{\mathrm{ip}}$ and $k_{\mathrm{ii}}$ are the proportional and integral coefficients of the current loop PI controller, respectively, and $i_{\mathrm{d}}^{\ast }$ and $i_{\mathrm{q}}^{\ast }$ are the reference currents.

According to the instantaneous reactive power theory, $i_{\mathrm{d}}$ affects the active power of the system, and $i_{\mathrm{q}}$ affects the reactive power of the system. In order to achieve unit power operation, $i_{\mathrm{q}}^{\ast }$ was set to zero in this study. Moreover, to realize the zero steady-state error control of the d-axis reference current, PI control was used to control the outer voltage loop to generate $i_{\mathrm{d}}^{\ast }$, which can be described as follows:

$$i_{\mathrm{d}}^{\ast }=\left(k_{\mathrm{up}}+\frac{k_{\mathrm{ui}}}{s}\right)\left(u_{\mathrm{dc}}^{\ast }-u_{\mathrm{dc}}\right)$$

(4)

where $k_{\mathrm{up}}$ and $k_{\mathrm{ui}}$ are the proportional and integral coefficients of the voltage loop PI controller, respectively, and $u_{\mathrm{dc}}^{\ast }$ is the reference voltage of the DC bus.

SVPWM is a pulse width modulation technique that has been improved by sinusoidal pulse width modulation (SPWM), which is often used for the control of three-phase bridge converters [28]. This modulation represents the eight working states of the three bridge arms with eight voltage space state vectors. The process of space vector composition is shown in Figure 2, where the state vector ${\mathit{V}}_i\left(i=1,2,\dots ,6\right)$ is the nonzero vector, and ${\mathit{V}}_0$ and ${\mathit{V}}_7$ are the zero vectors.

As depicted in Figure 2, the input reference voltage ${\mathit{V}}_{\mathrm{ref}}$ can be represented by two adjacent nonzero state vectors and zero vectors. As the specific working principle and implementation method of SVPWM have been introduced in detail in [29], they will not be repeated here. This modulation technique can not only improve the utilization rate of the voltage but also effectively reduce the switching frequency and improve the reliability of the system [30]. Therefore, in this study, SVPWM was used to control the switching of the converter.

Based on the above analysis, the dual-loop decoupled control strategy of the three-phase voltage-source PWM converter based on PI control and SVPWM control is illustrated in Figure 3.

3. Analysis of ZSCC in Paralleled PWM Converters

The parallel system studied in this work consisted of two three-phase voltage-source PWM converters, as shown in Figure 1, connected to the common DC link, which is depicted in Figure 4.

From Figure 4 and Equation (1), the average model of the parallel system in static three-phase coordinates can be expressed as follows:

$$\{\begin{array}{l}{L}_i\frac{\mathrm{d}{i}_{\mathrm{a}i}}{\mathrm{d}t}+R_i{i}_{\mathrm{a}i}=u_{\mathrm{a}}-d_{\mathrm{a}i}{u}_{\mathrm{dc}}-u_{\mathrm{NO}}\\ L_i\frac{\mathrm{d}{i}_{\mathrm{b}i}}{\mathrm{d}t}+R_i{i}_{\mathrm{b}i}=u_{\mathrm{b}}-d_{\mathrm{b}i}{u}_{\mathrm{dc}}-u_{\mathrm{NO}}\\ L_i\frac{\mathrm{d}{i}_{\mathrm{c}i}}{\mathrm{d}t}+R_i{i}_{\mathrm{c}i}=u_{\mathrm{c}}-d_{\mathrm{c}i}{u}_{\mathrm{dc}}-u_{\mathrm{NO}}\\ 2C_{\mathrm{dc}}\frac{\mathrm{d}{u}_{\mathrm{dc}}}{\mathrm{d}t}={\displaystyle \sum _{i=1}^2\left(d_{\mathrm{a}i}{i}_{\mathrm{a}i}+d_{\mathrm{b}i}{i}_{\mathrm{b}i}+d_{\mathrm{c}i}{i}_{\mathrm{c}i}\right)}-i_{\mathrm{o}}\end{array}$$

(5)

where expressions with subscript “$i$” refer to the related variables of the $i\mathrm{th}$ converter, $i=1,2$.

For a single PWM converter, no ZSCC is generated because there is no circulating current path. However, when two converters are connected in parallel, a path will be formed. If a zero-sequence voltage exists, ZSCC will also be generated on the loop impedance. The ZSCC $i_{\mathrm{z}}$ is defined in this study as follows:

$$\{\begin{array}{l}{i}_{\mathrm{z}1}=i_{\mathrm{a}1}+i_{\mathrm{b}1}+i_{\mathrm{c}1}\\ i_{\mathrm{z}}=i_{\mathrm{z}1}=-i_{\mathrm{z}2}\end{array}$$

(6)

where $i_{\mathrm{z}x}$ denotes the ZSCC of the $x\mathrm{th}$ module, $x=1,2$. The ZSCC of Module 1 and the circulating current of Module 2 are equal in size and in opposite directions.

In the SVPWM control, because the third harmonic is injected, the sum of the output duty ratios of the three-phase bridge arms of the PWM converter will not be equal to zero. The zero-sequence duty ratio of the $i\mathrm{th}\left(i=1,2\right)$ converter can be defined as follows:

$$d_{\mathrm{z}i}=d_{\mathrm{a}i}+d_{\mathrm{b}i}+d_{\mathrm{c}i}.$$

(7)

The voltage of the three-phase alternating current was balanced in this study, which means that $u_{\mathrm{a}}+u_{\mathrm{b}}+u_{\mathrm{c}}=0$. Therefore, combining Equations (5)–(7) results in the following:

$$\{\begin{array}{l}{L}_1\frac{\mathrm{d}{i}_{\mathrm{z}1}}{\mathrm{d}t}+R_1{i}_{\mathrm{z}1}+u_{\mathrm{dc}}{d}_{\mathrm{z}1}+3u_{\mathrm{NO}}=0\\ L_2\frac{\mathrm{d}{i}_{\mathrm{z}2}}{\mathrm{d}t}+R_2{i}_{\mathrm{z}2}+u_{\mathrm{dc}}{d}_{\mathrm{z}2}+3u_{\mathrm{NO}}=0\end{array}.$$

(8)

The equivalent mathematical model of ZSCC can be derived from Equation (8) as follows:

$$\left(L_1+L_2\right)\frac{\mathrm{d}{i}_{\mathrm{z}}}{\mathrm{d}t}+\left(R_1+R_2\right)i_{\mathrm{z}}=\left(d_{\mathrm{z}2}-d_{\mathrm{z}1}\right)u_{\mathrm{dc}}.$$

(9)

The physical circuital model of Equation (9) is shown in Figure 5, where $u_{\mathrm{z}i}=d_{\mathrm{z}i}{u}_{\mathrm{dc}}$ denotes the zero-sequence voltage of the $i\mathrm{th}$ converter, $i=1,2$.

Figure 5 demonstrates that, when analyzing the ZSCC problem, each converter module can be equivalent to a branch in the physical circuit, and two branches can be combined into a circulating current path. It can be seen that the magnitude of ZSCC is related to the AC-side inductance, equivalent resistance, and zero-sequence voltage of the two branches, and controlling the zero-sequence voltage difference to zero is the key to eliminating ZSCC.

4. Control Strategy for Suppressing ZSCC

In this study, each converter in the parallel system adopted the dual-loop decoupled control strategy described in Section 2. Therefore, by synthesizing the key element of the ZSCC suppression shown in Figure 5, the zero-sequence voltage could be adjusted by controlling the zero-sequence duty ratio of the converter. When the zero-sequence duty ratios of the branches are equal, the zero-sequence voltages are equal, and the ZSCC is naturally suppressed. In addition, for two paralleled converters, only the zero-sequence duty ratio of one converter needs to be controlled to suppress the ZSCC of the entire system. Extending to the parallel system with $N\left(N\ge 3\right)$ converters, the suppression of ZSCC needs to control the zero-sequence duty ratios of $N-1$ converters.

As noted in Section 2, in space vector modulation, the zero-sequence duty ratio is related to the action time of the state vectors. Among them, two nonzero state vectors can uniquely determine a reference voltage vector under constant action time, and changing the action time of the zero-state vector will not affect the output voltage and current. Therefore, the zero-sequence duty ratio is usually regulated by controlling the zero-vector action time. Taking sector Ι as an example, the switching signal before and after adjustment in SVPWM control are presented in Figure 6, where the duty ratios of two nonzero vectors are $d_1$ and $d_2$, respectively, and the duty ratio of zero vector is $d_0$.

As shown in Figure 6a, the zero-sequence duty ratio before adjustment can be expressed as follows:

$$\begin{array}{l}{d}_{\mathrm{z}}=d_{\mathrm{a}}+d_{\mathrm{b}}+d_{\mathrm{c}}=\left(d_1+d_2+0.5d_0\right)+\left(d_2+0.5d_0\right)+0.5d_0\\ =d_1+2d_2+1.5d_0\end{array}.$$

(10)

According to Figure 6b, an adjusting factor $\chi$ is added to the duty ratio of zero vector in a PWM period. The action time of ${\mathit{V}}_7$ and ${\mathit{V}}_0$ are changed to $\left(d_0/2-\chi \right)T_{\mathrm{s}}$ and $\left(d_0/2+\chi \right)T_{\mathrm{s}}$, respectively. After adjusting, the zero-sequence duty ratio $d_{\mathrm{z}}{}^{\prime }$ can be described as follows:

$$\begin{array}{l}{d}_{\mathrm{z}}{}^{\prime }=d_{\mathrm{a}}{}^{\prime }+d_{\mathrm{b}}{}^{\prime }+d_{\mathrm{c}}{}^{\prime }=\left(d_1+d_2+0.5d_0-2\chi \right)+\left(d_2+0.5d_0-2\chi \right)+0.5d_0-2\chi \\ =d_1+2d_2+1.5d_0-6\chi \end{array}.$$

(11)

Moreover, Figure 6b shows that adjusting the factor directly changes the switching time $T_{A\mathrm{on}}$, $T_{B\mathrm{on}}$, and $T_{\mathrm{Con}}$ of the state vector in SVPWM. The switching time after correcting can be derived as follows:

$$\{\begin{array}{l}{T}_{A\mathrm{on}}{}^{\prime }=T_{A\mathrm{on}}+\chi T_{\mathrm{s}}\\ T_{\mathrm{Bon}}{}^{\prime }=T_{A\mathrm{on}}{}^{\prime }+\frac{d_1}{2}{T}_{\mathrm{s}}\\ T_{\mathrm{Con}}{}^{\prime }=T_{\mathrm{Bon}}{}^{\prime }+\frac{d_2}{2}{T}_{\mathrm{s}}\end{array}$$

(12)

where $\chi$ should be within the range of $\left[-d_0/4,d_0/4\right]$, which means that the action time of the zero vector is not less than zero without changing the action time of the nonzero vector.

Substituting Equation (11) into Equation (9) can get the modified ZSCC model, which can be expressed as follows:

$$\begin{array}{l}\left(L_1+L_2\right)\frac{\mathrm{d}{i}_{\mathrm{z}}}{\mathrm{d}t}+\left(R_1+R_2\right)i_{\mathrm{z}}=\left(d_{\mathrm{z}2}{}^{\prime }-d_{\mathrm{z}1}{}^{\prime }\right)u_{\mathrm{dc}}\\ =\left[\left(d_{12}+2d_{22}+1.5d_{02}-6{\chi }_2\right)-\left(d_{11}+2d_{21}+1.5d_{01}-6{\chi }_1\right)\right]u_{\mathrm{dc}}\end{array}$$

(13)

where $d_{ij}$ represents the duty ratio of the related vector in the $j\mathrm{th}$ module, and ${\chi }_j$ denotes the zero-vector duty ratio adjusting factor of the $j\mathrm{th}$ module, $j=1,2$.

In practical engineering, the equivalent resistance value of the converter is much smaller than its reactance value, so the $R_1$ and $R_2$ can be ignored [31]. Moreover, because only one converter is needed to control the entire ZSCC, ${\chi }_1$ is set to zero. What is more, the sum of the duty ratio of the two nonzero vectors and the zero vector is 1. Therefore, Equation (13) can be simplified as follows:

$$\left(L_1+L_2\right)\frac{\mathrm{d}{i}_{\mathrm{z}}}{\mathrm{d}t}=\frac{1}{2}\left(\mathsf{\Delta }{D}_{12}-12\chi \right)u_{\mathrm{dc}}$$

(14)

where $\mathsf{\Delta }{D}_{12}=d_{11}-d_{12}-d_{21}+d_{22}$.

In order to analyze the system function generating the ZSCC, the Laplace transform of Equation (14) is obtained as follows:

$$I_{\mathrm{z}}\left(s\right)=\frac{-6u_{\mathrm{dc}}/\left(L_1+L_2\right)}{s}\left(\chi \left(s\right)-\frac{1}{12}\mathsf{\Delta }{D}_{12}\left(s\right)\right).$$

(15)

Therefore, Equation (15) shows that the generating system of ZSCC can be regarded as a first-order system with disturbance. In this system, the input is the adjusting factor, and the output is the ZSCC. For the first-order system, PI control is generally used. The input of the PI controller here is the difference between the actual value and the reference value of ZSCC, and the output is the adjusting factor. However, as shown in [32], the main low-frequency harmonics in ZSCC are the 3rd, 9th, and 15th. Hence, to suppress these harmonics, the resonant controller needs to be added to the PI control.

As the gain of an ideal resonant controller at the resonant frequency is infinite, which cannot be achieved in practice, the quasi-resonant controller is currently used the most [33]. This kind of controller can increase system bandwidth, suppress higher harmonics, and is easy to implement. In this study, a PI controller with quasi-resonant control (PIQR) was used. Its system function can be expressed as follows:

$$G_{PIQR}(s)=k_{\mathrm{pz}}+\frac{k_{\mathrm{iz}}}{s}+{\displaystyle \sum _{n=3,9,15}\frac{2k_{\mathrm{rz}n}{\omega }_{\mathrm{c}}s}{s^2+2{\omega }_{\mathrm{c}}s+{\left(n\omega \right)}^2}}$$

(16)

where $k_{\mathrm{pz}}$ and $k_{\mathrm{iz}}$ are the proportional and integral coefficients of the ZSCC control loop, respectively, $k_{\mathrm{rz}n}$ is the resonance coefficient for suppressing the $n\mathrm{th}$ harmonic, ${\omega }_{\mathrm{c}}$ is the cut-off angular frequency, and $\omega$ is the fundamental angular frequency of the AC-side voltage.

According to Equation (16), the generation of zero-vector duty ratio adjusting factor can be derived as follows:

$$\chi =\left(k_{\mathrm{pz}}+\frac{k_{\mathrm{iz}}}{s}+{\displaystyle \sum _{n=3,9,15}\frac{2k_{\mathrm{rz}n}{\omega }_{\mathrm{c}}s}{s^2+2{\omega }_{\mathrm{c}}s+{\left(n\omega \right)}^2}}\right)\left(i_{\mathrm{z}}^{\ast }-i_{\mathrm{z}}\right)$$

(17)

where the ZSCC reference value $i_{\mathrm{z}}^{\ast }$ is set to zero.

Due to the differences in line parameters, the currents on the branches of different converters are unequal, so the reference voltages generated by the current regulators are also different, which means nonzero vector duty ratio differences are bound to occur. It can be seen from Equation (15) that this difference will have a certain effect on the adjusting factor. However, the PIQR controller does not eliminate this disturbance, so this paper proposes a control strategy that combines a feedforward compensation scheme with PIQR. The improved adjusting factor generation can be expressed as follows:

$${\chi }^{\prime }=\left(k_{\mathrm{pz}}+\frac{k_{\mathrm{iz}}}{s}+{\displaystyle \sum _{n=3,9,15}\frac{2k_{\mathrm{rz}n}{\omega }_{\mathrm{c}}s}{s^2+2{\omega }_{\mathrm{c}}s+{\left(n\omega \right)}^2}}\right)\left(i_{\mathrm{z}}^{\ast }-i_{\mathrm{z}}\right)+\frac{\mathsf{\Delta }{D}_{12}(s)}{12}.$$

(18)

The ZSCC control loop proposed in this paper and obtained according to Equation (18) is shown in Figure 7.

Based on the above analysis, the control strategy of the two parallel converter system is depicted in Figure 8. In this control scheme, the two converters are controlled by an independent voltage–current loop. The difference is that when the switching signal is generated through space vector modulation, the first converter uses the modulation method, as shown in Figure 6a, while the second converter needs to use the modulation method after adding the zero-vector adjusting factor, as shown in Figure 6b. First of all, the three-phase current on the first converter line is collected, and the ZSCC is calculated. Then, through the PIQR controller, zero-vector duty ratio adjusting factor is initially generated, and the 3rd, 9th, and 15th harmonics in the ZSCC are suppressed. Afterwards, the duty ratio of the nonzero vector in the SVPWM controller of the two converters is collected, and the disturbance variable $\mathsf{\Delta }{D}_{12}$ is calculated. After multiplying the disturbance by the coefficient, it is used as the feedforward compensation regulating factor. Finally, the switching signal of the second converter is modified by this regulating factor.

5. Simulation and Analysis

In order to observe the rectification effect of the dual-loop decoupled control and verify the effectiveness of the proposed control strategy to suppress ZSCC, the parallel converter system shown in Figure 4 was performed on the MATLAB/Simulink R2016b platform, and three sets of simulation experiments were performed. The sampling period of the simulation platform was 10⁻⁶ s, and other simulation parameters of the parallel system are shown in

Table 1. Parameters for simulation of paralleled system.

Parameters	Symbol	Value	Unit
Effective voltage of AC side	uaubuc	141	V
Voltage frequency of AC side	f	50	Hz
Filter inductance 1	L1	3	mH
Filter inductance 2	L2	3/7	mH
Equivalent resistance	R1R2	0.1	$\mathsf{\Omega }$
Voltage of DC side	udc	450	V
Capacitor of DC side	Cdc	4000	$\mu \mathrm{F}$
Load resistance of DC side	RL	30	$\mathsf{\Omega }$
Switching period	Ts	0.0001	s
Proportional coefficient of current loop	kip	5.5	-
Integral coefficient of current loop	kii	20.5	-
Proportional coefficient of voltage loop	kup	1.45	-
Integral coefficient of voltage loop	kui	8.65	-

.

From Table 1, it can be seen that in order to ensure that the AC-side line parameter difference is the only variable to study the circulating system, the other control parameters of the two converters in the system were kept completely equal, including the proportional and integral coefficient of the voltage–current loop, the switching period of the SVPWM controller, and so on.

5.1. Case 1

The control target of the converter was input current and output voltage, so it was necessary to verify the power conversion ability of the parallel converter. In this case, the filter inductance of the AC side was equal, and there was no ZSCC suppression measure. Here, $L_1=L_2=3\mathrm{mH}$, and other parameters were the same as those listed in Table 1. The experimental results of 0.3–0.6 s are presented in Figure 9.

As shown in Figure 9a, the peak value of the three-phase AC voltage source was 200 V. Through the converter, the output voltage could reach the rated voltage of 450 V and remain stable. In addition, as can be seen in Figure 9b, the phase of the input voltage and input current of the converter were basically the same, and the power factor angle was close to zero, indicating that the reactive power could be effectively suppressed.

5.2. Case 2

Theoretically, if the circuit parameters of two branches are identical, the switch of the PWM converter will be synchronized, so the zero-sequence duty ratio difference of the two converters will be zero. According to Equation (9), there will be no ZSCC in the system. In this case, the filter inductance of the AC side was equal, and the proposed control strategy was utilized, where $L_1=L_2=3\mathrm{mH}$ and other parameters are same as those listed in Table 1. The parameters of the control strategy proposed in this paper are proportional coefficient $k_{\mathrm{pz}}=0.55$, integral coefficient $k_{\mathrm{iz}}=80$, resonance coefficient of the 3rd harmonic $k_{\mathrm{rz}3}=600$, resonance coefficient of the 9th harmonic $k_{\mathrm{rz}9}=400$, resonance coefficient of the 15th harmonic $k_{\mathrm{rz}15}=200$, and cut-off angular frequency ${\omega }_{\mathrm{c}}=1$ rad/s. The ZSCC waveforms are shown in Figure 10.

Figure 10a demonstrates that there was still a ZSCC in this case. However, the amplitude was small, and the peak-to-peak value between 0.3 and 0.6 s was 2.75 A. Therefore, it was impossible to make the switching time of the two converters exactly the same. As shown in Figure 10b, when the control strategy was added to the parallel system, the effect of reducing the ZSCC amplitude was obvious. The peak-to-peak value of ZSCC was 0.6 A. Compared with no control strategy, the ZSCC amplitude was reduced by 78%, which means that the control strategy proposed in this paper could effectively suppress ZSCC in this case.

5.3. Case 3

In practical engineering, the line parameters of the two branches are not exactly the same, so it is necessary to focus on the study of ZSCC when the filter inductance of the AC side is not equal. In this case, $L_1=3\mathrm{mH}$ and $L_2=7\mathrm{mH}$. The ZSCC and the harmonics it contains are shown in Figure 11.

It can be seen from Figure 11a that when the difference of inductance in the line increased, the ZSCC amplitude also increased, and the peak-to-peak value between 0.5 and 0.6 s was 7.6 A. Figure 11b is the spectrum of the ZSCC from 0.5 to 0.6 s after fast Fourier transform (FFT) with 50 Hz as the fundamental frequency. The following simulation adopted the same harmonic analysis method. According to Figure 11b, there were low harmonic components in the ZSCC without any measures, with the 3rd, 9th, and 15th harmonics the more prominent. Therefore, it is necessary to take measures to reduce the ZSCC amplitude and suppress low-frequency harmonic components.

The traditional PI control strategy is a common control method to suppress ZSCC, as noted in Section 1. Therefore, in order to compare the traditional control strategy and the PI control strategy proposed in this paper, the PI control strategy was first applied to control the ZSCC, and the experimental results were analyzed. The proportional coefficient and integral coefficient of the PI controller were set as 0.02 and 10, respectively. The simulation result is presented in Figure 12.

As shown in Figure 12a, under the same conditions, the traditional PI suppression strategy could reduce the ZSCC to a certain extent, and the peak-to-peak value was 1.32 A. Compared with no control strategy, the ZSCC amplitude was reduced by 82.6%. However, according to Figure 12b, the PI strategy had no suppression effect on the harmonics in the ZSCC, and the amplitude of the low-frequency harmonics increased. These results show that the traditional PI suppression strategy is insufficient in suppressing ZSCC.

Theoretically, the control strategy proposed in this paper can reduce the ZSCC amplitude and also suppress the low-frequency harmonic components. Therefore, in order to verify its effectiveness, the control strategy proposed in this paper was added to the parallel system, and the simulation results of the ZSCC were observed and analyzed. For parameter setting, in order to maintain consistency with the above PI controller, the proportional and integral coefficients of the PIQR controller were the same as those of the PI controller. The other parameters were $k_{\mathrm{rz}3}=600$, $k_{\mathrm{rz}9}=400$, $k_{\mathrm{rz}15}=200$, ${\omega }_{\mathrm{c}}=1$ rad/s. The simulation result is shown in Figure 13.

Figure 13a shows that the control strategy proposed in this paper could greatly reduce the ZSCC, and the peak-to-peak value was 0.63 A. The ZSCC amplitude with the proposed control strategy was 91.7% less than that without any control measures and 52.27% less than that with the traditional PI control strategy. As can be seen from Figure 13b, the proposed strategy could effectively suppress the specified harmonic components, while the influence on other harmonic components was small. In addition, the total harmonic distortion (THD) analysis of A-phase current on the AC side of Module 1 was carried out. The THD without the control strategy was 9.21%, the THD with the PI control algorithm was 4.40%, and the THD with the control strategy proposed in this paper was 4.23%.

According to the analysis of the above three cases, the control strategy proposed in this paper for the parallel operation of two converters could not only guarantee the output power quality but also effectively suppress the circulating current amplitude, reduce low-frequency harmonics, and improve input power quality when there is a ZSCC between the converters. Furthermore, compared to experimental results of the traditional PI control scheme, the proposed strategy performed better than traditional algorithms.

6. Conclusions

In order to solve the problem of ZSCC in paralleled converters, based on the traditional ZSCC control ideal of zero-vector action time adjustment, this paper proposes an improved ZSCC control strategy based on PIQR control and feedforward compensation control. Although the traditional PI control scheme can suppress the ZSCC amplitude to a certain extent, it cannot eliminate the low-frequency harmonic components with large amplitude. Therefore, a quasi-resonant controller was used to suppress the harmonic. Moreover, to eliminate the influence of the nonzero vector duty ratio between the converters on the zero-vector adjusting factor, a feedforward compensation link was added to the end of the PIQR controller. The experimental results show that the proposed control strategy is simple to implement, and compared with the PI control strategy, it can more effectively suppress the ZSCC amplitude, reduce low-frequency harmonics, and improve power quality.

In future work, we will do significant research on the following aspects. First, we will improve the control strategy proposed in this paper and apply it to a system with $N\left(N\ge 3\right)$ converters in parallel. Second, we will consider the control of ZSCC when the load on the DC side changes and conduct in-depth research.