A Series-Connected Power Decoupling Single-Phase Current-Type PWM Rectifier

Abstract

To reduce the direct-current (DC)-side inductances of single-phase current-source pulse-width-modulation (PWM) rectifiers while improving their power densities. This paper introduces a symmetric half-bridge power decoupling circuit topology. First, the circuit structure and its operating principles are analyzed in detail, following which system performance is further enhanced, leveraging the magnetic integration technology. Furthermore, a simplified control strategy based on the indirect closed-loop control of the DC-side output current is introduced. This method requires fewer sensors and simpler calculations, thereby improving system stability, and achieves approximately a 15% increase in efficiency compared to conventional methods. Simulation results demonstrate that the proposed topology significantly suppresses second harmonic ripples commonly observed in the DC-side currents of single-phase current-source PWM rectifiers. Furthermore, it reduces the values of DC-side inductances while lowering the system volume and cost. Finally, experimental validations confirm the significant potential of the symmetric half-bridge power decoupling circuit topology in enhancing the performance of single-phase current-source PWM rectifiers.

1. Introduction

The AC/DC converter is widely used in locomotive traction systems, new energy vehicle charging systems, uninterruptible power supplies, and energy storage, among other applications. It also plays a key role in high-voltage direct current (HVDC) transmission systems and flexible AC transmission systems. Furthermore, in small and medium power systems, the application prospects of single-phase PWM rectifiers are even broader [1,2,3].

Single-phase PWM rectifiers are divided into single-phase voltage-source PWM rectifiers and single-phase current-source PWM rectifiers. Traditional single-phase voltage-source PWM rectifiers have advantages in terms of size and cost, and therefore, they are more widely used [4]. However, their DC side requires the parallel connection of large electrolytic capacitors to reduce the impact of second harmonic ripple. But electrolytic capacitors tend to age quickly and have a short service life [5].

With the development of semiconductor devices, single-phase current-source PWM rectifiers are more suitable for the current development needs of power electronic rectifiers. Single-phase current-source PWM rectifiers use inductors to absorb the second harmonic ripple power on the DC side, which, compared to the electrolytic capacitors used by voltage-source PWM rectifiers, have a longer lifespan. However, the high cost, large volume, and heavy weight of large-valued energy storage inductors on the DC side significantly hinder the application of single-phase current-source PWM rectifiers. If the inductors could be made lighter, it would greatly enhance the application prospects of single-phase current-source PWM rectifiers [6].

The suppression of second harmonic ripple power in single-phase current-source PWM rectifiers mainly relies on modulation strategy improvements and power decoupling techniques. The first modifies SPWM, such as the nonlinear modulation methods in [4,7,8], which adjust the modulation wave or carrier amplitude to reduce harmonics and DC-side inductance but require complex calculations and increase losses. The second, power decoupling, transfers ripple power to an external circuit, effectively suppressing harmonics and improving current-source characteristics.

There are two types of power decoupling techniques: passive power decoupling and active power decoupling. Passive power decoupling is achieved by adding an LC filter to the DC side; however, due to the low frequency of the second harmonic ripple power, this method inevitably brings about the disadvantages of larger volume and weight [9,10]. Active power decoupling, on the other hand, is characterized by the use of a decoupling circuit to absorb the second harmonic ripple power within the circuit [11,12,13]. The introduction of a decoupling circuit can replace the traditional electrolytic capacitors or large inductors, effectively enhancing the circuit’s lifespan and power density [14,15,16].

There are currently five basic power decoupling topologies for active power decoupling technology, namely full-bridge, Buck, Boost, Buck-Boost, and symmetric half-bridge with split capacitors [7,8]. Due to the limitations of Buck, Boost, and Buck-Boost basic decoupling topologies, they cannot be applied to single-phase current-source rectifiers after undergoing dual transformations. In contrast, the full-bridge circuit is a popular research topic as a power decoupling circuit for single-phase current-source rectifiers. References [17,18] have serially connected the full-bridge decoupling topology to the DC side of single-phase current-source rectifiers, absorbing the second harmonic ripple power in the circuit by controlling the charging and discharging of the decoupling capacitors. The decoupling circuit is controlled independently relative to the main circuit, allowing for a relative reduction in DC side inductance. References [19,20] use the full-bridge circuit as an auxiliary decoupling circuit in parallel with the main circuit to absorb the pulsating power in the circuit. References [21,22] have fully reused the switches of the main circuit of the single-phase current-source rectifier with the full-bridge decoupling circuit. The simplified full-bridge decoupling circuit shares all the switches of the main circuit, storing the pulsating power in the decoupling circuit capacitor C_pd, achieving power decoupling without the need to add active components. However, the full-bridge circuit has more active components compared to the half-bridge circuit, leading to lower circuit reliability and higher costs.

This proposes a symmetric half-bridge decoupling topology for single-phase current-source PWM rectifiers, which not only reduces the inductance, volume, and weight of the DC side inductor but also has the same number of components as the simplified full-bridge independent decoupling topology. The modulation and control methods used in this paper are straightforward, utilizing a control strategy based on the indirect closed-loop of the DC side output current, introducing the DC side output current signal without the need for additional sensors and complex calculations. Finally, the feasibility of the proposed solution is verified through simulations and experiments.

2. Topology and Working Principle of Single-Phase Current-Type PWM Rectifier with Half-Bridge Power Decoupling Topology

2.1. Symmetric Half-Bridge Power Decoupling Topology and Its Advantages

The power decoupling topology proposed in this paper, as illustrated in Figure 1, is derived through a duality transformation from the symmetric half-bridge split capacitor power decoupling topology commonly adopted for single-phase voltage-source rectifiers. Notably, in the symmetric half-bridge split capacitor power decoupling topology, insulated-gate bipolar transistors (IGBTs) equipped with anti-parallel diodes are transformed into those with series-oriented diodes. Furthermore, the decoupling filter inductor is replaced by a decoupling filter capacitor, and the decoupling capacitor is transformed into a decoupling inductor. Originally applied in parallel, this setup is transformed into a series configuration within the circuit [19,20,21,23].

Figure 1. Circuit diagram of the symmetric half-bridge power decoupling topology.

The circuit diagram is shown in Figure 2a, and the simplified equivalent circuit diagram is shown in Figure 2b. To achieve the desired decoupling effect, the voltage waveforms at both ends of the decoupling circuit must be double the fundamental frequency sine waveforms, enabling the decoupling inductor to absorb the pulsating power at twice the fundamental frequency.

Figure 2. Decoupling circuit equivalent diagram. (a) power decoupling circuit; (b) simplified equivalent circuit.

As indicated in Table 1, compared to the previous full-bridge independent power decoupling topology, this new circuit topology reduces the number of switches and diodes by two each. Furthermore, compared to the simplified full-bridge independent decoupling topology, using reverse-blocking IGBTs to replace the diodes connected in series with switching devices reduces the number of diodes by two and increases the number of inductors by one. After magnetic integration, the number of inductor components is identical to that in the simplified full-bridge independent decoupling topology; however, the modulation and control strategies are simpler.

Table 1. Topology comparison.

Power Decoupling Topology	IGBT Number	Inductor Number	Capacitor Number
Full-bridge Topology	4	1	1
Simplified Full-bridge Topology	2	1	1
The Symmetric Half-bridge Decoupling Topology Proposed in This Paper	2	1	1

2.2. Operation-Mode Analysis of Symmetric Half-Bridge Power Decoupling Circuits

The power decoupling topology proposed in this paper operates in four modes, and the corresponding circuit states are depicted in Figure 3. Essentially, this topology acts as a “dual buck” circuit, and the detailed mode analysis is presented as follows:

Figure 3. Working modes of symmetrical half-bridge power decoupling topology. (a) Operating Mode I; (b) Operating Mode II; (c) Operating Mode III; (d) Operating Mode IV.

Operating Mode I: Figure 3a depicts the circuit state in this mode. Specifically, S₅ and D₅ are conducting, whereas S6 and D6 are non-conducting. The main circuit charges the decoupling circuit capacitor, C_pd. Both diodes S₅ and D₅ are conducting, and the voltage they carry is zero. The voltage carried by the non-switching transistors S₆ and D₆ is the voltage of the decoupling capacitor.

Operating Mode II: Figure 3b displays the circuit state corresponding to this mode. Here, S₆ and D₆ are conducting, whereas S₅ and D₅ are non-conducting. The energy stored in the decoupling circuit capacitor, C_pd, charges inductor L₁. Both diodes S₆ and D₆ are conducting, and the voltage they carry is zero. The voltage carried by the non-switching transistors S₅ and D₅ is the voltage of the decoupling capacitor.

Operating Mode III: Figure 3c depicts the circuit state corresponding to this mode. Here, S₆ and D₆ are conducting, whereas S₅ and D₅ are non-conducting. The main circuit reverse charges the decoupling circuit capacitor, C_pd.

Operating Mode IV: Figure 3d illustrates the circuit state corresponding to this mode. Here, S₅ and D₅ are conducting, whereas S₆ and D₆ are non-conducting. The energy stored in the decoupling circuit capacitor, C_pd, charges inductor L₂.

2.3. Analysis of Topological Advantages

Two decoupling inductors are integrated by magnetic integration technology. Since the two inductor currents have equal amplitudes and a phase difference of 180°, namely i_L1 = −i_L2, reverse coupling is adopted for integration. The structure of the coupled inductors is shown in Figure 4. ${i_{L1}}^{\prime }$ flows into the dotted terminal while the ${i_{L2}}^{\prime }$ flows out of the another dotted terminal. The equivalent inductance after coupling equals the sum of self-inductance and mutual inductance. Under the premise of meeting circuit requirements, the physical inductance can be reduced effectively.

Figure 4. Structure diagram of decoupling circuit with magnetic integration.

The terminal voltages of the coupled inductors are expressed as follows:

$$\left\{\begin{array}{c}{u_{L1}}^{\prime }={L_1}^{\prime }{\displaystyle \frac{\mathrm{d}{i_{L1}}^{\prime }}{\mathrm{d}t}}-M{\displaystyle \frac{\mathrm{d}{i_{L2}}^{\prime }}{\mathrm{d}t}}=\left({L_1}^{\prime }+M\right){\displaystyle \frac{\mathrm{d}{i_{L1}}^{\prime }}{\mathrm{d}t}}\\ {u_{L2}}^{\prime }={L_2}^{\prime }{\displaystyle \frac{\mathrm{d}{i_{L2}}^{\prime }}{\mathrm{d}t}}-M{\displaystyle \frac{\mathrm{d}{i_{L1}}^{\prime }}{\mathrm{d}t}}=\left({L_2}^{\prime }+M\right){\displaystyle \frac{\mathrm{d}{i_{L2}}^{\prime }}{\mathrm{d}t}}\end{array}\right.$$

(1)

${L_1}^{\prime }$ and ${L_2}^{\prime }$ are self-inductances, and M denotes the mutual inductance.

$$M=k\sqrt{{L_1}^{\prime }{L_2}^{\prime }}=k{L_1}^{\prime }$$

(2)

k is the coupling coefficient.

The inductance after magnetic integration can be derived as follows:

$$\left\{\begin{array}{l}{L_1}^{\prime }={\displaystyle \frac{1}{1+k}}{L}_{\mathrm{f}}\\ {L_2}^{\prime }={\displaystyle \frac{1}{1+k}}{L}_{\mathrm{f}}\end{array}\right.$$

(3)

When k = 0.96, the ${L_1}^{\prime }$ = ${L_2}^{\prime }$ = 0.51L_f, it can be seen that magnetic integration greatly reduces the inductor volume and eliminates one magnetic core. Meanwhile, it improves the energy conversion efficiency and power density.

The proposed topology adopts reverse-blocking IGBTs (RB-IGBTs) to endow the switching units with reverse voltage withstand capability. Electrically, this device can be equivalent to a conventional IGBT connected in series with a diode. The series diode introduces a constant forward voltage drop, which results in inherent conduction loss. For commercial integrated RB-IGBTs, an integrated chip design is adopted internally. Compared with the discrete combination of IGBT and diode, such devices can slightly reduce additional losses caused by wiring and parasitic parameters. Nevertheless, the fundamental conduction loss originating from the diode structure remains considerable, which is an inherent characteristic of this type of device.

A comparative analysis between the proposed topology and the conventional full-bridge discrete device topology is conducted from three aspects: hardware architecture, thermal performance and device loss.

2.3.1. Analysis of Topological Advantages

The conventional full-bridge solution requires an independent reverse-blocking diode connected in series with each conventional IGBT. It features a large number of discrete devices, complicated wiring, large installation space and scattered component arrangement. By contrast, whether adopting discrete IGBT-diode combinations or integrated RB-IGBTs, the proposed solution simplifies the layout of power loops, reduces external discrete components and achieves higher hardware integration.

2.3.2. Analysis of Topological Advantages

In the conventional full-bridge topology, IGBTs and diodes are in separate packages with distributed heat sources, allowing for flexible thermal design. In the proposed scheme, heat sources of IGBTs and diodes (in integrated or series connection) are concentrated. Superimposed power losses occur within the same device area, leading to higher local temperature rise and greater challenges in thermal management. Meanwhile, the conduction loss introduced by the series structure further exacerbates heat generation, which constitutes the main drawback of this solution.

2.3.3. Analysis of Topological Advantages

Overall, the proposed topology sacrifices thermal performance margin to achieve reduced hardware size, simplified wiring and improved system power density. Hence, it is more suitable for application scenarios requiring equipment miniaturization. The conventional full-bridge discrete topology has lower heat dissipation difficulty and is preferable for high-power operating conditions without strict size constraints.

3. Analysis of the Decoupling Performance of the Symmetric Half-Bridge Power Decoupling Topology

The inductance value required by the decoupling topology depends on the input power and amplitude of the inductor ripple current. Figure 5 presents a diagram depicting the absorption and release of pulsation energy by the DC-side output current and decoupling inductor current. In terms of the absorption and release of pulsation power energy, an industrial line frequency cycle can be segmented into four sections:

Figure 5. Absorption and release of pulsating energy by the DC-side output current and decoupling inductor current. Region ① corresponds to Mode 1; Region ② corresponds to Mode 2; Region ③ corresponds to Mode 3; Region ④ corresponds to Mode 4.

When the circuit operates in region ①, inductor L₁ charges, whereas inductor L₂ discharges. Because the energy absorbed by L₁ exceeds that released by L₂, the entire decoupling circuit absorbs pulsating power from the DC end. In region ②, inductor L₁ discharges, whereas inductor L₂ charges. Because the energy released by L₁ exceeds that absorbed by L₂, the entire decoupling circuit releases pulsating power to the DC side, thus mitigating the current ripple effect and reducing the inductance value. The events in regions ③ and ④ follow the same logic. Notably, the proposed principle of inductance reduction involves increasing the current ripple amplitude within the inductor. According to the energy formula of inductance, this allows for a reduction in the inductance value, provided that the same amount of second harmonic ripple power is absorbed.

Notably, changes in the operating frequency of the decoupling circuit do not influence the reduction in the inductance value.

Next, we solve for the equivalent inductance of the decoupling circuit topology. For this, let the expression for the DC-side output current be as follows:

$$i_o=I_{dc}+\delta I_{dc}\sin (2wt)$$

(4)

where δ represents the ripple coefficient of the DC-side output current.

Subsequently, the voltage across the large inductor can be expressed as follows:

$${\mathrm{u}}_L=L{\displaystyle \frac{\mathrm{d}{i}_0}{\mathrm{d}t}}=2\delta wL{I}_{dc}\cos (2wt)$$

(5)

We can derive the equivalent inductance value for the decoupling circuit topology, as follows:

$$L_{\mathrm{eq}}={\displaystyle \frac{L_{\mathrm{f}}{I_{\mathrm{L}}}^2}{2\delta {I_{\mathrm{dc}}}^2}}$$

(6)

We can obtain a three-dimensional graph plotting the ratio of the equivalent inductance of the decoupling circuit to the actual decoupling inductance against the decoupling the ratio of the amplitude of the topological inductance current to the output current, k, and the ripple of the output current δ.

As depicted in Figure 6, the ratio of the equivalent inductance to the actual decoupling inductance of the decoupling circuit increases as the pulsation duty cycle, k, of the decoupling circuit increases and decreases as the output current ripple, δ, decreases. At a k value of 0.5 and a δ value of 1%, the ratio of the equivalent inductance to the actual decoupling inductance becomes 12.5 times.

Figure 6. Graph plotting the ratio of the equivalent inductance to the actual decoupling inductance of the decoupling circuit against the pulsation duty cycle of the decoupling circuit, $k$, and the ripple of the output current, δ.

4. Parameter Design of the Symmetric Half-Bridge Power Decoupling Topology

Based on the abovementioned modulation method, the current waveforms i_L1 and i_L2 of the two decoupling inductors within the decoupling circuit can be controlled as follows:

$$\left\{\begin{array}{c}{i}_{\mathrm{L}1}={\displaystyle \frac{I_{\mathrm{dc}}}{2}}+I_{\mathrm{L}}\sin (\omega t+\theta )\\ i_{\mathrm{L}2}={\displaystyle \frac{I_{\mathrm{dc}}}{2}}-I_{\mathrm{L}}\sin (\omega t+\theta )\end{array}\right.$$

(7)

where I_dc represents the average output current on the DC side, and I_L denotes the amplitude of the current ripple within the inductor of the decoupling circuit.

By taking the derivative, the voltage waveforms of the two decoupling inductors can be obtained as follows:

$$\left\{\begin{array}{c}{u}_{\mathrm{L}1}=\omega L_{\mathrm{f}}{I}_{\mathrm{L}}\cos (\omega t+\theta )\\ u_{\mathrm{L}2}=-\omega L_{\mathrm{f}}{I}_{\mathrm{L}}\cos (\omega t+\theta )\end{array}\right.$$

(8)

where L_f represents the values of the two decoupling inductors within the decoupling circuit.

As depicted in Figure 2, when switch d_S5 is activated, the voltage across points AB is the voltage across inductor L₁. Conversely, when switch S₆ is activated, the voltage across points AB is the voltage across inductor L₂. The expressions for the duty cycles of the two switches are as follows:

$$\left\{\begin{array}{c}{d}_{\mathrm{S}5}=0.5+k\sin (\omega t+\theta )=0.5+{\displaystyle \frac{I_{\mathrm{L}}}{I_{\mathrm{dc}}}}\sin (\omega t+\theta )\\ d_{\mathrm{S}6}=1-d_{\mathrm{S}1}\end{array}\right.$$

(9)

In the above equation, d_S5 denotes the duty cycle of switch S₅, while S₆ represents the duty cycle of switch S₆. Thus, the expression for the voltage, U_AB, across the decoupling topology can be written as follows:

$$\begin{array}{l}{u}_{\mathrm{AB}}=d_{\mathrm{S}5}{u}_{\mathrm{L}1}+d_{\mathrm{S}6}{u}_{\mathrm{L}2}=\left(2d_{\mathrm{S}5}-1\right)\omega L_{\mathrm{f}}{I}_{\mathrm{L}}\cos (\omega t+\theta )\\ ={\displaystyle \frac{2\omega L_{\mathrm{f}}{I_{\mathrm{L}}}^2}{I_{\mathrm{dc}}}}\sin (\omega t+\theta )\cos (\omega t+\theta )={\displaystyle \frac{\omega L_{\mathrm{f}}{I_{\mathrm{L}}}^2}{I_{\mathrm{dc}}}}\sin (2\omega t+2\theta )\end{array}$$

(10)

Ignoring the power of the AC-side inductance and capacitance, as well as switching losses, and assuming that I_dc is a constant DC current, the rectifier-side voltage resembles a ripple waveform

$$u_{\mathrm{rec}}={\displaystyle \frac{p_{\mathrm{ac}}}{I_{\mathrm{dc}}}}={\displaystyle \frac{U_{\mathrm{ac}}{I}_{\mathrm{ac}}}{2I_{\mathrm{dc}}}}-{\displaystyle \frac{U_{\mathrm{a}c}{I}_{\mathrm{ac}}}{2I_{\mathrm{dc}}}}\cos (2\omega t)$$

(11)

Equating the AC component of the voltage, U_AB, across the decoupling topology with the AC component of the rectifier-side voltage, U_rec, yields the following:

$${\displaystyle \frac{\omega L_{\mathrm{f}}{I_{\mathrm{L}}}^2}{I_{\mathrm{dc}}}}\sin (2\omega t+2\theta )=-{\displaystyle \frac{U_{\mathrm{ac}}{I}_{\mathrm{ac}}}{2I_{\mathrm{dc}}}}\cos (2\omega t)$$

(12)

Accordingly, the amplitude and phase angle of the inductor current in the decoupling topology can be expressed as follows

$$\begin{array}{l}\theta =-{45}^{\circ }\\ I_{\mathrm{L}}=\sqrt{{\displaystyle \frac{U_{\mathrm{ac}}{I}_{\mathrm{ac}}}{2\omega L_{\mathrm{f}}}}}\end{array}$$

(13)

The selection of the decoupling circuit inductance value can be derived from Equation (10), yielding an inductance expression that can completely absorb the double-frequency ripple power.

$$L_{\mathrm{f}}={\displaystyle \frac{U_{\mathrm{ac}}{I}_{\mathrm{ac}}}{2\omega {I_{\mathrm{L}}}^2}}$$

(14)

For the parameter design of the filtering capacitor, C_pd, in the decoupling circuit, factors such as effectiveness and cost are comprehensively considered, according to the IEEE-159 1992, which outlines specific numerical requirements for the first 20 harmonics. To minimize the impact of the resonance sub-ripple between C_pd and the decoupling inductor on the circuit, the resonant frequency of C_pd and the decoupling inductor must be greater than 21 times the grid frequency [24]. Thus, assuming that the grid frequency is f_w, the maximum value of capacitor C_pd can be expressed as follows:

$$C_{\mathrm{pd}}={\displaystyle \frac{1}{{\left(42\pi f_{\mathrm{w}}\right)}^2{L}_{\mathrm{f}}}}$$

(15)

5. Magnetic Integration Analysis of the Symmetric Half-Bridge Power Decoupling Topology

To further reduce the number of components within the decoupling circuit, along with its volume and weight, the two decoupling inductors within the symmetric half-bridge power decoupling circuit are magnetically integrated, leveraging the opposite inductor current ripple values of the two inductors. Specifically, the current of L₁ enters through the dotted terminal and the current of L₂ exits from the same terminal, the circuit connection is as depicted in Figure 7. In the inductance coupling method, DC magnetic fluxes cancel each other, while AC magnetic fluxes reinforce each other in the reverse coupling mode [25].

Figure 7. Coupled inductor circuit diagram.

The relationship between currents i₁ and i₂ flowing into the coupled integrated inductor can be expressed as follows:

$$\left\{\begin{array}{c}{i}_1={\displaystyle \frac{I_{\mathrm{dc}}}{2}}+I_{\mathrm{L}}\sin (\omega t+\theta )\\ i_2=-{\displaystyle \frac{I_{\mathrm{dc}}}{2}}+I_{\mathrm{L}}\sin (\omega t+\theta )\end{array}\right.$$

(16)

The voltages of the coupled inductors can be expressed as follows:

$$\left\{\begin{array}{c}{u}_1=L_1{\displaystyle \frac{\mathrm{d}{i}_1}{\mathrm{d}t}}+M{\displaystyle \frac{\mathrm{d}{i}_2}{\mathrm{d}t}}=\left(L_1+M\right){\displaystyle \frac{\mathrm{d}{i}_1}{\mathrm{d}t}}\\ u_2=L_2{\displaystyle \frac{\mathrm{d}{i}_2}{\mathrm{d}t}}+M{\displaystyle \frac{\mathrm{d}{i}_1}{\mathrm{d}t}}=\left(L_2+M\right){\displaystyle \frac{\mathrm{d}{i}_2}{\mathrm{d}t}}\end{array}\right.$$

(17)

Leveraging the opposite inductor current ripple values of the two inductors, the two decoupling inductors are magnetically integrated. Subsequently, through the mutual inductance of the coupled integrated inductors, each decoupling equivalent inductance becomes equal to the sum of its own self-inductance and mutual inductance. This strategy not only reduces the number of circuit components but also decreases the inductance of each decoupling inductor. Consequently, the approach significantly reduces the inductance value on the DC side, thus reducing the volume and weight of the circuit.

6. Design Strategy for Closed-Loop Control

6.1. Mathematical Model and Control Methods for the Main Circuit

The main circuit adopts a dual-loop control system for output current and input current. The outer loop control uses a PI regulator, with the control variable being the DC-side output current of the single-phase current-type PWM rectifier main circuit [26,27]. The inner loop control uses a PR regulator, with the control variable being the grid-side input current of the single-phase current-type PWM rectifier main circuit. The control structure is shown in Figure 8.

Figure 8. Block diagram of dual closed-loop control for single-phase current-source PWM rectifier main circuit. i*_dc denotes the given reference current.

In the rectifier, the bridge arm current i_p can be regarded as an amplification of the regulator’s input modulation signal. By setting the regulator’s input modulation signal as v_m, this portion can be equivalently viewed as a proportional loop, with its magnitude being K_PWM, as expressed by Equation (15):

$${\displaystyle \frac{I_p(s)}{v_m(s)}}=K_{PWM}$$

(18)

In engineering practice, when designing the inner loop for the grid-side input current, the PR regulator can be approximated as a PI regulator for processing [28,29]. Since the inner-loop gain of the system is 1 at the crossing frequency, Equation (16) is obtained:

$$\left\{\begin{array}{l}{\displaystyle \frac{K_{\mathrm{I}}}{10K_{\mathrm{P}}}}={\omega }_c\\ {\left|{\displaystyle \frac{K_{\mathrm{P}}s+K_{\mathrm{I}}}{s}}\cdot K_{\mathrm{PWM}}\cdot {\displaystyle \frac{1}{LC{s}^2+RCs+1}}\right|}_{s=j{\omega }_{\mathrm{c}}}=1\end{array}\right.$$

(19)

K_P is the proportional coefficient, and K_I is the integral coefficient.

When designing the outer current loop of the single-phase current-source PWM rectifier, as the controlled variable is the DC-side input current, PI control is used. The ratio m is the ratio of the amplitude i_p of the bridge arm current to the average value i_dc of the direct current.

$$\left\{\begin{array}{l}{f}_{\mathrm{wz}}={\displaystyle \frac{k_{\mathrm{wi}}}{2\pi \cdot k_{\mathrm{wp}}}}=100\\ {\left|K_{\mathrm{W}}\cdot {\displaystyle \frac{k_{\mathrm{wp}}s+k_{\mathrm{wi}}}{s}}\cdot {\displaystyle \frac{m}{\left(Ls+R\right)}}\cdot G_1\left(s\right)\right|}_{s=j2\pi \times 10}=1\end{array}\right.$$

(20)

By substituting the main circuit parameters into Equation (17), the outer-loop parameters for the DC-side output current can be obtained.

6.2. Mathematical Model and Control Methods for Half-Bridge Power Decoupling Topology

The average equivalent circuit of the decoupling circuit within a switching cycle is shown in Figure 9.

Figure 9. Average equivalent circuit of symmetric half-bridge power decoupling topology.

Considering the damping effect in the actual circuit, the transfer function between the switching control signal and the decoupling inductor current is obtained as [30,31]:

$$G_{\mathrm{hb}}={\displaystyle \frac{i_{\mathrm{L}2}(s)}{d(s)}}={\displaystyle \frac{I_{\mathrm{dc}}}{2L_{\mathrm{pd}}{C}_{\mathrm{pd}}{s}^2+K_{\mathrm{d}}{L}_{\mathrm{pd}}s+1}}$$

(21)

$${\omega }_{\mathrm{res}}={\displaystyle \frac{1}{\sqrt{2L_{\mathrm{pd}}{C}_{\mathrm{pd}}}}}$$

(22)

K_d is the damping coefficient and ω_res is the circuit resonance frequency.

Traditional direct closed-loop control strategies for decoupling circuits typically require additional sensors to measure the voltage or current of decoupling circuit components. When the load resistance changes, the input current also varies due to power fluctuations. This necessitates prior knowledge of the load, followed by comparing and tracking the detected and actual currents. Such an approach involves extensive calculations, leading to high costs and complex control implementation.

As an alternative, this paper proposes an indirect closed-loop control strategy based on the DC-side output current. This method directly utilizes the DC-side output current signal, relying on the sampled value of the main circuit output current, thereby eliminating the need for additional sensors or complex calculations. Figure 10 illustrates the indirect closed-loop control method based on the DC-side output current. I_ref is output current reference value, I_o is output current sampling value. V_D is a DC bias voltage that keeps the modulating wave positive at all times, thereby obtaining an effective and appropriate duty cycle.

Figure 10. Control strategy based on indirect closed-loop control of the DC-side output current.

By dynamically adjusting the output current through a PI controller, the system can adaptively regulate the pulsating power according to load power variations, ultimately achieving optimized power decoupling performance.

When the load power decreases, the second-harmonic ripple power that needs to be absorbed by the decoupling topology is also reduced. To achieve effective power decoupling under this condition, the ripple amplitude should correspondingly decrease, thereby reducing the fluctuation amplitude of the inductor current and, consequently, the ripple power absorbed by the decoupling topology. In the indirect closed-loop control of the output current, when the load power decreases, the output current suddenly increases, leading to a reduced output from the PI regulator, which in turn decreases the ripple amplitude. This enables the decoupling topology to adjust the absorbed ripple power according to load variations, thus lowering the sensitivity of the decoupling circuit topology to load changes.

7. Experimental Verification

To verify the performance of the symmetric half-bridge power decoupling circuit in suppressing the double-frequency ripple of the DC-side current, a comparative experiment was conducted between a traditional single-phase current-source rectifier and the single-phase current-source rectifier based on the proposed symmetric half-bridge power decoupling topology. The device parameters in the prototype are shown in Table 2.

Table 2. Experiment parameters.

Parameters	Value
Input Voltage (RMS)	110 V AC
Output Current	15 A DC
Load Resistance	1 Ω
Power	225 W
Self-Inductance	5.5 mH
Mutual Inductance	4.7 mH
Coupling Coefficient	0.85
Decoupling Topology Capacitor	47 μF
Grid-side Filter Inductor	2 mH
Grid-side Filter Capacitor	20 μF
Switching Frequency	20 kHz
Traditional Inductor	75 mH
S1~S6	SGT20N60FD1PN
D1~D6	SDURK2060
Sampling Period	50 us

7.1. Comparison Between Traditional Single-Phase Current-Type Rectifier Experiments and Decoupling Circuit Experiments

Figure 11 shows the experimental waveform of a traditional single-phase current PWM rectifier at 200 W. The traditional large inductor used in the experiment has an inductance of 75 mH. It can be seen that the AC side voltage and current sinusoidal are good, and Figure 12 shows the THD is 3.93%. The output current is stable at 10 A, the amplified waveform is shown in Figure 11b and the current ripple value is 0.5 A. Figure 11c,d show that the circuit can effectively resist the interference of the load and maintain good harmonic quality in the output voltage when the resistive load of the circuit is switched from full load to half load or from half load to full load.

Figure 11. Experimental waveform of a traditional single-phase current-source PWM rectifier. (a) Grid-side voltage and current, and DC-side current waveform. (b) DC side output current waveform. (c) Hall-load to full-load waveform. (d) Full-load to half-load waveform.

Figure 12. THD of the full-load input current of the traditional single-phase current-source PWM rectifier.

The decoupling circuit experimental waveforms are shown in Figure 13. The ripple amplitude of the DC output current is 0.85 A. Even with inductance errors, the AC voltage and current show good sinusoidal characteristics. Figure 14 shows the THD is 3.83%, meeting the IEEE Std 519-1992 [32] requirements.

Figure 13. Experimental waveform of the symmetric half-bridge power decoupling circuit under feedforward control. (a) The waveforms of AC-side voltage and current and DC-side current. (b) Decoupling circuit inductor current and DC side current waveform.

Figure 14. THD of the full-load input current of the experimental symmetric half-bridge power decoupling circuit.

7.2. Disturbance Rejection Analysis

Figure 15 displays the experimental waveforms captured during the half-load to full-load transition of the rectifier under the indirect closed-loop control of the output current of the decoupling circuit. The decoupling inductor used in the experiment has an inductance of 10 mH. The circuit recovers rapidly and stabilizes without exhibiting an increase in the current ripple. As the load power increases, the double-frequency ripple power within the circuit also increases. Remarkably, the indirect closed-loop control of the output current increases the current ripple of the inductor, which, in turn, increases the double-frequency power absorbed by the decoupling circuit from the primary circuit.

Figure 15. Symmetric half-bridge power decoupling topology output current indirect closed-loop control strategy experimental waveform. (a) Grid-side voltage and current, and DC-side current waveform (half to full). (b) Decoupling circuit inductor current waveform (half to full). (c) Grid-side voltage and current, and DC-side current waveform (full to half). (d) Decoupling circuit inductor current waveform (full to half).

Figure 15 depicts the experimental waveforms captured during the full-load to half-load transition of the rectifier. The circuit again recovers quickly and stabilizes. Furthermore, under the indirect closed-loop control mode, the double-frequency power absorbed by the decoupling circuit does not exceed the double-frequency power of the circuit at half load, which would otherwise increase the current ripple. As shown in Figure 15 the circuit can return to steady state within approximately 0.2 s after load switching.

7.3. Effect Analysis

In a current-source circuit, the energy storage component is the inductor. When the average current is the same and the ripple coefficient remains constant, using a large inductor for filtering results in significant inductor losses, which are a major factor affecting circuit efficiency. By introducing a power decoupling topology into the current-source circuit, the required inductance is reduced, significantly lowering inductor losses. In this study, the introduction of the decoupling topology has demonstrated a clear ability to reduce inductance values, which has been verified through experiments.

The efficiency comparison between a traditional single-phase current-source PWM rectifier using a 75 mH inductor and a single-phase current-source PWM rectifier based on a symmetrical half-bridge power decoupling topology using two 10 mH inductors is shown in Figure 16. The method proposed in this paper can improve efficiency by 15% compared to traditional large inductance circuits.

Figure 16. Efficiency comparison.

The method proposed in this paper can improve efficiency by 15% compared to traditional large inductance circuits.

Figure 17 shows the experimental prototype diagrams. Figure 18 compares the volumes of the large-sized inductors used in traditional single-phase PWM rectifiers, dual inductors employed in the decoupling circuit, and integrated inductors also utilized in the decoupling circuit. Due to limitations in the experimental equipment used, we used three 25 mH inductors in series to form a large 75 mH inductor. A separately designed 75 mH inductor should be smaller in size than the large inductor used in the experiment. However, under the same conditions, the volume of a 10 mH inductor is definitely smaller than that of a 75 mH inductor.

Figure 17. Experimental platform of a single-phase current-source PWM rectifier based on the symmetric half-bridge power decoupling topology.

Figure 18. Inductor physical comparison chart.

Meanwhile, Table 3 summarizes the corresponding volume data for these components. Calculations indicate that utilizing dual inductors in the decoupling circuit can achieve a volume reduction of 56%, which can be further enhanced to 79.7% with the use of integrated inductors. Thus, the single-phase current-source PWM rectifier based on the symmetric half-bridge power decoupling circuit topology significantly reduces both inductance values and system volumes.

Table 3. Volume comparison of various components.

Type	Volume	Reduction Ratio
Traditional Large Inductor	13.1 cm × 13.8 cm × 25 cm × 2 + 14.2 cm × 9.5 cm × 24.7 cm = 12371.5 cm3
Decoupling Circuit Integrated Inductor	19 cm × 13.8 cm × 6.5 cm + 13.1 cm × 16 cm × 3.85 cm = 2511.3 cm3	79.7%

The experimental waveform obtained after magnetically integrating the decoupling circuit is depicted in Figure 11. The ripple amplitude of the DC-side output current is 0.85 A, and the AC-side voltage and current demonstrate good sine quality, with an AC-side input current PF of 0.998 and a THD of 3.83%, in accordance with the harmonic standards for rectifiers.

In terms of efficiency improvement, magnetic integration enhances the utilization rate of magnetic cores. Reverse coupling is adopted to reduce the DC bias of magnetic flux inside the core. Meanwhile, the reduced inductance effectively cuts down core losses. Compared with the traditional 75 mH large inductor solution which features long windings and high equivalent resistance, the proposed integrated inductor greatly shortens the winding length and reduces the loop resistance, thereby substantially lowering copper losses. Consequently, the overall efficiency of the prototype is improved quantitatively, which fully demonstrates the electrical performance advantages of the magnetic integration technology. The detailed quantitative analysis is illustrated in the corresponding Figure 19.

Figure 19. Loss analysis diagram. (a) Decoupling; (b) Traditional.

It can be seen that the switching loss of the proposed topology increases by approximately 37%. Nevertheless, the loss of the decoupling inductor is reduced by 26% compared with the conventional large inductor. Since inductor loss accounts for a large proportion in current-source rectifier circuits, the overall loss of the proposed topology is decreased by about 50% relative to the conventional circuit.

8. Conclusions

This study proposes a strategy for suppressing the double-frequency ripple power generated within a single-phase current-source PWM rectifier. The strategy also aims to reduce the DC-side inductance of the rectifier and decrease its volume and cost. To this end, leveraging existing power decoupling technology research, a symmetric half-bridge power decoupling topology suitable for single-phase current-source PWM rectifiers is proposed. Subsequently, a single-phase current-source PWM rectifier based on this topology is designed and investigated. Through open-loop and closed-loop simulations, as well as experimental research, the following conclusions are drawn:

The proposed symmetric half-bridge power decoupling topology effectively suppresses double-frequency ripple fluctuations observed in the DC-side currents of single-phase current-source rectifiers. It also reduces the DC-side inductance and lowers the cost, weight, and volume of the overall system.

Compared to the simplified full-bridge independent decoupling circuit topology, the design proposed in this paper requires fewer components, reducing the number of diodes by two and increasing the number of inductors by one when employing reverse-blocking ITs. Following magnetic integration, the number of inductor components remains identical to that in the simplified full-bridge independent decoupling topology; however, the modulation and control strategies are simpler.

The proposed indirect closed-loop control method for the output current is structurally straightforward and easy to implement. Furthermore, it does not require additional sensors, is low-cost, does not entail complex calculations, and demands less computational effort from digital processors, thus enhancing the stability of the circuit.

In addition, it is worth noting that the variation in the coefficient k will change the equivalent inductance of the system, which further modifies the system transfer function and imposes a certain impact on the tuning of PI and PR controller parameters. To ensure the stable operation of the proposed system, the closed-loop controller is designed with a relatively large equivalent inductance in this work, resulting in conservative controller parameters. Since this paper mainly focuses on the topological improvement and innovation of the rectifier, the control strategy is not the core research emphasis. For further optimization, advanced adaptive control strategies, such as adaptive PI and adaptive PR control, will be adopted in future research to address the parameter sensitivity issue caused by the variation in equivalent inductance, so as to improve the dynamic and steady-state performance of the system under diverse operating conditions.