# A Unified Inner Current Control Strategy Based on the 2-DOF Theory for a Multifunctional Cascade Converter in an Integrated Microgrid System

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## Abstract

**:**

## 1. Introduction

- Differences and internal relations between the control structures of the microgrid converter in UC/CCS mode and SA/CVS mode are demonstrated for further research, especially for the cascaded multilevel topology.
- Unified inner loop based on the 2-DOF strategy of the multifunctional microgrid converter for the transfer modes is established to obtain a satisfactory power quality for both the steady and the transient processes.
- Detailed parameter tuning is deduced, as well as the influences on the tracking and stability performances from the variations in the main circuit and controlling parameters, which proves the practical feasibility of the proposed control strategy.

## 2. System Configuration

- The three-phase system and local load are symmetrical;
- The fault detection and HVSTS operation time is short and can be ignored;
- The capacity of energy storage is sufficient to meet the load’s demand.

#### 2.1. Control Strategy for the UC Mode

_{i}is the output voltage of the phase leg. HVSTSs are closed and the point of the common coupling (PCC) voltage u

_{c}is dictated by the grid voltage u

_{s}with the equivalent resistance R

_{s}and reactance L

_{s}dominantly. Local loads Z

_{1}are powered from the utility and the converter takes charge of delivering/absorbing energy to/from the host network as a controlled current source (CCS) by injecting an active/reactive current i

_{g}

_{1}. The expression of i

_{g}

_{1}is shown in Equation (1).

_{L}(s), Z

_{c}(s), and Z

_{s}(s) are the equivalent impedance of the filtering inductor branch in the net frame of Figure 2.

_{i}regulates the current obtained from the controllers of G

_{p}and G

_{q}. For the harmonic suppression, the harmonic component i

_{ref_h}can be calculated, separated, and added to the referring instruction of the current loop. It is worth noticing that stability of the DC voltages is the basis for the normal operation of the CHBMC. Thus, the modifying component i

_{dc_m}obtained in Figure 4 is superposed further to form a multi-closed-loop structure, where θ is observed by a Synchronous Sinusoid Generator (SSG).

#### 2.2. Control Strategy for the SA Mode

_{1}are offered by the CHBMC as a controlled voltage source (CVS) to ensure the immunity of the critical loads to power interruptions and grid faults. The injection current i

_{g2}is expressed as Equation (2), which is also the load current i

_{z}.

_{Z}(i

_{g}) is usually sensed and added to the reference with coefficient K

_{z}of the current control loop to improve the quality of the PCC voltage [36].

#### 2.3. Instability of the Transition Modes

#### 2.3.1. From SA Mode to UC Mode

#### 2.3.2. From the UC Mode to SA Mode

## 3. Unified Inner Loop Based on the 2-DOF Theory

#### 3.1. The 2-DOF Theory

_{1}(s) is the feedforward compensator of input signal R(s), while C(s) is the function of the feedback regulator and P(s) is the controlled plant. If there is no error in the plant model, the immunity of the output Y(s) to disturbance D(s) simply relies on the parameters of C(s). The tracking performance can be further enhanced through the feedforward compensator after the parameters of C(s) are optimized according to the performance of anti-disturbance. In this way, Y(s) is regulated by the 2-DOF algorithm. The expression of H

_{1}(s) can be produced on the principle that the error E(s) in Equation (4) is a constant of zero (tracking the command perfectly) if the model of the plant P(s) is invertible, as in Equation (5).

_{2}(s) for disturbance rejection is also employed, as shown in Figure 9.

_{2}(s) ≡ [C(s)]

^{−1}, then the influence of D(s) on Y(s) can be ignored. The performance goals are for all the frequencies and can completely suppress the effects of disturbance on the output and make the output perfectly track the command.

#### 3.2. Construction of the Proposed Strategy

_{PWM}, while the injecting current I

_{g}can be reasonably assumed to approximate the inductor current I

_{L}because the capacitor current of the LC filter is much smaller, in comparison to the injecting current I

_{g}. The transfer function of the output current I

_{L}, with referring instruction I

_{R}and disturbance U

_{C}, can be expressed as:

_{i}generally takes the proportional-integral (PI) controller. The error function E(s) between I

_{R}and I

_{L}is:

_{R}and U

_{C}if I

_{L}(s) ≡ I

_{R}(s). Henceforth, the expressions of H

_{1}(s) and H

_{2}(s) can be formulated as Equation (10).

_{P}and K

_{I}are the proportional and integral gains of the PI controller.

_{1}(s) is exclusively relevant to the plant model, while the structure of H

_{2}(s) depends on the parameters of G

_{i}. To solve the improperness of the inverse model transfer function, a first order low-pass filter is contrived to yield a modification for H

_{1}(s), so that the problem of interference amplification caused by the differential can be suppressed and the dynamic performance of the inner control section can be improved with λ. H

_{1}(s) is adjusted as Equation (11):

#### 3.3. Design of the Proposed Control System

_{C}in the LC filter contributes to reinforce the damping effect on the resonance, as well as the stability of the system. If the system is stable when ignoring the equivalent loss resistance, then it should be stable for any other scenarios. Therefore, in the subsequent discussion, R

_{C}is ignored. Table 1 shows the values of the key parameters of the plant model.

_{1}(s) and H

_{2}(s), while H

_{2}(s) is merely related to the PI controller. Thus, these two feedforward compensators can be separately and independently designed. Giving priority to the tracking performance and adequate amplitude/phase margin, the unified inner current loop studied in this paper is designed on the basis of a first-order system before subsequent research is conducted.

_{c}, the inner current loop in Figure 10 can be transformed into a simplified structure with unitary feedback, which is shown in Figure 11.

_{PWM}of the studied CHBMC as 1, then the parameters of the PI controller are designed as K

_{P}= 2 and K

_{I}= 5, referring to the principle of a typical first-order system. A corresponding bode diagram of the closed-loop transfer function displayed as Equation (12) is shown in Figure 12, where the system is stable in all bands of frequencies.

_{2}(s) of the disturbance signal can be exclusively expressed as:

_{1}(s) to eliminate the problem of error.

_{L}to i

_{R}with Equation (12) is modified as:

_{R}can be expressed as:

_{1}(s) is expressed as:

_{R}, and the error function in the frequency domain can be expressed as:

#### 3.4. The Influence of the Changing Plant Parameters

_{1}(s) is vulnerable to the change of plant parameters, which influences the tracking performance. The error function can be expressed with ΔL and ΔR

_{L}as:

_{L}are the parameter offsets of the filtering inductor and its equivalent loss resistance. Figure 15 shows the bode diagram of Equation (19) with different ΔL and ΔR

_{L}, when the variation of both offsets are considered as −50%, −25%, 0, +25%, and +50% of the initial values. It can be observed that the characteristic of the amplitude/phase frequency has no obvious change with the change of L and R

_{L}in the frequency range of the AC signals, while the speed of attenuation decreases minimally with the increase in L in the frequency range under 1 kHz. Ultimately, the stability and robustness of the proposed strategy against the model uncertainties of the converter are proved.

## 4. Simulation Results and Experimental Verification

#### 4.1. Simulation Results

#### 4.1.1. From the UC Mode to SA Mode

_{LA}. Similarly, it fails to solve the above-mentioned problems if the control structure transfers after the load current I

_{LA}exceeds zero. Although there is no short oscillation, the zero-current transition still distorts the output voltage waveform in varying degrees, which is presented in Figure 17.

_{LA}is continuous, with no interruptions or oscillations. The utility current I

_{SA}experiences no surge before decreasing to zero, and the load current I

_{LA}retains its normal state without distortions.

#### 4.1.2. From the SA Mode to UC Mode

_{LA}and load current I

_{LA}, there is an obvious fluctuation in the grid current I

_{SA}, which indicates that the output current of CHBMC also contains this component, and the fluctuation is positively correlated with the amplitude of the current instruction. On the contrary, the simulation results of the proposed strategy are presented in Figure 20. It can be observed that the grid current I

_{SA}barely has any fluctuations at the switching point, and the reactive power and harmonic component can immediately be compensated, which theoretically proves the feasibility of the control strategy proposed in the current paper.

#### 4.1.3. Saltation of the Input for the Inner Current Loop in the Steady Operation Mode

_{LA}appears to oscillate, whether in the UC/CCS or SA/CVS mode. Meanwhile, the voltage oscillation also creates an unstable state, for a short period of time, for the injecting current I

_{A}. In Figure 22, the oscillation or instability of the PCC voltage and the injecting current are noticeably alleviated in both the UC/CCS and SA/CVS modes. In addition, the transient processes in both modes are restricted to 50 μs and exert no influence on the power supply of the load.

#### 4.2. Experimental Verification

#### 4.2.1. Operation Mode Transition

_{1}, it converted to the SA/CVS mode, and back to the UC/CCS mode at the time of t

_{2}. Noticeably, the load reactive power was compensated to ensure that the power grid current was a unit power factor, while the super-capacitors on the DC side were charged to a set value when the system was in the UC/CCS mode.

_{3}and returns to the UC/CCS mode at the time of t

_{4}. Therefore, it can be observed that the continuity and quality of PCC voltage U

_{LA}are well guaranteed, while the grid current I

_{SA}experiences no surge or oscillation, and the load current I

_{LA}is basically not affected by the mode switching. The performances can be assessed by the fact that the mode transitions are seamless and the proposed strategy keeps the load protected from any disturbances.

#### 4.2.2. Saltation of the Inner Current Loop Input in a Steady Operation

_{5}in the UC/CCS mode.

_{6}in the SA/CVS mode. By observing the experimental waveforms, it is evident that PCC voltage U

_{LA}and the injecting current I

_{A}remain unaffected and the transient processes are milder and negligible when the instruction of the current inner loop varies in the two steady operation modes.

#### 4.3. Limitations

- (1)
- Mechanism for handling the faults of the load side during modes of transition and for restoring the voltage in the shortest time;
- (2)
- Redundancy configuration of H-bridges in a cascaded multilevel topology;
- (3)
- Measures to improve the inherent effects of sampling and control delay in digital control systems.

## 5. Conclusions

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Conflicts of Interest

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**Figure 15.**Bode diagram when the parameters of the plant model change. (

**a**) Different values of L. (

**b**) Different values of R

_{L}.

**Figure 16.**Direct transfer. (

**a**) Load of R. (

**b**) Load of R-L. (

**c**) Load of the three-phase diode rectifier.

**Figure 17.**Transfer after I

_{LA}decreases to zero. (

**a**) Load of R. (

**b**) Load of R-L. (

**c**) Load of the three-phase diode rectifier.

**Figure 18.**Transfer through the proposed unified control strategy. (

**a**) Load of R. (

**b**) Load of R-L. (

**c**) Load of the three-phase diode rectifier.

**Figure 19.**Direct transfer when the voltage is synchronized. (

**a**) Load of R. (

**b**) Load of R-L. (

**c**) Load of the three-phase diode rectifier.

**Figure 20.**Transfer through the proposed unified control strategy. (

**a**) Load of R. (

**b**) Load of R-L. (

**c**) Load of the three-phase diode rectifier.

**Figure 21.**Simulation results of saltation with the traditional dual close-loop PI controller. (

**a**) UC/CCS mode. (

**b**) SA/CVS mode.

**Figure 22.**Simulation results of saltation with the proposed strategy. (

**a**) UC/CCS mode. (

**b**) SA/CVS mode.

**Figure 24.**Experimental result of the output voltage of the H-bridges when the modes are being transferred.

Features | Implication | Values | Unit |
---|---|---|---|

L | Inductance of the LC filter | 0.8 | mH |

R_{L} | Resistance of L in the LC filter | 2 | mΩ |

C | Capacitance of the LC filter | 20 | μF |

Features | Implication | Values | Unit |
---|---|---|---|

U_{S} | Rated AC voltage of the utility | 220 | V |

f_{0} | Rated frequency of the utility | 50 | Hz |

N_{H} | Number of H-bridges in each phase | 3 | — |

U_{DC} | DC voltage of each H-bridge | 200 | V |

C_{sup} | Value of series DC super-capacitors | 6.5 | F |

f_{s} | Switching frequency | 5 | kHz |

t_{d} | Dead time of switching | 3 | μs |

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**MDPI and ACS Style**

Wan, J.; Hua, W.; Wang, B.
A Unified Inner Current Control Strategy Based on the 2-DOF Theory for a Multifunctional Cascade Converter in an Integrated Microgrid System. *Sustainability* **2022**, *14*, 5074.
https://doi.org/10.3390/su14095074

**AMA Style**

Wan J, Hua W, Wang B.
A Unified Inner Current Control Strategy Based on the 2-DOF Theory for a Multifunctional Cascade Converter in an Integrated Microgrid System. *Sustainability*. 2022; 14(9):5074.
https://doi.org/10.3390/su14095074

**Chicago/Turabian Style**

Wan, Jiexing, Wei Hua, and Baoan Wang.
2022. "A Unified Inner Current Control Strategy Based on the 2-DOF Theory for a Multifunctional Cascade Converter in an Integrated Microgrid System" *Sustainability* 14, no. 9: 5074.
https://doi.org/10.3390/su14095074