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Open AccessReview

Revisiting the High-Performance Reconfigurable Computing for Future Datacenters

1
ImViA Laboratory, University of Burgundy, 21000 Dijon, France
2
Department of Computer System Engineering, Islamia University of Bahawalpur, Bahawalpur 63100, Pakistan
3
Department of Computing and Mathematics, Manchester Metropolitan University, Manchester M15 6BH, UK
*
Author to whom correspondence should be addressed.
Future Internet 2020, 12(4), 64; https://doi.org/10.3390/fi12040064
Received: 2 February 2020 / Revised: 30 March 2020 / Accepted: 1 April 2020 / Published: 6 April 2020
(This article belongs to the Collection Featured Reviews of Future Internet Research)
Modern datacenters are reinforcing the computational power and energy efficiency by assimilating field programmable gate arrays (FPGAs). The sustainability of this large-scale integration depends on enabling multi-tenant FPGAs. This requisite amplifies the importance of communication architecture and virtualization method with the required features in order to meet the high-end objective. Consequently, in the last decade, academia and industry proposed several virtualization techniques and hardware architectures for addressing resource management, scheduling, adoptability, segregation, scalability, performance-overhead, availability, programmability, time-to-market, security, and mainly, multitenancy. This paper provides an extensive survey covering three important aspects—discussion on non-standard terms used in existing literature, network-on-chip evaluation choices as a mean to explore the communication architecture, and virtualization methods under latest classification. The purpose is to emphasize the importance of choosing appropriate communication architecture, virtualization technique and standard language to evolve the multi-tenant FPGAs in datacenters. None of the previous surveys encapsulated these aspects in one writing. Open problems are indicated for scientific community as well.
Keywords: FPGA virtualization; datacenters; network on chip; multi tenancy; multi FPGA; reconfigurable computing FPGA virtualization; datacenters; network on chip; multi tenancy; multi FPGA; reconfigurable computing
MDPI and ACS Style

Ijaz, Q.; Bourennane, E.-B.; Bashir, A.K.; Asghar, H. Revisiting the High-Performance Reconfigurable Computing for Future Datacenters. Future Internet 2020, 12, 64.

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