# Fast Tuning of the PID Controller in An HVAC System Using the Big Bang–Big Crunch Algorithm and FPGA Technology

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## Abstract

**:**

## 1. Introduction

## 2. Background

#### 2.1. PID Controller

#### 2.2. Big Bang–Big Crunch Algorithm

- Form an initial generation of N candidates in a random manner.
- Calculate the fitness function values of all the candidate solutions. This step depends on the target optimization problem.
- Find the center of mass according to Equation (8). Best fitness individual of each generation can be also chosen as the center of mass instead of using Equation (8) reducing the computation time.
- Calculate new candidates around the center of mass using Equation (9). Notice that the random value added or subtracted to the center of mass decreases as the iterations elapse.
- Return to Step 2 until stopping criteria have been met.

## 3. Proposed Approach

#### 3.1. HVAC System and PID Controller

#### 3.2. Tuning of the PID Parameters Using BB–BC

_{p}, k

_{i}, k

_{d}) in the HVAC model. Figure 3 above shows how the control unit consisting of the BB–BC unit and the PID controller is connected in the HVAC system. First, the BB–BC unit produces initial candidates for the PID parameters in the target search space. Next, based on the calculation of the objective function, it produces new candidate solutions around the center of mass until the stop criteria is satisfied.

## 4. FPGA Implementation of PID Controller and BB–BC

_{p}, k

_{i}, k

_{d}) in order to accelerate the control system process, which can be very effective for latency-sensitive applications.

#### 4.1. PID Controller in FPGA

#### 4.2. BB–BC Algorithm in FPGA

- Random Number Generation: It generates the random numbers (${\overrightarrow{x}}^{i}$), either to form an initial population (iteration 0) or to form new candidates around the CoM (iteration > 0). A typical linear feedback shift register (LFSR) is used to generate random numbers based on a configurable seed. Note that the boundaries of the random numbers are determined by the upper and lower values of the optimization function variables. In each iteration, the module generates N candidates sequentially, where N is the population size, with each one consisting of L random numbers, where L is the number of features of each candidate. The generated random numbers of each iteration are stored in a RAM in order to be processed later for the calculation of center of mass.
- Objective Function: After the random number generation, this module calculates the objective function (${f}^{i}$) for each candidate (${\overrightarrow{x}}^{i}$) using the ITAE equation, which is also stored in the RAM. Both the random number generation and objective function modules have been implemented following a simple, serial processing model, where a single element is processed in each clock cycle, providing a low-cost FPGA circuit. Note that both modules can be parallelized (i.e., to generate the random numbers and calculate the objective functions concurrently using many processing elements working in parallel) and pipelined in order to improve performance, as proposed in [28].
- Calculate Center of Mass: It reads the candidates and their objective function values from the RAM and calculates the center of mass which is forwarded in the random number generation module to generate the population in the next iteration cycle.
- Evaluate Function: It reads the objective function values of the candidates from the RAM in order to select the best fitness candidate which is store in RAM too, and from output signal when the FPGA-BBBC control the HVAC model.
- Control Unit: It orchestrates the operation of the other modules and repeats the BB–BC steps until the stopping criteria are met.
- Solution: It includes a register that stores the outcome of the BB–BC algorithm.

#### 4.3. FPGA-In-The-Loop (FIL)

^{®}presented the FPGA-in-the-loop (FIL) concept. Based on this idea, data can be exchanged between the MATLAB/Simulink modules and the FPGA device. FIL scheme can be used for multiple tasks while designing, evaluating, and verifying designs. For example, it can be used to configure and tune FPGA design parameters at runtime, such as tuning data pipe gains and modifying filter parameters [29], or to monitor hardware components by reading specific status registers at runtime. Another powerful capability of the FIL approach is that allows the generation of complex stimulus datasets on the host PC and rapid download to the FPGA target in real time [29]. By using the FIL approach and connecting the hardware target via some common protocol interface (e.g., Ethernet or JTAG), one can obtain significant improvements in simulation runtime compared to cycle-accurate host simulation.

#### 4.4. System Architecture

- (1)
- The FPGA BB–BC module generates a set of random PID parameters (k
_{p}, k_{i}, k_{d}), either to form the initial candidate or the new candidate around the center of mass in the next iteration cycles. - (2)
- The FPGA PID controller module receives the values of the parameters and controls the HVAC plant.
- (3)
- The FPGA BB–BC module calculates the fitness functions for this candidate (i.e., PID parameters) using the ITAE equation and then calculates the new center of mass.
- (4)
- The HVAC model runs for a short period.
- (5)
- The evaluate function checks the system output and decides whether the BB–BC module must re-run to improve system performance, i.e., when the system has been affected by external disturbances that cause the output to exceed some predefined thresholds. Note that we use the HVAC plant as a part of the FPGA BBBC module to produce the first optimization parameters (k
_{p}, k_{i}, k_{d}) of the PID controller for the HVAC model in the first run.

## 5. Experiments on the HVAC System

#### 5.1. Experimental Setup

#### 5.2. System Performance and Convergence

#### 5.3. Computation Time

## 6. Conclusions

## Author Contributions

## Acknowledgments

## Conflicts of Interest

## Abbreviations

ADD | Adder |

BB-BC | Big Bang-Big Crunch |

Clk | Clock |

CoM | Center of Mass |

DE | Deferential Equation |

FIL | Field programmable gate array in the Loop |

FPGA | Field Programmable Gate Array |

GA | Genetic Algorithm |

HVAC | Heat Ventilation Air Condition |

IAE | Integrated Absolute Error |

ISE | Integrated Square Error |

ITAE | Integrated Time Absolute Error |

ITSE | Integrated Time-weighted Square Error |

PID | Proportional Integrating Derivative |

PSO | Particle Swarm Optimization |

RandGen | Random Generator |

REG | Register |

RT | Running Time |

RTL | Register Transfer Level |

SST | Steady State Time |

VHDL | Very High Speed Integrated Circuit Hardware Description Language |

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**Figure 4.**Convergence and time response of the widely used objective function in controller tuning via optimization (ITAE, ITSE, IAE, ISE) for different number of iterations (

**a**) 100, (

**b**) 200, (

**c**) 500 and (

**d**) 1000 iterations.

**Figure 10.**Time responses of four optimization methods (BBBC, BBBC-FPGA, PSO, GA) for different number of iterations (

**a**,

**b**,

**c**, and

**d**for 100, 200, 500, and 1000 iterations, respectively).

**Figure 11.**The (

**a**) system output, (

**b**) control signal, (

**c**) error signal, and (

**d**) objective function for all four optimization methods.

**Figure 12.**Objective function convergence for all four optimization methods and for different number of iterations (

**a**,

**b**,

**c**, and

**d**for 100, 200, 500, and 1000 iterations, respectively).

C(z) | k_{1} | k_{2} | k_{3} | k_{4} | k_{5} |
---|---|---|---|---|---|

C(z) | $-\frac{{a}_{1}}{{a}_{0}}$ | $-\frac{{a}_{2}}{{a}_{0}}$ | $-\frac{{b}_{0}}{{a}_{0}}$ | $-\frac{{b}_{1}}{{a}_{0}}$ | $-\frac{{b}_{2}}{{a}_{0}}$ |

**Table 2.**Comparison of different errors, ITAE, ITSE, IAE, ISE as performance index (fitness function).

Iteration No. | ITAE | ITSE | IAE | ISE |
---|---|---|---|---|

100 | 5.33 × 10^{2} | 2.47 × 10^{3} | 3.10 × 10^{2} | 2.25 × 10^{3} |

200 | 4.85 × 10^{2} | 2.58 × 10^{3} | 2.99 × 10^{2} | 2.24 × 10^{3} |

500 | 4.40 × 10^{2} | 2.62 × 10^{3} | 3.46 × 10^{2} | 2.34 × 10^{3} |

1000 | 3.96 × 10^{2} | 2.20 × 10^{3} | 2.86 × 10^{2} | 2.45 × 10^{3} |

Logic Utilization | Used | Available | Utilization |
---|---|---|---|

Number of Slice Registers | 306 | 54,576 | 0% |

Number of Slice LUTs | 16,998 | 27,288 | 62% |

Number of Block RAM/FIFO | 2 | 116 | 1% |

Number of DSP48A1s | 54 | 58 | 93% |

Method | PID Parameters | Os % | Ts | Tr | ||
---|---|---|---|---|---|---|

k_{p} | k_{i} | k_{d} | ||||

BBBC | 0.205 | 0.063 | 0.046 | 0.505 | 8.632 | 7.708 |

BBBC-FPGA | 0.236 | 0.076 | 0.020 | 0.505 | 9.498 | 7.959 |

GA | 0.341 | 0.154 | 0.014 | 0.493 | 23.196 | 14.014 |

PSO | 0.479 | 0.217 | 0.006 | 0.499 | 15.430 | 9.364 |

**Table 5.**Objective function convergence details (iterations and execution time) for all four optimization methods

Tuning Method | Convergence Iteration | Steady State Time (s) | Running Time (s) |
---|---|---|---|

BBBC | 2 | 10.642 | 4.061 |

BBBC-FPGA | 2 | 11.456 | 0.016 |

GA | 73 | 25.116 | 6.887 |

PSO | 2 | 19.440 | 8.634 |

M | GA Mat sw | BBBC Mat sw | BBBC-FPGA | ||
---|---|---|---|---|---|

Exec. Time | Speedup vs. GA | Speedup vs. BBBC | |||

100 | 6.887 | 4.061 | 0.016 | 430 | 253 |

200 | 12.008 | 7.990 | 0.028 | 428 | 258 |

500 | 28.728 | 18.023 | 0.065 | 441 | 277 |

1000 | 59.205 | 40.302 | 0.140 | 422 | 287 |

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**MDPI and ACS Style**

Almabrok, A.; Psarakis, M.; Dounis, A.
Fast Tuning of the PID Controller in An HVAC System Using the Big Bang–Big Crunch Algorithm and FPGA Technology. *Algorithms* **2018**, *11*, 146.
https://doi.org/10.3390/a11100146

**AMA Style**

Almabrok A, Psarakis M, Dounis A.
Fast Tuning of the PID Controller in An HVAC System Using the Big Bang–Big Crunch Algorithm and FPGA Technology. *Algorithms*. 2018; 11(10):146.
https://doi.org/10.3390/a11100146

**Chicago/Turabian Style**

Almabrok, Abdoalnasir, Mihalis Psarakis, and Anastasios Dounis.
2018. "Fast Tuning of the PID Controller in An HVAC System Using the Big Bang–Big Crunch Algorithm and FPGA Technology" *Algorithms* 11, no. 10: 146.
https://doi.org/10.3390/a11100146