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Review

Gate Control of Superconductivity in Mesoscopic All-Metallic Devices

by
Claudio Puglia
1,2,*,
Giorgio De Simoni
2 and
Francesco Giazotto
2
1
Department of Physics, University of Pisa, Largo Pontecorvo 3, I-56127 Pisa, Italy
2
NEST, Instituto Nanoscienze-CNR and Scuola Normale Superiore, I-56127 Pisa, Italy
*
Author to whom correspondence should be addressed.
Materials 2021, 14(5), 1243; https://doi.org/10.3390/ma14051243
Submission received: 30 January 2021 / Revised: 24 February 2021 / Accepted: 28 February 2021 / Published: 5 March 2021

Abstract

:
The possibility to tune, through the application of a control gate voltage, the superconducting properties of mesoscopic devices based on Bardeen–Cooper–Schrieffer metals was recently demonstrated. Despite the extensive experimental evidence obtained on different materials and geometries, a description of the microscopic mechanism at the basis of such an unconventional effect has not been provided yet. This work discusses the technological potential of gate control of superconductivity in metallic superconductors and revises the experimental results, which provide information regarding a possible thermal origin of the effect: first, we review experiments performed on high-critical-temperature elemental superconductors (niobium and vanadium) and show how devices based on these materials can be exploited to realize basic electronic tools, such as a half-wave rectifier. Second, we discuss the origin of the gating effect by showing gate-driven suppression of the supercurrent in a suspended titanium wire and by providing a comparison between thermal and electric switching current probability distributions. Furthermore, we discuss the cold field-emission of electrons from the gate employing finite element simulations and compare the results with experimental data. In our view, the presented data provide a strong indication regarding the unlikelihood of the thermal origin of the gating effect.

1. Introduction

In the last two years, the impact of gate voltage on the superconducting properties of Bardeen–Cooper–Schrieffer (BCS) [1] elemental superconductors has been investigated [2,3,4,5,6,7,8]. In these studies, the authors analyzed the effect of electrostatic gating, generating electric fields reaching the order of 10 8 V/m and, at the same time, creating negligible variations in the surface charge carrier concentration. Although an increase in the critical temperature of a superconducting NbN wire was reported [8], the majority of works in this field show ambipolar suppression of supercurrent, e.g., in all-metallic superconductor wires [2], nano-constriction Josephson junctions (JJs) [3,4], fully metallic Superconducting Quantum Interference Devices (SQUID) [6], and proximity nanojunctions [9]. Such an unconventional gating effect in BCS superconductor systems is the first step in the realization of easy fabrication and high-scalable technologies in both environments of classic superconducting electronics and quantum computing. The purpose of this review is to cover recent advances in the control of superconducting properties in mesoscopic structures via the application of a control gate voltage. For such an effect, a fulfilling microscopic theory has not been provided yet. Indeed, it is not possible to take into account experimental observations through the conventional BCS framework, in which the superconducting properties are negligibly affected by electric fields [10]. Although some theories have been proposed, including surface nucleation and pinning of Abrikosov vortices [8,11,12,13], the electric field-driven Rashba orbital polarization [14,15,16,17], and the gate-driven Schwinger excitation of quasiparticles from the BCS vacuum [18,19,20], they have not been experimentally verified yet. The injection of high-energy field-emitted cold-electrons into the weak-link was also hypothesized to be at the origin of the gating effect [21,22]. Nevertheless, even in the presence of the latter mechanism, several experimental results are not compatible with a mere power injection, resulting in overheating of the superconductor [2,3,23,24].
This article is organized as follows: Section 2 displays evidence of a gate-driven supercurrent suppression in vanadium and niobium Dayem bridges (DBs). Moreover, different technological implementations based on these materials are presented. In the same section, two further topics are faced. The former is modification of the switching current probability distribution as a function of the gate voltage. The latter is influence of the substrate on the gating effect in titanium weak-links. Section 3 analyzes the evidence against a thermal origin of the supercurrent suppression. Finally, Section 4 provides a summary of the results presented in this review, reiterating the main achievements and proposing new experiments to increase the understanding of the gating effect.

2. Gate-Driven Supercurrent Suppression in Nb and V Nanojunctions

In this section, we present a series of experiments, performed on niobium and vanadium superconducting weak-link devices, aimed at extending the range of materials suitable for gated-superconductor applications for elemental superconductors with a critical temperature higher than the liquid helium temperature ∼4.2 K. The presented results demonstrate the possibility to implement gate-controlled all-metallic superconducting electronics [25] compatible with industrial standards.

2.1. Niobium Gate-Controlled Transistor

All-metallic supercurrent transistors consist of a superconducting mesoscopic channel realized with BCS metals, equipped with gate electrodes lithographically fabricated at a distance of a few nanometers from the channel. The gate electrode is polarized through the application of either positive or negative control gate voltage. Niobium gate-controlled transistors typically consist of an 8-μm-long, 2.5-μm-wide wire interrupted by a 50-nm-wide, 120-nm-long constriction. Aligned with the DB weak-link, a co-planar, 60-nm-far, 80-nm-wide metallic gate was realized. The thin film was deposited on a sapphire Al 2 O 3 substrate via DC magneto-sputter deposition of a 10/40-nm-thick Ti/Nb bilayer. The former metal was necessary to increase the adhesion and the mechanical strength of the metallic film. A pseudo-color scanning electron micrograph is shown in Figure 1a.
The device shows a Dayem bridge normal state resistance R D B 30 Ω and a critical temperature T D B 3 K [26]. On the other hand, the niobium banks inherit the critical temperature of the pristine thin film T N b 7.9 K [26]. The smaller critical temperature of the Dayem bridge is due to its lateral size, which is comparable with the niobium coherence length [27,28]. T N b , instead, is about 80% of the conventional critical temperature for Nb because of the proximity effect of the adhesion titanium layer. The conventional dissipation-less transport is highlighted by plotting the current–voltage I vs. V characteristics measured at a bath temperature T = 20 mK and a gate voltage V G = 0 V, as shown in Figure 1b. The Dayem bridge switching current is I S 30 μA. The forward and backward I vs. V characteristics show the conventional hysteretic behavior due to heating induced by the current bias when switching from the normal to the superconducting state (at the retrapping current I R ) [29,30].
Suppression of the switching current via the application of a gate voltage was demonstrated by measuring the I vs. V characteristics as a function of V G from 40 to 40 V at a bath temperature of T = 20 mK. Figure 1b displays V ( I ) curves at several gate voltages. A shadow grey area is drawn to underline the suppression region. The quenching of the supercurrent is symmetric for V G V G for bath temperatures between 20 mK and 3 K, as shown in Figure 1c. As reported in conventional experiments [2,3,4,9], widening of the plateau in which the gate voltage is not effective is visible as the temperature rises. The suppression of the supercurrent can be observed up to a temperature of 3 K, with complete suppression at V G = 40 V for T > 2 K. Notably, the suppression of I S is visible up to a temperature of 3 K because the gating affects a localized region of the superconductor around the constriction [24]. When that region switches to the normal state, the screening of the metallic system in the normal state does not allow us to observe the quenching effect.

2.1.1. Rectification Properties

Based on the peculiar shape of the R vs. V G characteristic [26], it is possible to implement a superconducting diode scheme. In particular, the sharpness of the super-to-normal transition can be exploited to rectify an alternate voltage V A C applied to the gate electrode while the weak-link is current-biased. In this configuration, a sinusoidal gate voltage is transformed into a square wave voltage-drop across the junction. Such a peculiar system response is shown in Figure 2a. The gate voltage signal is the sum of V A C and of a DC pre-bias voltage used to define a switching current working range I S ( V G m a x ) < I B < I S ( V G m i n ) . The oscillation of I S above and below I B results in a periodic normal-to-super and super-to-normal transition that generates a time-dependent voltage-drop V ( t ) across the junction. The output signal maintains the same periodicity of V A C with a duty cycle given by the time at which I S < I B .
Notably, the output voltage depends directly on the amplitude of the AC input signal thanks to the behavior of the R vs. V G characteristic. In the configuration shown in Figure 2, our system acts as a half-wave rectifier that could be used in a vast range of devices such as diodes and detectors. In the next paragraph, further evidence of the rectification properties of such systems is provided, with emphases on the versatility of the technology.

2.2. Vanadium Gate-Controlled Transistor

The vanadium gate-controlled transistors typically consist of a planar 60-nm-tick, 160-nm-long, 90-nm-wide weak-link with a 70-nm-far, 120-nm-wide gate aligned to the weak-link. The exploited bridge geometry is similar to those already discussed for Nb-based devices. The device fabrication was performed on a silicon/silicon oxide (Si/SiO 2 ) substrate by means of a single-step electron beam lithography followed by an e-beam V evaporation performed at a rate of 0.36 nm/s in an ultra-high vacuum chamber. Figure 3a displays the pseudo-color SEM of a representative vanadium-gated device.
The device shows a normal state resistance R N 106 Ω , a switching current at 2 K of I S = 1.42 mA, and a critical temperature T C 3.6 K [31].
Suppression of the switching current as a function of the gate voltage was demonstrated by measuring the I S vs. V G characteristics. Figure 3b shows bilateral suppression of the supercurrent down to total quenching for | V G | 10 V in a range of bath temperature from 2 to 3.2 K. Notably, the sharper suppression of I S observed for positive values of the gate voltage is in contrast with a possible cold field-emission origin of the quenching effect. Indeed, the device geometry could facilitate electron extraction from the gate that occurs at negative gate bias values [21,22]. This consideration is deeply discussed in Section 3.

2.2.1. Half-Wave Rectifier

Time-resolved characterization of the device was carried out using both sinusoidal and square-wave gate voltages. Figure 4a shows the bias scheme of the measurement setup consisting of a DC bias current, a DC voltage generator, and an Analog to Digital Converter/Digital to Analog Converter ADC/DAC digital board providing the AC gate voltage signal. The latter voltage generators provides a V G ( t ) = V D C + V A C ( t ) gate signal, setting the right operation point in the parameters space (see Figure 4a).
The measured voltage-drop signal V ( t ) across the junction vs. the time-dependent V G ( t ) results in a zero-signal (low-state) when I S V G ( t ) > I B (superconducting state). By contrast, when I S V G ( t ) < I B , the junction switches to the normal state and a finite voltage-drop is built across the DB (high value). We measured the response of the system to a transistor-transistor logic-like (TTL) square-wave excitation consisting of a V D C = 10 V bias added to a V A C = 5 V square wave signal with frequencies up to ∼50 Hz, shown in Figure 4b.
The low and high states are highlighted on top of the I vs. V characteristics (obtained for V G ranging from 10 to 15 V) with dots of the same color in Figure 4b. The V ( t ) signal resulting from V G ( t ) excitation is shown in Figure 4b for two current bias ( I S = 18 , 71 μA). We note that the output voltage is proportional to the bias current. It is worth emphasizing again that V ( t ) maintains the shape of the input voltage signal with frequencies, in principle, limited only by f Δ [30,32].
Finally, we show the response of the system to a sinusoidal gate voltage signal. The measurement setup is the same as the square-wave characterization shown in Figure 4a. The excitation consists of a V A C sine-wave with amplitude ranging from 1.0 to 3.5 V summed with a V D C = 11 V voltage bias, shown in Figure 5b. The bias current for this experiment was chosen to be I B = 72 μA to have a sharp super-to-normal transition and a linear dependence between R and V G . The continuous variation in the gate voltage provides continuous variation in junction resistance accordingly with the R ( V G ) curves [31]. Due to the former behavior, the system is in the non-dissipative state for I S V G ( t ) > I B and a voltage-drop across the DB arises when the condition I S V G ( t ) I B is satisfied. When I S V G ( t ) < I B , the voltage-drop increases due to gate-driven evolution of the DB resistance and eventually saturates at the asymptotic value of the normal-state resistance. Figure 5a shows the voltage-drop across the junction as a function of both the bias current and the gate voltage. The transition edge is highlighted by a dashed red line. The working point set by I B and V D C is shown by white dashed lines. The time-resolved V ( t ) s for V A C equal to 1.0 and 3.5 V are reported in Figure 5c,d. Notably, the rectification threshold and the portion of the input signal rectified can be selected by setting both I B and V A C .
The former characteristics here, typical of a half-wave rectifier, are realized for the first time by exploiting an all-metallic, gated superconducting Dayem bridge. We speculate that the described rectifying behavior can be suitably exploited to rectify incoming radiations coupled to the gate through an antenna, realizing a gate-controlled version of a transition edge sensor [33,34,35]. The rectifier is based on superconducting field-effect transistor FET technology that is controlled via the application of a gate voltage in a similar way to conventional complementary metal–oxide–semiconductor CMOS technology, making the standards perfectly compatible. In the absence of a complete high-frequency characterization, we assume an operational frequency of the order of the gap. For example, Nb and NbN promise to be exploited to realize a transistor with a switching frequency larger than 700 GHz. This device could operate in an extremely wide frequency range, spanning from below 1 GHz to about 1 THz. This interval is particularly relevant for both technological applications and fundamental research (e.g., in astrophysics for cosmic microwave background detection).

2.2.2. Amplification Properties

The vanadium Dayem bridge, thanks to its peculiar R ( V G ) characteristics, is suitable for the realization of an amplifier. The gain parameter of a DB transistor is conveniently defined as the ratio between peak-to-peak amplitudes of gate voltage input and the output voltage-drop across the junction g = V o u t V i n . For our system, V o u t = R ( V G ) I B is the voltage-drop across the junction and is directly proportional to the resistance and the current bias. V i n is defined as the ratio between the width of the switching current probability distribution (SCPD) [23] and the transconductance τ = d I S d V G . For the devices taken into account in this section, g 7 with a typical power consumption of ∼40 nW. It is worth highlighting, on the one hand, that g is of the same order of magnitude as the conventional semiconductor cold amplifier [36,37]. Such a result, on the other hand, was obtained with a power usage smaller than a factor of a thousand compared to the typical semiconducting counterpart. Furthermore, using N rectifiers connected in series, feeding the gate electrode of the Nth rectifier with the output voltage of the ( N 1 )th one, a total gain equal to g N can be obtained.
The possibility to tune the supercurrent via electrostatic gating paves the way for a wide range of applications. Indeed, gate-controlled devices could be exploited to realize tunable magnetometers [38,39] and heat control systems [40,41]. Furthermore, by exploiting the gating effect, a voltage-controlled version of the nanocryotron [42,43] can be implemented. The latter is a three-terminal superconducting device in which a localized switching-current suppression (triggered by injecting a control-current that generates a hotspot by Joule heating) destroys the superconducting characteristics of the nearby material. The gated version of the nanocryotron, the so-called (EF-Tron) [6], is implemented in parallel to a resistor and a gated superconductor. Differently from current-driven devices [43,44], the EF-Tron is expected not to be limited by the characteristic time scale of thermal effects, which does not allow us to use signals with frequencies larger than about hundreds of MHz at cryogenic temperatures [29]. In this view, it is worth discussing the role of an eventual direct power injection into the gated device (driven, e.g., by a gate-superconductor leakage current) that could produce an increase in the electronic temperature, detrimental for device performance.

3. Nonthermal Origin of Supercurrent Suppression in Gated All-Metallic Superconducting Devices

3.1. SCPDs in a Titanium Gate-Controlled Transistor

In a current biased Josephson junction (JJ), the super-to-normal transition for fixed values of external parameters, e.g., temperature, and electric and magnetic fields, is triggered by phase slips. Such events, where the amplitude of the order parameter coherently fluctuates to zero at some point, recover with a different winding number, resulting in local random 2 π jumps of the macroscopic quantum phase ϕ [45]. The accidental nature of such events leads to a non-univocal definition of the switching current, the value of which is distributed according to the switching current probability distribution (SCPD). The investigation of the SCPD of a JJ is, therefore, exploited to probe the dynamics of the phase slips. Here, we discuss an experiment where a well-established technique is adopted to probe the impact of gate voltage on the number of phase slip events in gate-controlled fully metallic titanium-based Dayem bridges with the conventional theory [46,47,48].
The device chosen to study the evolution of the SCPD under gating action consists of a titanium Dayem bridge. Such JJs consist of 30-nm-thick, 10-μm-long, 2.5 -μm-wide wires interrupted by a constriction. This 30-nm-thick, 150-nm-long, 120-nm-wide narrow structure was aligned with a planar, 80-nm-far, 140-nm-wide metallic gate. The sample was fabricated using single-step electron beam lithography on a sapphire (Al 2 O 3 ) crystal wafer. The Ti layer was deposited at a rate of 1.2 nm/s. Figure 6a shows a pseudo-color scanning electron micrograph.
The device shows a normal state resistance R N 550 Ω , a switching current at 20 mK of I S = 6.0 μA, and a critical temperature T C 310 mK [23].
The dependence of I S [2,3,4,5,6,9,23,26,31] on the gate voltage is shown to acquire the I S vs. V G characteristics as a function of bath temperature. Figure 6b shows that the supercurrent vanishes for V G     34 V and that such a value appears to be independent from the bath temperature. By increasing the values of the temperature, I S 0 = I S ( V G = 0 ) lowers and I S is unaffected by the gate voltage for a larger range of V G . This latter behavior resembles the results obtained on Ti and Al superconducting FETs [2,3].
To characterize the effect of temperature on superconducting Dayem-bridge JJs, SCPDs were measured at different values of thermal bath temperature. The distributions were reconstructed by drawing a histogram based on 10 5 switching current acquisitions for each value of the bath temperature T.
Figure 7 shows the evolution of these so-called thermal SCPDs in a temperature range between 20 and 300 mK. The dependence of the shape of thermal SCPDs is analyzed through the conventional Kurkijärvi–Fulton–Dunkleberger (KFD) theory [46,49] with a fit procedure [23]. First, the different phase slip regimes were identified thanks to the evolution of distribution standard deviation σ as a function of T. The Figure 7 insets show the expected behavior of the σ vs. T curve in the three different phase slips regimes, which is flat at low temperatures in the Quantum Phase Slip (QPS) regime [50,51,52], linear as a function of the temperature T in the Thermal Activated Phase Slip (TAPS) regime [53], and decreasing for the Multiple Phase Slip (MPS) regime as T increases [45,46,47,49,54,55,56,57]. The temperature T Q , separating the QPS and the TAPS regime, occurs at about T 110 mK, while the crossover between TAPS and MPS regimes appears for T M 160 mK.
Although these devices show the conventional behavior of phase slip dynamics as the temperature T varies, the gate voltage drives the junction in a different regime. Figure 8a shows vertically shifted SCPDs collected for several values of the gate voltage at T = 20 mK. In particular, the SCPDs overlap for V G < 8 V whereas a low-current “tail” is observed for 8 < V G < 14 V. In addition, the distributions greatly widen for 14 < V G < 24 V, and for high gate voltage values, i.e., V G > 24 V, the SCPDs turns out to be narrow. In this electrostatically driven scenario, the σ vs. V G curve takes the place of the conventional σ vs. T characteristic. As shown in Figure 8b, the σ ( V G ) curve exhibits a region of constant standard deviation, thereby highlighting a marginal contribution of the gating effect to the number of phase slip events for low V G values. Such behavior seems to be similar to the conventional QPS regime. Therefore, we identify a crossover gate voltage V Q 8 V between the former and the Electric Activated Phase Slip (EAPS) regime, where the σ grows to ∼200 nA as the gate voltage increases. Notably, σ starts to increase at the same voltage at which the switching current begins to be affected by the electric field. Such evidence seems to suggest that, whatever the origin of I S suppression, the latter is associated with a corresponding increase in phase slip events. Finally, for higher values of the gate voltage (i.e., V G > V E 14 V), σ decreases and saturates to ∼75 nA.
The starkly different behavior between thermal and electric SCPDs is displayed in Figure 9a, where three I S -matched couples of thermal and electric distributions are plotted in the same graph for comparison. The I S -matched SCPDs display remarkably different widths and general shapes, an evolution which likely stems from an gate-driven non-equilibrium state induced in the weak-link. In particular, the gate voltage seems to increase the phase fluctuation in the system, allowing for a switching event in a larger current range. Concerning the standard deviation of the distributions, on the one hand, the comparison between σ vs. I S curves extracted from the two thermal and electric SCPDs series, shown in Figure 9b, displays a qualitatively similar behavior. On the other hand, the electric-driven SCPDs present σ on average around one order of magnitude larger.
Indeed, if we assume that the voltage-driven broadening of the SCPD is due to an increase in the electronic temperature, e.g., a trivial Joule heating due to a gate-DB current, we run into the absurdity of obtaining an electronic temperature higher than the critical temperature of the superconductor [29,45]. This observation reflects the impossibility to fit the gate-driven SCPDs with a conventional KFD transform since the resulting fit parameters would be nonphysical. Therefore, on the one hand, these data demonstrate a strong link between phase slip events and electric field and, on the other hand, they suggest a nonthermal origin of the switching current suppression: the action of the gate voltage drives the DB in a state in which the description is incompatible with that of a superconductor heated through a voltage-driven power injection at a thermal steady state with an electronic temperature higher than that of the thermal bath.

3.2. Suspended Titanium Gate-Controlled Transistor

We have shown that it is not possible to describe the modification of SCPDs as a consequence of trivial overheating. In other words, the effect of the gate is unlikely that of driving the superconductor into a higher electronic-temperature steady-state by mere power injection (driven by current injection). To further investigate the role of a possible injection of current between the gate and superconducting channel, fully suspended, gated superconducting nanobridges were tested. In conventional gated devices, two gate-channel charge transport mechanisms might be present: the diffusive current injection through the substrate and the ballistic emission of cold-electrons (CFE) across the vacuum. The suspended geometry permits us to exclude leaving the CFE as the only possible charge transport mechanism.
This experiment was performed on titanium-gated suspended wires. The devices consist of 70 nm thick and 1.7 μm long Ti nanobridges deposited on top of an undoped 130-nm-suspended crystalline InAs [58,59] nanowire (NW) realized by chemical beam epitaxy. The NWs were deposited onto a layer of Poly-methyl-methacrylate PMMA spin-coated and baked on top of a Si/SiO 2 substrate. Then, the resist were exposed via electron beam lithography (EBL) (5000 μC/cm 2 at 10 keV) to cross-link the PMMA underneath the ends of the nanowires and to define the pillars that sustain the NWs. Then, InAs NW suspension was achieved, removing the unexposed PMMA thanks to a 10-min acetone bath. The anchoring between the NW and the PMMA pillars was obtained with an aligned EBL and a thermal evaporation of a Ti/Au (5/15 nm) bi-layer. The portion of cross-linked resist uncovered by the Ti/Au shields was then removed with O 2 dry etching. Such a step results in a large undercut along the Au pad edges that prevents short circuits among the wire and the gate electrodes after the last titanium evaporation. Finally, the last EBL step allows us to state that the final titanium wire electron beam evaporates at a rate of about 1.2 nm/s. Figure 10a,b show scanning electron micrographs of a typical device.
Such a suspended nanojunction shows four different superconducting transitions [24] that can be interpreted as the switch of the superconducting banks for I B 1.8 μA and of the series of three junctions with switching currents at, respectively, I S 1 25 nA, I S 2 150 nA, and I S 3 180 nA. The geometry of the junction and the multi-step fabrication technique induced the existence of such a series of three junctions in the nanobridge due to inhomogeneities of the titanium layer thickness deposited on top of an InAs nanowire. Moreover, the switching current difference resides in the variation of the cross section of a Ti film coating the wire and on the inhomogeneous anti-proximization effect of the superconducting film due to the bottom gold layer.
The I vs. V shifted characteristics at select gate voltages from 20 to 20 V of the bridge are shown in Figure 10c at a temperature of 20 mK. Figure 10d–f shows the evolution of the switching currents I S i of the three junctions as a function of the voltage gate, extracted from the I vs. V curves measured at several T.
Notably, as the temperature increases, the gate voltage range for which I S is unaffected shrinks. The former results are in opposition with previous experiments [2,3,4] on the subject. We attribute this different behavior to the reduction in thermal coupling between the Dayem bridge and substrate compared to systems located on a substrate, whereas in terms of the microscopic origin of the gate-driven effect, the reduction in the switching current appears to be connected to a considerable increase in quasi-particle excitations in the superconducting system [21,23]. Such enhancements seem to be more efficient in suspended devices, in which the relaxation of quasiparticles via electron–phonon interactions is greatly reduced compared to conventional systems. These results demonstrate that the presence of an interface between the substrate and the superconducting junction is not necessary for the gate effect to occur. This is unequivocal evidence against the hypothesis of a Joule heating origin of supercurrent suppression due to a diffusive current injected into the substrate.

3.3. Leakage Current Finite Element Method Simulations

The suspended geometry experiment allows us to exclude the Joule heating as the main origin of quenching of the supercurrent in gated metallic structures. In this framework, the only possible mechanism that allows a current to flow between the gate and the wire is vacuum cold-electron field-emission (CFE). Such an emission is typically due to the presence of an intense electrostatic field between different electrodes [60,61]. To understand the role of a hypothetical current generated via field-emission in I S suppression, the CFE current ( I F E ) can be quantified through 3-D finite-element method simulations run on a system with the same geometry as the suspended titanium gate-controlled transistor and then compared with the measured leakage current I L [24]. I F E is computed via numerical integration over the cathode surface, i.e., the gate (wire) for negative (positive) gate voltages and the Fowler–Nordheim (FN) current density generated via the tunnelling effect [60,61]:
J F E ( E , h 0 ) = 2.2 e 3 8 π h h 0 E 2 exp 8 π 2.96 h e | E | ( 2 m e ) 1 / 2 h 0 3 / 2 ,
where E ( x , y , z ) is the electric field at the surface of the cathode; m e and e are the mass and the charge of the electron, respectively; h is Plank’s constant; and h 0 = 4.3 eV is the literature titanium work function [62]. The Maxwell equations E = V ( x , y , z ; V G ) allows us to calculate the electric field, where the electrostatic potential was obtained, exploiting the Poisson equation 2 V ( x , y , z ; V G ) = 0 . The boundary conditions for the Poisson equation were simulated with perfect equipotential conductor boundaries set at V = 0 and V = V G for the two electrodes.
The distribution in the space of the electric field module E computed in the entire simulation domain is shown in Figure 11a,b at V G = 15 V for the top plane and cross-sectional views. The simulations show that the electrostatic field is strictly confined between the titanium constriction and the gate electrode surfaces and that it rapidly decreases elsewhere, without affecting the superconducting banks.
The electric field reaches the maximum intensity of 0.2 GV/m in correspondence with the center of the gate, and it is localized near the side gate surfaces. Moreover, | E ( x , y , z ) | drops more than one order of magnitude between 500 nm from the lateral edge of the gate electrode. Such a field geometry lets us conclude that the banks are unlikely to be affected by gate voltage.
By solving the ballistic trajectories of the electron emitted by the electrode, it is possible to compute the current density | J F E | in the region between the gate and the wire. Figure 12a,b shows | J F E | evaluated on the XY and YZ planes. It is worth noticing the extreme localization of the electrons in a region of about 500 nm centered on the electrodes that affects only a small portion of the nanobridge. Such evidence proves that, for cold-emitted electrons, the vast majority of the charge particles emitted/absorbed from the gate are absorbed/emitted from the wire.
Finally, integration of the current density J F E over the surface of the electrodes returns the current I F E , a quantity that can be directly compared with the gate-wire current measured in the experiment (shown in Figure 13) [24].
Notably, I F E is at least 20 orders of magnitude smaller than the maximum gate-bridge leakage current experimentally measured. Furthermore, a current of about 10 40 A corresponds to the emission of a single charged particle every 10 28 years on average, and it is consistent with electrostatic fields that are not strong enough to generate a true cold-emission current. Typically, electrostatic fields of about 1–10 GV/m [63] are requested to generate a proper CFE current, but our results show that the maximum value of | E | is smaller by at least a factor of 10. Moreover, the simulation shows an intrinsic asymmetry of several orders of magnitude for I F E when V G V G due to the geometry difference between the gate and wire. This seems to suggest that, if the field emitted current was the leading mechanism in determining I S suppression, a strongly asymmetric behavior should be observed for positive and negative gate voltages. Such a feature was never reported in experiments on gated metallic superconductors [2,3,4].

3.4. Heating through Single Cold-Electron Field Emission or Absorption

If we admit that a certain number of electrons are emitted or absorbed by the gate and absorbed/emitted by the wire, the expected experimental phenomenology should be different compared to those observed: a single electron with an energy of the order of 10 eV that ballistically reaches the constriction through the vacuum is expected to release its energy, inducing a sudden increment in the system electronic temperature. A straightforward calculation for the electron contribution to the heat capacitance C e of a weak-link in the dissipative state is as follows:
C e = Ω γ T e
where Ω is the volume occupied by the junction, γ is the Sommerfeld constant for titanium, and T e is the electronic temperature of the system.
The released energy E ( V ) is proportional to the acceleration voltage V between the gate electrode and the Dayem bridge:
E V = q V , P t = E δ t
where q is the electron charge, δ is Dirac’s delta distribution, and P ( t ) is the impulse power as a function of time t. According to heat transport theory, the evolution of the electronic temperature in the junction is described by the following differential equation [29], where T B is the lattice temperature:
C e T e t = P t T e = 2 E Ω γ + T B 2
We wish to stress that, by this approach, we obtain the final electronic temperature T e , which is an underestimate of its real value in the weak-link since we considered C e to be that of the normal state, which is exponentially larger than in the non-dissipative state because of the energy gap in the density of states [29]. The calculation demonstrates that single electrons with an energy of approximately 30 eV that release their energy into the superconducting system at a bath temperature of 10 mK would increase the electronic temperature to a value 20 times larger than its critical temperature ( T C 500 mK). Such a result is evidence that the heat generated from CFE electron absorption in the nanoconstrictions cannot lead the system in an equilibrium condition with well-defined gate-driven T e and I S .

3.5. Continuous Power Injection

In principle, we can make the further hypothesis that, due to continuous absorption of highly energetic electrons, the Dayem bridges bounce continuously between its normal and superconducting states, as shown in Figure 14.
In this framework, for each absorbed electron, the system suddenly switches to the normal state. Then, it relaxes to the non-dissipative state in the time given by the electron–phonon interaction, which is, in similar systems, about τ 1 ns [29], and it is several orders of magnitude lower than the integration time of measurement setup (typically ∼20 ms). In this picture of the effect, during a conventional V vs. I measurement, for each electron absorption when I is below the retrapping current ( I R ), the variation of its resistance is expected to be detected too fast by the measurement instruments. In the opposite situation, when the bias current is larger than I R , each time an electron is absorbed, the constriction is driven to the normal state and should persist in such a condition due to heating until the bias current I is set to 0. Such evidence suggests that, during a CFE process, I S and I R should always be the same. Since the observed phenomenology is different, we conclude that the hot electron-injection mechanism related to field emission as the predominant cause of the gating effect should be excluded.

3.6. Unconventional Sum Rule

Another strong evidence against a trivial heating or a direct power-injection origin of the supercurrent suppression comes from the evolution of the switching current of a superconducting wire under the action of a pair of lateral side gates. Using a titanium Dayem bridge consisting of double gate-flanked nanoconstrictions interrupting a Ti strip [6], it was possible to assess the mutual influence and the spatial extension of two opposite gate electrodes’ effect on the suppression of the switching current. Figure 15a,b show two contour plots of the normalized switching current I S / I S 0 as a function of V G 1 (x-axis) and V G 2 of two typical devices A and B. The quantitative difference in the values of V G C between the two systems was attributed to the difference in the gate-Dayem bridge (∼80 nm in sample A and ∼120 nm in sample B). The observed square-like shape indicates the existence of a voltage threshold V t h : when one of the two gates is biased above V t h , the critical supercurrent is suppressed by a fraction that is not dependent on the voltage applied to the other gate. In other words, the effect of the two gates on I S are independent and no obvious sum rule exists between the actions of the two voltages. Such evidence suggests that the gate-driven suppression of the supercurrent is likely related to a surface effect, which affects non-locally superconductivity, i.e., once the electric field established at one of the surfaces of the superconductor overcomes a critical value, its effect is propagated inside the superconducting body over a distance at least comparable with the device width. In agreement with previous experiments [2] and calculations [64], the surface perturbation could affect the superconductor at a depth of the order of the superconducting coherence length ξ . Furthermore, the aforementioned behavior is hardly comparable with the picture of a direct heat/power injection due to charge transport from/to the gate. Indeed, in the latter case, a sum rule for the total power P s u m is expressed as V G 1 2 / R 1 + V G 2 2 / R 2 , where R 1 , 2 are the gate-superconductor leakage resistances for gates 1 and 2, respectively.

4. Summary and Further Research

Along with this review, we showed electrostatic control of the superconducting properties in several all-metallic Josephson weak-links: niobium and vanadium Dayem bridges and titanium suspended wires (Section 2). On the one hand, we focused on the technological application of the effect, demonstrating supercurrent suppression on the material that represents the industrial standard for superconducting electronics, niobium. Moreover, the vanadium Dayem bridge experiments showed the potential for electric signal rectification of such geometry. On the other hand, we investigated the dynamic of the phase slip in a titanium Dayem bridge JJ under the effect of an electrostatic field. The results demonstrated that it is impossible to ascribe the modifications of the shape of the SCPDs to a conventional heating effect. In particular, in the framework of the established KFD theory, it was not possible to interpret the width of the distribution with the usual parameters. Furthermore, the experiment carried out with a suspended titanium wire demonstrated that the presence of the substrate is not critical to the occurrence of the effect. Such evidence confutes any possible contribution to superconductivity quenching due to the existence of an injection current that flows in the substrate.
In the second part of this review, we faced the hypothesis of the thermal origin of the electrostatic effect on BCS superconductors. Thanks to finite element simulations performed on a system with the same geometry as the suspended titanium transistor, we demonstrated that cold field emission cannot be a satisfactory explanation for suppression of the supercurrent. Even assuming that single electrons are emitted from the gate and absorbed by the junction, the local increase in the electronic temperature of the system is incompatible with the superconducting state. Additionally, the nontrivial summation rule of two side gates in quenching of the supercurrent is further evidence that a trivial thermal effect is not able to explain our unconventional gating effect.
To shed light on these experiments and to progress towards an understanding of the origin of the effect, a set of complementary experiments are required. For example, SQUID microscopy could provide useful information on the distribution of supercurrents in a field-affected region of the superconductor. Additionally, scanning tunnelling spectroscopy and scanning gate experiments are critical to investigate spatial variation in the superconducting gap. Moreover, radiofrequency-based experiments are crucial to acquire information on the characteristic time scale of the effect and the role of quasiparticle excitation in quenching of the supercurrent.
Moreover, a theoretical model able to explain the observed phenomenology has not been provided yet. From a technological point of view, the unconventional field effect promises to be suitable for a wide range of applications. We already demonstrated that the rectification properties of a Dayem bridge system and more complex devices such as gate-controlled radiation detector [65,66,67], signal routers, and computational systems [25,68] are within reach. Moreover, the superconducting gate-controlled transistors are suitable for high-current application thanks to the highly isolated gate, which is a fundamental requirement for high-power applications such as for power metal–oxide–semiconductor field-effect transistors (MOSFETs) and insulated-gate bipolar transistors (IGBTs).

Author Contributions

Measurements and data analysis C.P. and G.D.S. Writing, review and editing, C.P., G.D.S. and F.G. All authors have read and agreed to the published version of the manuscript.

Funding

The authors acknowledge the European Union’s Horizon 2020 research and innovation program under grant agreement No. 800923 (SUPERTED) for partial financial support.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Data sharing is not applicable to this article.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. (a) Pseudo-color scanning electron micrograph (SEM) of a typical niobium gated transistor with the bias scheme. The weak-link and the wire are in false-colored orange, and the gate is in blue. (b) I vs. V curves for select gate voltages V G at a bath temperature of 20 mK. The curves are horizontally offset for clarity. Bipolar suppression of the I S is visible as V G increases. (c) I S vs. V G for several bath temperatures T ranging between 20 mK and 3 K. I S values were collected by measuring 50 repetitions of the I vs. V characteristics.
Figure 1. (a) Pseudo-color scanning electron micrograph (SEM) of a typical niobium gated transistor with the bias scheme. The weak-link and the wire are in false-colored orange, and the gate is in blue. (b) I vs. V curves for select gate voltages V G at a bath temperature of 20 mK. The curves are horizontally offset for clarity. Bipolar suppression of the I S is visible as V G increases. (c) I S vs. V G for several bath temperatures T ranging between 20 mK and 3 K. I S values were collected by measuring 50 repetitions of the I vs. V characteristics.
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Figure 2. (a) Operation scheme of the niobium-based half-wave rectifier. The current bias is represented by the horizontal red dashed line in the I S ( V G ) graph. The time-dependent gate voltage (green to blues curve) is composed of an AC component V A C added to a DC bias V D C . The effect of the gating provides a time-dependent switching current I S ( t ) (purple to yellow line) able to rectify the gate voltage signal. (b) V vs. V G characteristic of the Josephson junction (JJ) measured with a four-probe technique with a lock-in amplifier. The reference signal of the lock-in is V A C , and the bias current I B was set to 2.5 μA. V. The signal is almost zero until I S ( V G ) < I B ; then, a peak arises due to rectification of the V G signal.
Figure 2. (a) Operation scheme of the niobium-based half-wave rectifier. The current bias is represented by the horizontal red dashed line in the I S ( V G ) graph. The time-dependent gate voltage (green to blues curve) is composed of an AC component V A C added to a DC bias V D C . The effect of the gating provides a time-dependent switching current I S ( t ) (purple to yellow line) able to rectify the gate voltage signal. (b) V vs. V G characteristic of the Josephson junction (JJ) measured with a four-probe technique with a lock-in amplifier. The reference signal of the lock-in is V A C , and the bias current I B was set to 2.5 μA. V. The signal is almost zero until I S ( V G ) < I B ; then, a peak arises due to rectification of the V G signal.
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Figure 3. (a) Pseudo-color SEM of a representative vanadium-gated device. The weak-link and the wire are colored in orange, and the gate is in blue. (b) I S vs. V G curves for different bath temperatures ranging from 2.0 to 3.3 K. The data were computed by averaging 25 acquisitions of I S .
Figure 3. (a) Pseudo-color SEM of a representative vanadium-gated device. The weak-link and the wire are colored in orange, and the gate is in blue. (b) I S vs. V G curves for different bath temperatures ranging from 2.0 to 3.3 K. The data were computed by averaging 25 acquisitions of I S .
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Figure 4. (a) Bias scheme for AC measurements. The gate voltage is generated by adding DC V D C and AC V A C arbitrary waveform voltages. The ADC/DAC board that provides the AC signal performs real-time measurements of V. (b) Voltage V vs. current I characteristics for different values of V G (yellow and purple curves). The dot couples show the operation points of the system for two different bias currents I B = 18 , 71 μA. V G vs. time t is the excitation signal (blue curve) that was realized by adding a DC voltage V D C = 10 V and an AC square-wave voltage with amplitude V A C = 5 V. Time-dependent V for different current biases are drawn in correspondence with the operation points. The measurements were performed at T = 3 K.
Figure 4. (a) Bias scheme for AC measurements. The gate voltage is generated by adding DC V D C and AC V A C arbitrary waveform voltages. The ADC/DAC board that provides the AC signal performs real-time measurements of V. (b) Voltage V vs. current I characteristics for different values of V G (yellow and purple curves). The dot couples show the operation points of the system for two different bias currents I B = 18 , 71 μA. V G vs. time t is the excitation signal (blue curve) that was realized by adding a DC voltage V D C = 10 V and an AC square-wave voltage with amplitude V A C = 5 V. Time-dependent V for different current biases are drawn in correspondence with the operation points. The measurements were performed at T = 3 K.
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Figure 5. (a) Color-plot of V vs. V G (x-axis) and I (y-axis). From left to right, the three round symbols show the zero-resistance gate voltage value (light green), the super-to-normal transition (red), and the maxima of both V G and V (dark green). The dashed red curve represents the I S vs. V G characteristic. (b) Time-dependent V G ( t ) obtained by adding a DC voltage V D C = 11 V and an AC sine wave voltage V A C . (c,d) Time-dependent V ( t ) for V A C = 3.5 V (c) and V A C = 1.0 V (d). The color-map is the same as in panel (a). All these measurements were performed at T = 3 K.
Figure 5. (a) Color-plot of V vs. V G (x-axis) and I (y-axis). From left to right, the three round symbols show the zero-resistance gate voltage value (light green), the super-to-normal transition (red), and the maxima of both V G and V (dark green). The dashed red curve represents the I S vs. V G characteristic. (b) Time-dependent V G ( t ) obtained by adding a DC voltage V D C = 11 V and an AC sine wave voltage V A C . (c,d) Time-dependent V ( t ) for V A C = 3.5 V (c) and V A C = 1.0 V (d). The color-map is the same as in panel (a). All these measurements were performed at T = 3 K.
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Figure 6. (a) Pseudo-color (SEM) and bias scheme of a representative Ti gate-controlled transistor. The superconducting wire and the Dayem bridge constriction are colored in orange, and the gate electrode is in blue. (b) I S vs. V G characteristics at select bath temperatures ranging from 20 to 300 mK. Data are the result of the average of 50 acquisitions of I S .
Figure 6. (a) Pseudo-color (SEM) and bias scheme of a representative Ti gate-controlled transistor. The superconducting wire and the Dayem bridge constriction are colored in orange, and the gate electrode is in blue. (b) I S vs. V G characteristics at select bath temperatures ranging from 20 to 300 mK. Data are the result of the average of 50 acquisitions of I S .
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Figure 7. (a) Switching current probability distributions (SCPDs) vs. I acquired at select bath temperatures from 20 to 90 mK in the Quantum Phase Slip (QPS) regime. The best fit curves are represented with dotted line. The inset shows σ vs. T of the regime. (b) SCPDs vs. I obtained at different temperatures from 120 to 150 mK in the Thermal Activated Phase Slip (TAPS) regime. The best fit curves are represented with a dotted line. The inset shows σ vs. T of the regime. (c) SCPDs vs. I obtained at different temperatures from 160 to 300 mK in the Multiple Phase Slip (MPS) regime. The inset shows σ vs. T of the regime. For each SCPD, the total sampling number of I S is 10 5 . The crossover temperatures T Q 110 mK and T M 160 mK separate the QPS/TAPS and TAPS/MPS regimes, respectively. In all the panels, the temperature increases from right to left.
Figure 7. (a) Switching current probability distributions (SCPDs) vs. I acquired at select bath temperatures from 20 to 90 mK in the Quantum Phase Slip (QPS) regime. The best fit curves are represented with dotted line. The inset shows σ vs. T of the regime. (b) SCPDs vs. I obtained at different temperatures from 120 to 150 mK in the Thermal Activated Phase Slip (TAPS) regime. The best fit curves are represented with a dotted line. The inset shows σ vs. T of the regime. (c) SCPDs vs. I obtained at different temperatures from 160 to 300 mK in the Multiple Phase Slip (MPS) regime. The inset shows σ vs. T of the regime. For each SCPD, the total sampling number of I S is 10 5 . The crossover temperatures T Q 110 mK and T M 160 mK separate the QPS/TAPS and TAPS/MPS regimes, respectively. In all the panels, the temperature increases from right to left.
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Figure 8. (a) SCPDs vs. I at select gate voltages from 0 V to 21 V in the Electric Activated Phase Slip (EAPS) regime. The inset shows standard deviation σ of SCPDs vs. gate voltage V G in the EAPS regime. (b) SCPD vs. I at different gate voltage values from 24 V to 30 V in the MPS regime. The inset shows standard deviation σ of SCPDs vs. gate voltage V G in the MPS regime. For each distribution, the total number of I S acquisitions is 10 5 . The curves are vertically offset for clarity. The crossover voltages are V Q 8 V and V E 14 V.
Figure 8. (a) SCPDs vs. I at select gate voltages from 0 V to 21 V in the Electric Activated Phase Slip (EAPS) regime. The inset shows standard deviation σ of SCPDs vs. gate voltage V G in the EAPS regime. (b) SCPD vs. I at different gate voltage values from 24 V to 30 V in the MPS regime. The inset shows standard deviation σ of SCPDs vs. gate voltage V G in the MPS regime. For each distribution, the total number of I S acquisitions is 10 5 . The curves are vertically offset for clarity. The crossover voltages are V Q 8 V and V E 14 V.
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Figure 9. (a) I S -matched distributions. Red and orange distributions were acquired for a negligible electric field at V G = 0 V at select bath temperatures, whereas blue and green distributions were measured at T = 20 mK for different gate voltage values. The values of I S are, respectively, from left to right 2.2 , 2.8 , and 4.0 μA. (b) Comparison between the σ vs. I S characteristic obtained for thermal- and electric-driven distributions at V G = 0 V (lower curve) and T = 20 mK (upper curve) respectively.
Figure 9. (a) I S -matched distributions. Red and orange distributions were acquired for a negligible electric field at V G = 0 V at select bath temperatures, whereas blue and green distributions were measured at T = 20 mK for different gate voltage values. The values of I S are, respectively, from left to right 2.2 , 2.8 , and 4.0 μA. (b) Comparison between the σ vs. I S characteristic obtained for thermal- and electric-driven distributions at V G = 0 V (lower curve) and T = 20 mK (upper curve) respectively.
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Figure 10. (a,b) SEMs of the suspended titanium transistor (original picture and pseudo-color). (c) Back and forth current I vs. V characteristics for select values of V G measured at a bath temperature of T = 20 mK. The characteristics are horizontally shifted for clarity. Grey colored regions highlight the gate-induced evolution of I S 1 , I S 2 , and I S 3 . (df) The V G dependence of the switching currents of I S 1 , I S 2 , and I S 3 , respectively.
Figure 10. (a,b) SEMs of the suspended titanium transistor (original picture and pseudo-color). (c) Back and forth current I vs. V characteristics for select values of V G measured at a bath temperature of T = 20 mK. The characteristics are horizontally shifted for clarity. Grey colored regions highlight the gate-induced evolution of I S 1 , I S 2 , and I S 3 . (df) The V G dependence of the switching currents of I S 1 , I S 2 , and I S 3 , respectively.
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Figure 11. E ( x , y , z ) and streamlines on the XY (a) and YZ (b) planes. The simulations were performed with a gate voltage value of V G = 15 V. The distribution of the electrostatic field shows that the field effect is confined upon constriction.
Figure 11. E ( x , y , z ) and streamlines on the XY (a) and YZ (b) planes. The simulations were performed with a gate voltage value of V G = 15 V. The distribution of the electrostatic field shows that the field effect is confined upon constriction.
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Figure 12. Current density module J F E ( x , y , z ) evaluated on XY (a) and YZ (b) planes. Data were obtained by analyzing the ballistic transport of the electrons through the vacuum from the gate electrode surfaces toward the titanium constriction (and vice versa for opposite values of gate voltage). Here, we set the gate voltage to V G = 15 V and the work function equal to the literature value for titanium ϕ 0 = 4.3 eV. The spatial distribution of the electronic current highlights that the field emitted electrons influence a 500 nm section of the constriction.
Figure 12. Current density module J F E ( x , y , z ) evaluated on XY (a) and YZ (b) planes. Data were obtained by analyzing the ballistic transport of the electrons through the vacuum from the gate electrode surfaces toward the titanium constriction (and vice versa for opposite values of gate voltage). Here, we set the gate voltage to V G = 15 V and the work function equal to the literature value for titanium ϕ 0 = 4.3 eV. The spatial distribution of the electronic current highlights that the field emitted electrons influence a 500 nm section of the constriction.
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Figure 13. Natural logarithm of I L between the gate electrodes and the constriction at a bath temperature of T = 20 mK vs. the gate voltage V G measured on a titanium suspended device (Orange dots). Natural logarithm of I F E between the gate electrodes and the constriction vs. the gate voltage V G computed by integrating the Fowler–Nordheim (FN) current density ( J F E ) with ϕ 0 = 4.3 eV (blue dots).
Figure 13. Natural logarithm of I L between the gate electrodes and the constriction at a bath temperature of T = 20 mK vs. the gate voltage V G measured on a titanium suspended device (Orange dots). Natural logarithm of I F E between the gate electrodes and the constriction vs. the gate voltage V G computed by integrating the Fowler–Nordheim (FN) current density ( J F E ) with ϕ 0 = 4.3 eV (blue dots).
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Figure 14. Electronic temperature T e vs. time t of a mesoscopic superconducting weak-link that periodically absorbs electrons with an energy of the order of 10 eV. The red horizontal line represents the critical temperature of the superconductor. Each electron starkly increases the electronic temperature of the system, driving it in the normal state. τ is the measurement time.
Figure 14. Electronic temperature T e vs. time t of a mesoscopic superconducting weak-link that periodically absorbs electrons with an energy of the order of 10 eV. The red horizontal line represents the critical temperature of the superconductor. Each electron starkly increases the electronic temperature of the system, driving it in the normal state. τ is the measurement time.
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Figure 15. (a,b) Combined effect of two electric fields on titanium Dayem bridges. Color plot of the normalized switching current as a function of V G 1 (x-axis) and V G 2 (y-axis) for two different devices (A and B).
Figure 15. (a,b) Combined effect of two electric fields on titanium Dayem bridges. Color plot of the normalized switching current as a function of V G 1 (x-axis) and V G 2 (y-axis) for two different devices (A and B).
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Puglia, C.; De Simoni, G.; Giazotto, F. Gate Control of Superconductivity in Mesoscopic All-Metallic Devices. Materials 2021, 14, 1243. https://doi.org/10.3390/ma14051243

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Puglia C, De Simoni G, Giazotto F. Gate Control of Superconductivity in Mesoscopic All-Metallic Devices. Materials. 2021; 14(5):1243. https://doi.org/10.3390/ma14051243

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Puglia, Claudio, Giorgio De Simoni, and Francesco Giazotto. 2021. "Gate Control of Superconductivity in Mesoscopic All-Metallic Devices" Materials 14, no. 5: 1243. https://doi.org/10.3390/ma14051243

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