A Capacitance Monitoring Strategy Based on Offset Error Compensation for Modular Multilevel Converters

Abstract

The modular multilevel converter (MMC) is a research hotspot in medium-voltage and high-voltage applications. The measurement offset error would cause an increase in the monitoring error of the submodule (SM) capacitance of the MMC, affecting the estimation accuracy of the SM capacitance monitoring. This paper proposes a capacitor monitoring strategy based on the offset error compensation, where two reasonable capacitor monitoring periods are selected in one fundamental period under the proposed voltage-balancing control (VBC) based on the virtual capacitor voltage (VCV) to compensate for the offset error impact on the capacitance monitoring. The proposed strategy can effectively eliminate the offset error impact on the capacitance monitoring, which ensures the accuracy of the SM capacitance monitoring in the MMCs. The effectiveness of the proposed monitoring strategy is confirmed by the simulations and experiments.

1. Introduction

The modular multilevel converter (MMC) has been applied in the field of medium-voltage and high-voltage applications [1,2]. In the MMC, a number of submodules are connected to comprise each arm, where a number of voltage levels are synthesized and the superior harmonic performance of the output waveforms is realized [3,4]. The advantages of the MMC include scalability, high efficiency, low harmonic content and low voltage stress [5].

Reliability is a key challenge of the MMC, which consists of numerous submodules (SMs). The numerous SM capacitors pose challenges to the MMC system’s reliability [6,7]. During the ageing process, the SM capacitance gradually decreases [8,9], which can result in deteriorated performance and even threaten reliable operation [10,11,12]. Therefore, it is critical to monitor the SM capacitance.

To date, the capacitance monitoring methods can be classified into two categories. One category is the capacitance monitoring method under non-normal operation. References [13,14] present an offline capacitance monitoring method by adding the voltage to the RC circuit, and estimation can be realized by the algorithms, such as the Newton–Raphson algorithm [13] and DFT [14]. In [15], the capacitance can be estimated under the start-up stage of the DC-side. Reference [16] estimates the capacitance by discharging the SM capacitor and analyzing the discharge curve. However, the monitored SM capacitor needs to be bypassed and out of work. In [17], the capacitance is estimated when various harmonic currents are injected in the single-phase solar inverter. However, this method is not applicable for the daytime. The above-mentioned monitoring methods cannot be applied to real-time monitoring under the normal operation of the MMC.

The other category is the monitoring method under normal operation. In [18,19], the capacitance estimation can be realized by utilizing the second-harmonic-order voltage and current of the SM capacitor. In [20,21], the monitoring method is simplified by keeping the switching signals of the reference SM and the monitoring SM identical. In [22], the estimation can be realized by utilizing the sum of switching signals. Reference [23] presents a closed-loop method, where the fundamental frequency capacitor energy is used to realize the monitoring. Reference [24] presents a monitoring method in motor drive applications, where the estimation is realized by the wavelet decomposition of the transient voltage. In [25], the monitoring is realized by integrating the voltage and current over multiple fundamental cycles. Reference [26] presents an image identification algorithm, where the parameters of the SM switching signals are not required. The above-mentioned methods hardly consider the impact of the offset error of the measurement on the capacitance monitoring.

In this paper, the offset error impact of the arm current sensor on the capacitance monitoring is analyzed, where the measurement offset error causes an increase in the error of the SM capacitance estimation, affecting the estimation accuracy of the capacitance monitoring. This paper proposes an SM capacitance monitoring strategy based on the offset error compensation, where two reasonable capacitor monitoring periods are selected in one fundamental period under the proposed voltage balance control (VBC) based on the virtual capacitor voltage (VCV) to compensate the offset error impact on the capacitance monitoring. The proposed strategy can effectively eliminate the adverse impact of the offset error on the capacitance monitoring, which effectively improves the accuracy of the SM capacitance estimation for the MMCs.

This article is organized as follows. Section 2 gives the MMC operation. Section 3 provides the analysis of the effect of the measurement offset error on the capacitance monitoring. Section 4 proposes a monitoring strategy based on the offset error compensation for MMCs. Simulation results and experiment results are, respectively, provided in Section 5 and Section 6. The conclusions are summarized in Section 7.

2. Description of MMCs

2.1. Operation Principles

Figure 1a shows the MMC, which includes the upper arms and lower arms for phase A, B and C. An inductor L_s and N SMs are included in each arm. The circuit structure of the SMi (i = 1, 2, …, N) is composed of a SM capacitor C, switches T₁, T₂ and diodes D₁, D₂, as shown in Figure 1b. The switches of the SMi are controlled by the switching signal S_aui, which can be expressed as

$$S_{aui}=\left\{\begin{array}{l}1,\hspace{1em}{T}_1 \mathrm{is} \mathrm{on} \\ 0,\hspace{1em}{T}_1 \mathrm{is} \mathrm{off} \end{array}\right.$$

(1)

The capacitor current of the SMi is

$$i_{caui}=S_{aui}\cdot i_{au}$$

(2)

where i_au is the upper arm current.

The operation mode of the SMi is determined by i_au and S_aui, which is shown in

Table 1. Operation modes of SMi.

Operation Mode	iau	Saui	ucaui
Ascending mode	>0	1	Increased
Ascending mode	>0	0	Unchanged
Descent mode	≤0	1	Decreased
Descent mode	≤0	0	Unchanged

. The ascending mode and the descent mode of the SMi are defined as shown in Table 1. Under the ascending mode of the SMi in Table 1, the current i_au > 0. As shown in Figure 1, if S_aui = 1, the capacitor voltage u_caui of the SMi is increased; if S_aui = 0, the u_caui of the SMi is unchanged. Under the descent mode of the SMi in Table 1, the arm current i_au ≤ 0. If S_aui = 1, the u_caui decreases; if S_aui = 0, the u_caui of the SMi is unchanged.

2.2. Conventional VBC

Figure 2 shows the conventional VBC [27,28,29]. The reference signal is generated based on the closed-loop control [30]. Under the modulation process, the N_i SMs should be inserted according to the reference signal.

Capacitor voltages u_cau1∼u_cauN are sorted in order from lowest to highest voltages to generate the rank list of the SMs. Then, the rank J_i (i = 1, 2 …, n) of the SMi can be obtained, where J_i = 1 if the voltage u_caui is the lowest and J_i = N if the voltage u_caui is the highest. Combining with the rank list J_i and the operation mode, the selection of N_i SMs can be achieved. In the ascending mode, the N_i SM capacitors with the rank 1∼N_i should be inserted; in the descent mode, the N_i SM capacitors with the rank N − N_i + 1∼N should be inserted. As a result, the switching signals S_au1∼S_auN in the arm can be produced and the u_cau1∼u_cauN can be kept balanced.

3. Effect Analysis of Measurement Offset Error on Capacitance Monitoring

Considering the measurement offset error, the measured value û_caui of the capacitor voltage u_caui and the measured value ${\widehat{i}}_{\mathit{au}} \mathrm{o}\mathrm{f} \mathrm{t}\mathrm{h}\mathrm{e}$ arm current i_au can be represented as

$$\left\{\begin{array}{c}{\widehat{u}}_{caui}=u_{caui}+b_{aui\_u}\\ {\widehat{i}}_{au}=i_{au}+b_{au\_i}\end{array}\right.$$

(3)

where b_{aui_u} indicates the offset error of the SM voltage sensor of the SMi and b_{au_i} indicate the offset error of the arm current sensor. u_caui is the actual capacitor voltage of the SMi. i_au is the actual arm current.

The SM capacitance C_aui shown in Figure 1b can be expressed as

$$C_{aui}=\frac{{\displaystyle \int S_{aui}\cdot i_{au}\cdot dt}}{u_{caui}-u_{caui0}}$$

(4)

where u_caui and u_caui0 are the instantaneous SM capacitor voltage and initial capacitor voltage, respectively.

According to (4), in the conventional capacitance monitoring for MMCs [19,20], the capacitance C_aui can be estimated as C_{aui_es}

$$C_{aui\_es}=\frac{{\displaystyle \int S_{aui}\cdot {\widehat{i}}_{au}\cdot dt}}{{\widehat{u}}_{caui}-{\widehat{u}}_{caui0}}$$

(5)

where ${\widehat{u}}_{caui}$ is the measured value of u_caui. ${\widehat{u}}_{caui0}$ is the measured value of u_caui0.

Due to the chemical process and aging effect, capacitance decreases quite slowly. Therefore, the capacitance is monitored once a week or month, and each SM capacitance can be monitored with a short interval [16,20]. In the short interval, the offset error b_{au_i} can be considered as a constant value. Based on (4) and (5), the difference between the capacitance C_{aui_es} and C_aui can be expressed as

$$C_{aui\_es}-C_{aui}=\frac{{\displaystyle \int S_{aui}dt}\cdot b_{au\_i}}{u_{caui}-u_{caui0}}$$

(6)

It can be seen that the measurement offset error b_{aui_u} of the SM capacitor voltage sensor does not influence the accuracy of estimation. However, the accuracy of estimated capacitance is related to the measurement offset error b_{au_i} of the current sensor. The accuracy of estimated C_{aui_es} will reduce along with the increase in |b_{au_i}|, and the accuracy of estimated C_{aui_es} will increase along with the reduction in |b_{au_i}|, as shown in

Table 2. Relationship between |b_{au_i}| and accuracy of estimated C_{aui_es}.

|bau_i|	Accuracy of Estimated Caui_es
↑	↓
↓	↑

. The symbol “↑” indicates an increase and the symbol “↓“ indicates a decrease.

Figure 3 shows the capacitance estimation error under various measurement offset error b_{au_i} and various capacitance C_aui based on (4), which is derived from the simulation model of Section 5. As shown in Section 5, under the conventional capacitance monitoring method, for the various C_aui, along with the increase in |b_{au_i}|, the error of capacitance estimation increases; along with the reduction in |b_{au_i}|, the error of capacitance estimation reduces, which is consistent with the analysis of Table 2.

4. Proposed SM Capacitance Monitoring Strategy Based on Offset Error Compensation for MMCs

4.1. Proposed Capacitance Monitoring Approach Based on Offset Error Compensation

In order to eliminate the impact of the sensor offset error b_{au_i} on the monitoring of C_aui, a capacitance monitoring approach based on the offset error compensation is proposed. Under the proposed approach, the arm current i_au, switching signal S_aui and the SM capacitor voltage u_caui for the monitored SMi in one fundamental period T are shown in Figure 4. In the proposed approach, the period t₀~t₁ of the ascending mode and the period t₂~t₃ of the descent mode in Figure 4 are selected to estimate the capacitance, where the switching signal S_aui = 1 during both the period t₀~t₁ and the period t₂~t₃.

Based on (5), the capacitance C_{aui_es1} estimated in the ascending mode t₀~t₁ and the capacitance C_{aui_es2} estimated in the descent mode t₂~t₃ can be, respectively, expressed as

$$C_{aui\_es1}=\frac{{\displaystyle {\int }_{t_0}^{t_1}{\widehat{i}}_{au}dt}}{{\widehat{u}}_{caui}(t_1)-{\widehat{u}}_{caui}(t_0)}$$

(7)

$$C_{aui\_es2}=\frac{{\displaystyle {\int }_{t_2}^{t_3}{\widehat{i}}_{au}dt}}{{\widehat{u}}_{caui}(t_3)-{\widehat{u}}_{caui}(t_2)}$$

(8)

Combining (4)~(6), Equations (7) and (8) can be, respectively, rewritten as

$${\displaystyle {\int }_{t_0}^{t_1}({\widehat{i}}_{au}-b_{au\_i})dt}=C_{aui}[{\widehat{u}}_{caui}(t_1)-{\widehat{u}}_{caui}(t_0)]$$

(9)

$$-{\displaystyle {\int }_{t_2}^{t_3}({\widehat{i}}_{au}-b_{au\_i})dt}=-C_{aui}[{\widehat{u}}_{caui}(t_3)-{\widehat{u}}_{caui}(t_2)]$$

(10)

Combining (9) and (10), the capacitance C_aui can be expressed as

$$\begin{array}{cc}{C}_{aui}& =\frac{{\displaystyle {\int }_{t_0}^{t_1}{\widehat{i}}_{au}dt}-{\displaystyle {\int }_{t_2}^{t_3}{\widehat{i}}_{au}dt}}{{\widehat{u}}_{caui}(t_1)-{\widehat{u}}_{caui}(t_0)-{\widehat{u}}_{caui}(t_3)+{\widehat{u}}_{caui}(t_2)}\\ & -\frac{[t_1-t_0-(t_3-t_2)]b_{au\_i}}{{\widehat{u}}_{caui}(t_1)-{\widehat{u}}_{caui}(t_0)-{\widehat{u}}_{caui}(t_3)+{\widehat{u}}_{caui}(t_2)}\end{array}$$

(11)

From (11), it can be observed that C_aui contains the error term caused by the measurement offset error b_{au_i}. In order to eliminate the adverse impact of the offset error b_{au_i} on the monitoring result, combining (11), a capacitance monitoring approach based on offset error compensation is proposed, where the condition (12) is satisfied.

$$t_1-t_0=t_3-t_2=\Delta t$$

(12)

Substituting (12) into (11), the capacitance C_aui can be rewritten as

$$C_{aui}=\frac{{\displaystyle {\int }_{t_0}^{t_1}{\widehat{i}}_{au}dt}-{\displaystyle {\int }_{t_2}^{t_3}{\widehat{i}}_{au}dt}}{{\widehat{u}}_{cau}(t_1)-{\widehat{u}}_{cau}(t_0)-{\widehat{u}}_{cau}(t_3)+{\widehat{u}}_{cau}(t_2)}$$

(13)

From (13), it can be seen that capacitance C_aui does not contain the error term induced by the measurement offset error b_{au_i} when the condition (12) is satisfied. Comparing (11) and (13), it can be seen that the proposed approach can eliminate the adverse impact of the offset error b_{au_i} on the result of capacitance estimation.

4.2. Proposed VCV-Based VBC

As shown in Figure 5, to achieve the proposed capacitance monitoring approach based on offset error compensation, a virtual capacitor voltage (VCV)-based VBC is proposed to choose the inserted SMs. The proposed VCV-based VBC not only ensures that the capacitor voltages remain balanced, and that u_caui does not exceed the limit, but also ensures that the switching signal for the monitored SMi is switched as few times as possible, both in the ascending mode and in the descent mode, which facilitates the selection of the periods t₀~t₁ and t₂~t₃ in Figure 4, so as to realize the proposed monitoring approach based on the offset error compensation.

The capacitor voltages should be controlled within the range of the maximum voltage U_cmax and the minimum voltage U_cmin, as shown in Figure 4. In Figure 5, the capacitance C_aui of the SMi is estimated, the inserted SMs can be determined according to the operation mode and the ranks of VCVs, as follows.

(1)

U_cmin ≤ û_caui ≤ U_cmax: the VCVs u′_cau1∼u′_cauN (except for u′_caui in the monitored SMi) are, respectively, set to û_cau1∼û_cauN (except for û_caui). For the SMi, the zero-order hold is introduced to obtain the virtual capacitor voltage u′_caui, as shown in Figure 5, which can reduce the update frequency of the voltage û_caui, and thus reduces the update frequency of the rank J_i of the SMi;

(2)

û_caui > U_cmax or û_caui < U_cmin: the VCVs u′_cau1∼u′_cauN are set to û_cau1∼û_cauN, respectively.

Based on the operation mode and the ranks of the VCVs, the selection of the inserted SMs can be decided. In the ascending mode, the N_i SM capacitors with the rank 1∼N_i should be inserted; in the descent mode, the N_i SM capacitors with the rank N − N_i + 1∼N should be inserted.

4.3. Proposed Capacitance Monitoring Strategy

According to the proposed capacitance monitoring approach based on offset error compensation in Section 4.1 and the VCV-based voltage-balancing control in Section 4.2, the capacitance monitoring strategy based on offset error compensation of the arm current sensor is proposed, where capacitance C_aui of the SMi is monitored and the proposed VCV-based voltage-balancing control is implemented, as shown in Figure 6. In the proposed strategy, the voltage u_caui of the capacitor of the SMi, the current i_au and the switching signal S_aui of the SMi should be recorded. In the ascending mode, the period t₀~t₁ is selected, where the selection criterion is the switching signal S_aui = 1 for the period t₀~t₁, as shown in Figure 4. In addition, the interval from t₀ to t₁ should be as long as possible, to improve the accuracy of capacitance monitoring. According to the selected t₀ and t₁, the Δt can be calculated by Equation (12). In the descent mode, based on the Δt and (12), the period t₂~t₃ of S_aui = 1 is selected. According to the i_au and S_aui during t₀~t₁ and t₂~t₃, u_caui(t₀), u_caui(t₁), u_caui(t₂) and u_caui(t₃), the capacitance C_aui can be estimated by Equation (13).

5. Simulation Studies

An MMC model is built by the simulation software PLECS 4.5.6 to verify the proposed strategy. The parameters are shown in

Table 3. Simulation parameters.

Simulation Parameter	Value
Active power	2 MW
Reactive power	0 MVar
Grid frequency fs	50 Hz
Number N of SMs each arm	8
Arm inductance Ls	2 mH
SM capacitor voltage Uc	0.9 kV
DC-side voltage Udc	7.2 kV

.

5.1. MMC without Measurement Offset Error b_{au_i}

Figure 7 shows the simulated waveforms of the MMC under the proposed capacitance monitoring strategy. The offset error b_{au_i} is not introduced into the measurement of the arm current i_au, where b_{au_i} = 0. Figure 7a and Figure 7b show the AC side voltages e_a, e_b, e_c and the currents i_a, i_b, i_c, respectively. Figure 7c shows the capacitor voltage u_cau1. Figure 7d shows the arm current i_au.

Under the conventional capacitance monitoring method on the basis of (4), the capacitance C_au1~C_au4 is estimated, as shown in Figure 8. Figure 8a shows the actual and estimated capacitance of C_au1~C_au4. Figure 8b shows the estimation errors of C_au1~C_au4. Under the proposed strategy, the capacitance C_au1~C_au4 is estimated, as shown in Figure 9a,b. From Figure 8 and Figure 9, it can be observed that the estimation errors are small under the conventional method and the proposed strategy when the offset error is not introduced into the measurement of the upper arm current i_au.

Without introducing the offset error b_{au_i}, comparing the MMC with and without the proposed monitoring strategy in

Table 4. Simulation results of the THD of the output current.

Measurement Error	With Proposed Strategy	THD
Without offset error bau_i	No	1.79%
Without offset error bau_i	Yes	1.79%
With offset error bau_i	No	1.77%
With offset error bau_i	Yes	1.77%

, the total harmonic distortion (THD) of the AC side current i_a is almost the same. Therefore, the proposed strategy has no effect on the MMC output waveforms.

5.2. MMC with Measurement Offset Error b_{au_i}

Figure 10 shows the simulated waveforms under the proposed strategy. The offset error is introduced into the measurement of the arm current i_au, where b_{au_i} = 27.22 A. Figure 10a and Figure 10b show the AC side voltages e_a, e_b, e_c and the currents i_a, i_b, i_c, respectively. Figure 10c shows the capacitor voltage u_cau1 in the SM1. Figure 10d shows the arm current i_au.

Under the conventional capacitance monitoring method, in Figure 11a,b, the capacitance C_au1~C_au4 is estimated. Figure 11a shows the actual and estimated capacitance of C_au1~C_au4. Figure 11b shows the estimation errors of C_au1~C_au4. Under the proposed strategy, the capacitance C_au1~C_au4 is estimated, as shown in Figure 12. Comparing the conventional capacitance monitoring method in Figure 11 and the proposed strategy in Figure 12, it can be observed that the proposed strategy effectively decreases the effect of the offset error b_{au_i} on the capacitance estimation. Additionally, the estimation errors in Figure 12b are similar to those of Figure 9b. Therefore, the capacitance monitoring results under the proposed strategy are almost unaffected by the offset error b_{au_i}.

In the case of introducing the offset error b_{au_i}, comparing the MMC with and without the proposed strategy, the THD of i_a is almost the same, as shown in Table 4. Therefore, the proposed strategy has no effect on the MMC output waveforms.

6. Experimental Studies

The MMC experimental platform is built. Figure 13 shows the MMC experimental platform, and

Table 5. Experimental parameters.

Parameter	Value
Nominal capacitor voltage Uc	40 V
DC-side voltage Udc	160 V
Number N of SMs each arm	4
Inductance Ls	3 mH
Load resistance Ro	10 Ω

shows the system parameters.

6.1. MMC without Measurement Offset Error b_{bl_i}

Figure 14 shows the simulated waveforms under the proposed capacitance monitoring strategy. The offset error b_{bl_i} is not introduced into the measurement of the arm current i_bl, where b_{bl_i} = 0. Figure 14a shows the AC side currents i_a, i_b, i_c. Figure 14b shows the current i_bl and the capacitor voltage u_cbl1 in SM1.

Under the conventional capacitance monitoring method, in Figure 15a,b, the capacitance C_bl1~C_bl4 is estimated. Figure 15a shows the actual and estimated capacitance of C_bl1~C_bl4. Figure 15b shows the estimation errors of C_bl1~C_bl4. Under the proposed strategy, the capacitance C_bl1~C_bl4 is estimated, as shown in Figure 16a,b. As shown in Figure 15 and Figure 16, the capacitance estimation errors are small under the conventional method and the proposed strategy when the offset error b_{bl_i} is not introduced into the measurement of i_bl.

Without introducing the offset error b_{bl_i}, comparing the MMC with and without the proposed strategy, the THD of the AC side current i_b is almost the same, as shown in

Table 6. Simulation results of the THD of the AC side current.

Measurement Error	With Proposed Strategy	THD
Without offset error bbl_i	No	2.85%
Without offset error bbl_i	Yes	2.85%
With offset error bbl_i	No	2.82%
With offset error bbl_i	Yes	2.84%

. Therefore, the proposed strategy has no effect on the MMC output waveforms.

6.2. MMC with Measurement Offset Error b_{bl_i}

Figure 17 shows the simulated waveforms under the proposed strategy, where the capacitance C_bl1 is monitored. The offset error b_{bl_i} is introduced into the measurement of the current i_bl, where b_{bl_i} = 0.2 A. Figure 17a shows the AC side currents i_a, i_b, i_c. Figure 17b shows the arm current i_bl and the capacitor voltage u_cbl1 in SM1.

Under the conventional capacitance monitoring method, in Figure 18a,b, the capacitance C_bl1~C_bl4 is estimated. Figure 18a shows the actual and estimated capacitance of C_bl1~C_bl4. Figure 18b shows the estimation errors of C_bl1~C_bl4. Under the proposed strategy, the capacitance C_bl1~C_bl4 is estimated, as shown in Figure 19a,b. Comparing the conventional capacitance monitoring method in Figure 18 and the proposed strategy in Figure 19, it can be observed that the adverse impact of the sensor offset error b_{bl_i} on the capacitance estimation can be decreased by the proposed strategy. Additionally, the estimation errors in Figure 19b are similar to those of Figure 16b. Therefore, the capacitance monitoring results under the proposed capacitance monitoring strategy based on offset error compensation of the arm current sensor are almost unaffected by the offset error b_{bl_i}.

In the case of introducing the offset error b_{bl_i}, comparing the MMC with and without the proposed strategy, the THD of i_b is almost the same, as shown in Table 6. Therefore, the proposed strategy has no effect on the MMC output waveforms.

7. Discussion

Combining the simulation results of Figure 8, Figure 11 and Figure 12 in the simulation studies, and comparing the MMC without the offset error under the conventional capacitance monitoring method, the increased estimation errors for the MMC with the offset error under the conventional method and proposed strategy are shown in Figure 20a. According to Figure 20a, comparing the conventional method, the proportion of the decreased estimation error under the proposed strategy is shown in Figure 20b.

Combining the experimental results of Figure 15, Figure 18 and Figure 19 in the experimental studies, and comparing the MMC without the offset error under the conventional capacitance monitoring method, the increased estimation errors for the MMC with the offset error under the conventional method and proposed strategy are shown in Figure 21a. According to Figure 21a, comparing the conventional method, the proportion of the decreased estimation error under the proposed strategy is shown in Figure 21b.

As shown in Figure 20 and Figure 21, it can be seen that the proportion of the decreased estimation error is greater than 90% under the proposed strategy in the simulation and experimental results. Therefore, according to the simulation and experimental results, the proposed strategy eliminates more than 90% of the estimation error caused by the offset error.

8. Conclusions

In this paper, the effect of the measurement offset error of the arm current sensor on the capacitance monitoring of the MMC is analyzed, where the measurement offset error causes the increase in the estimation error in the estimation of the SM capacitance, affecting the capacitance monitoring accuracy. A capacitor monitoring strategy based on offset error compensation is proposed, where two reasonable capacitor monitoring periods are selected in one fundamental period under the proposed VCV-based VBC to compensate for the offset error’s impact on the capacitance estimation. The proposed strategy eliminates more than 90% of the estimation error caused by the offset error in the simulation and experimental results. Therefore, the proposed strategy almost eliminates the adverse impact of the offset error of the arm current sensor on the capacitance monitoring and ensures low estimation errors for the SM capacitance monitoring. Simulation and experiment results are conducted to confirm the effectiveness of the proposed strategy.