1. Introduction
A DC–AC power inverter is a key component in the electrical power system. Adjustable speed drives [
1], uninterruptible power supplies [
2], active power filtering [
3], electric vehicles [
4], and the integration of renewable energy generation in power systems [
5] are some areas where DC–AC inverters are deployed.
Conventionally, the six-switch (B6) inverter is utilized [
6,
7,
8,
9,
10,
11,
12]. However, interest has increased in utilizing inverters with higher efficiency, better performance, and lower costs. In so doing, a four-switch (B4) inverter was proposed by Broeck and Wyk in 1984 [
13], where one inverter leg is replaced by two DC link series tapped capacitors, hence reducing the power switches from six to four.
B4 inverters have been deployed in a wide range of applications, including three-phase [
14,
15] and two-phase [
16] induction motor drives, brushless DC [
17] and AC [
18] motor drives, permanent magnet synchronous motor drives [
19,
20], synchronous reluctance motor drives [
21], doubly fed induction generators [
22], shunt active power filters [
23], and grid-connected applications [
24].
Reducing the number of power switches results in a more robust and reliable inverter with a low computational burden on the controller side. In addition, the number of gate drives along with interfacing circuitry is reduced [
25]. It is claimed that reducing the number of switching devices from six to four reduces the cost of the converter along with decreasing the switching and conduction losses, thereby increasing inverter efficiency [
26].
Since one inverter leg is removed, one phase must be connected to the center point of the two DC side series capacitors. This connection results in capacitor voltage imbalance, requiring high DC capacitance—leading to increased inverter costs and the utilization of undesirable (low-reliability) electrolytic capacitors [
27].
However, DC link voltage utilization is reduced to 50% even when space vector modulation (SVM) is utilized [
28]. Additionally, the available switch (states) combinations are reduced from eight (in B6 inverter) to four (in B4 inverter) without a zero-voltage vector [
29].
To maintain the same output voltage, the DC link voltage must be doubled. Increasing the DC link side voltage dictates the use of switching devices with higher ratings [
30]. Moreover, for adjustable speed drives, an increase in stress on motor winding is expected as a result of raising the DC link voltage [
31]. Additionally, switching losses depend on the voltage, hence an increase in switching losses may be expected despite using fewer switches.
Higher-voltage-rated power semiconductor devices not only implies slower responses with lower overall efficiency but also higher costs and greater size [
32]. Thus, multilevel inverters, particularly neutral-point diode-clamped inverters (NPC), become a viable solution [
33]. Typically, multilevel inverters are used in medium-voltage high-power applications [
34]. They offer lower voltage harmonics along with less electromagnetic interference. In addition, lower-voltage-rated switches are used hence reducing
dv/dt [
35].
The eight-switch (B8) inverter, which emerged as the post-fault reconfiguration of the conventional NPC inverter, is considered a potentially cost-effective inverter [
36,
37]. Compared with the B6 inverter, the B8 inverter has the merit of offering three-level operation, only with two extra switches [
38,
39], and hence better performance with an expected slightly higher cost.
On the other hand, the B8 inverter utilizes eight switches, which is double the number of power semiconductors in the B4 inverter; however, lower-voltage-rated switches are deployed [
40,
41]. Hence, the B8 inverter allows a series connection of fast, low-voltage, and efficient switches, but with the penalty of an increased number of gate drives and clamping diodes [
42,
43]. Increasing the number of switches in the B8 inverter results in nine different voltage vectors as opposed to four voltage vectors in the B4 inverter. Importantly, a zero-voltage vector is available in the B8 inverter (being particularly useful for common mode voltage control) which is absent in the B4 inverter [
44,
45,
46,
47].
There has not been any assessments comparing the performance of the B8 with the B6 inverter or with the B4 inverter. Furthermore, there is no thorough comparison between the B4 and B6 inverters. This paper presents a comprehensive comparative review to assess the performance and cost of three power inverters, namely the B6, B4, and B8 inverters, for applications below ≈3.3 kV ac.
This paper is organized as follows:
Section 2 sheds light on the operation of the conventional six-switch (B6) inverter.
Section 3 studies the reduced-cost four-switch (B4) inverter, highlighting the available voltage vectors, SVM operation, and the generation of zero voltage vector.
Section 4 considers the NPC eight switch (B8) inverter illustrating its configuration, operation, and control. A comprehensive comparison between the three inverters is presented in
Section 5, along with guidelines to properly select a suitable power inverter based on the application. Finally, conclusions and suggestions for future research are given in
Section 6 and
Section 7, respectively.
2. Six Switch (B6) Inverter
Figure 1 shows the circuit diagram of a conventional six-switch, or the B6, inverter.
The two series switches in each leg are normally complementary, at least so that no two series switches are on simultaneously, to avoid a DC supply short circuit.
The balanced three-phase voltages
are described via (1):
where
x represents the phase (
a,
b, and
c).
The inverter voltage with respect to the reference,
o, is as follows:
with
representing the state of the switch; 1 is for the ON state and 0 is for the OFF state.
Therefore, from (1) and (2),
(which represents the common mode voltage, CMV) is defined via the following:
Combining (1)–(3), the balanced three-phase load voltages in matrix form are given via (4):
Generally, SVM is utilized to control the switches, thus generating the required balanced three-phase load voltages. SVM maximizes DC link voltage utilization, and also has lower switching losses and total harmonic distortion than those in conventional sinusoidal pulse width modulation.
To implement the SVM control approach, the three-phase voltages in
abc co-ordinates are transformed into a two-phase
αβ co-ordinate system using Clarke’s transformation, which is described via (5):
where the factor
is used to maintain constant output voltage magnitude.
The magnitude of the reference voltage along with its angle are defined via (6) and (7), respectively:
The B6 inverter has eight switch states (six active states and two zero states) which are utilized to generate the required balanced three-phase load voltages.
Figure 2 shows the active switch states along with the voltage sectors, while
Table 1 summarizes the output of the eight possible switch combinations along with the corresponding CMV.
The three-phase balanced voltages are represented by a rotating vector when transformed to the space vector domain. Hence, the required balanced three-phase load voltages are transformed from abc co-ordinates into αβ co-ordinates via (5) and then represented by a rotating vector using (6) and (7). Depending on the location of the reference voltage, the sector is determined and hence the proper switch states are deployed. The reference voltage is synthesized using two adjacent active voltage vectors and the two zero vectors.
To determine the time of each switch state, the volt second equation, defined by (8), must be satisfied.
where
is the sampling time,
and
represent the two adjacent active vectors, with times
and
respectively, while
represents the zero vector with time
. The switch times
,
, and
are defined via (9)–(11), respectively:
where
m is the sector
Table 2 summarizes the switch times for switches
,
, and
, where these times are compared with a carrier signal of amplitude,
, to generate the required gating pulses.
From
Figure 2 (according to the radius of the largest circle inscribed in the hexagon), the maximum output phase voltage (in the linear modulation region) which can be synthesized using SVM for the B6 inverter is
Vdc/√3.
5. Comparison between the B6, B4, and B8 Inverters
This section presents a comprehensive comparison between the three inverters, viz the conventional six-switch (B6) inverter, the reduced switch count four-switch (B4) inverter, and the eight-switch (B8) NPC inverter. The comparison covers aspects including DC link voltage utilization, switch ratings, losses, cost, and performance.
Table 7 illustrates the parameters of the simulation model. The Simulink model for the B4 inverter, as an example, is illustrated in
Appendix A. Results are demonstrated in
Figure 7.
The DC link voltage of the B6 inverter is 600 V since the DC link voltage utilization of the B4 and the B8 inverters is half that for the B6 inverter. Therefore, a 1200 V DC link is utilized for the B4 and the B8 inverters to attain the same output voltage.
Figure 7a shows the three-phase load currents for the three inverters, where B6 has the best current quality with 2.38% total harmonic distortion (THD). However, using a 1200 V DC link voltage for the B4 inverter increases the THD to 5.95%. Introducing a three-level operation for the B8 inverter reduces the THD to 3.41% (which is still higher than that of the B6 inverter as a result of the need to double the DC link voltage).
Figure 7b shows the harmonic content for the three inverters, while
Figure 7c shows the pole voltage for the three inverters. The voltage harmonic spectrum is demonstrated in
Figure 7d. Investigating the voltage harmonic spectrum is crucial to identify which harmonic order has the highest magnitude. This guides the designer in selecting the appropriate passive filter in grid-connected applications [
48].
Since CMV is an important factor [
49,
50] for three-phase inverters (particular when feeding electrical machines), it is highlighted in
Figure 7e. The B6 inverter has a CMV of
. Since the DC link voltage is 600 V for the B6 inverter, the CMV is
. The CMV for the B4 and the B8 inverters is
, specifically
400 V, since the DC link voltage is doubled.
The performance of the three inverters is investigated at half the load given in
Table 7 with the results in
Figure 8. Balanced three-phase currents are achieved with the three inverters as shown in
Figure 8a. The current harmonic content is demonstrated in
Figure 8b. As expected, reducing the load (while maintaining the same switching frequency) increases the THD. However, still, the B6 inverter has the lowest THD, at 4.57%, followed by the B8 inverter, at 6.54% and finally, the B4 inverter with the highest THD, at 11.48%. Phase voltage is shown in
Figure 8c with the voltage harmonics illustrated in
Figure 8d. Finally, CMV is highlighted in
Figure 8e.
For a comprehensive comparison, the switching losses and conduction losses of the three inverters must be assessed [
51,
52].
Table 8 illustrates the main specifications of the utilized power switches. All switches are IXYZ—the same technology.
The power MOSFET conduction loss is as follows:
where
is the drain-source on-state resistance and
is the load rms current.
The conduction loss can be calculated using the drain-source on-state resistance which is obtained from the datasheet, as in
Table 8 with the B4 inverter utilizing four 1200 V switches. The B6 and B8 inverters utilize six and eight 600 V switches, respectively. Using (27), and for the same rms current, the conduction losses of the B4 and B8 inverters with respect to the B6 inverter are 1.56 and 1.33, respectively.
Switching losses arise during switch turn on/off, where the losses depend on the drain-source voltage (), load current (), switching frequency (), and the turn-on/off times (, respectively) (losses in clamping diodes are neglected as fast Schottky devices are deployed).
Equation (28) defines the switching losses assuming a linear voltage/current switching behavior.
For the same switching frequency and load current, the switching losses of the B4 and B8 inverters with respect to the B6 inverter are in the ratio of 3.3:1 and 1.33:1, respectively. Since the B8 inverter uses the same switch ratings as the B6 inverter, a 33% increase in the switching and conduction losses is expected as a result of requiring two extra switches (neglecting losses in clamping diodes as fast Schottky devices can be deployed), while the B4 inverter requires fewer switches. However, the increase in the switch voltage rating results in an increase in switching and conduction losses.
Converter efficiency is calculated as follows:
The three inverters feed a 13.5 kW load. Based on (27)–(29), the efficiencies of the B6, B8, and B4 inverters are 97.0%, 96.1%, and 95.5%, respectively. This reveals that the B6 inverter has the best efficiency, followed by the B8 inverter, with the B4 inverter coming last. This is expected as the B4 inverter has the highest switching and conduction losses as a result of deploying slow, higher-voltage power semiconductor devices. Subsequently, the B4 inverter requires a larger heat sink followed by B8 and finally the B6 inverter.
To extend the inverter performance study,
Figure 9 investigates the efficiency and THD at different power levels.
Figure 9a shows the efficiency at different converter output powers. At low output power levels, the switching and conduction losses are minimal as the load current is reduced, hence the efficiency is high. Increasing the load power results in an increase in current and thereby switching and conduction losses result in efficiency degradation. Furthermore,
Figure 9a reveals that at all power levels the B6 inverter has the highest efficiency, while the B4 has the lowest.
Since THD is an important performance aspect,
Figure 9b studies the variation in THD for the three inverters at different output power levels with the same switching frequency. As expected, the B6 inverter has the best performance with the lowest THD, followed by the B8 inverter, and then the B4 inverter. All the results are at the same switching frequency, for a valid comparison. At light loads with low currents, the THD increases as expected.
The previous results presented the performance of the three inverters when feeding a static RL load, so to further investigate inverter performance, a dynamic load is required. An induction motor (IM), with the parameters in
Table 9, is used as the dynamic load. The switching frequency is the same as that for previous results (2.75 kHz).
The performance of the three inverters is demonstrated in
Figure 10. The three-phase stator currents are shown in
Figure 10a from the instant of IM starting until the steady state. Direct on-line starting is applied, which justifies the high starting current. The current harmonic spectrum is illustrated in
Figure 10b. As expected, the B6 inverter has the lowest THD, at 2.57%, while the B4 inverter recorded the lowest THD, at 6.22%. The three-level operation of the B8 inverter improves the THD to 3.66%, compared to the B4 inverter; however, its performance is not better than that of the B6 inverter due to the higher DC link voltage.
All the previous results are obtained at the same low switching frequency (2.75 kHz). In order to illustrate the switching frequency effect on inverter performance, the IM load, with the parameters in
Table 9, is fed from the three inverters operating at a 5 kHz switching frequency. Results are seen in
Figure 11.
Balanced three-phase stator currents are achieved in the steady state by the three inverters, as shown in
Figure 11a. Increasing the switching frequency improves the current quality as highlighted in
Figure 11b, where a reduction in THD is recorded for all the three inverters, when a 5 kHz switching frequency is deployed as opposed to that of 2.75 kHz. The results are given in
Figure 10. Additionally, as expected, the B6 inverter still offers the best performance with the lowest THD among the three inverters at 1.41%, followed by the B8 inverter, at 2.01%, and finally the B4 inverter, at 3.42%.
For critical applications, reliability is of prime importance [
53]. Reliability could be defined as the ability of a component to function properly for a period of time without failure. In power inverters, semiconductor devices and particularly DC link electrolytic capacitors are items prone to failure. Electrolytic-type capacitors tend to be avoided, at the expense of increased costs. Due to the switching and conduction losses in power semiconductor devices, where energy is dissipated in the form of heat, a rise in junction temperature is expected. The variation in junction temperature leads to thermomechanical stress which can result in device failure. Furthermore, gate drive circuit failure will result in converter malfunction. With the B8 inverter being composed of eight power switches, four clamping diodes and eight gate drivers, the probability of converter failure is higher. On the other hand, the B4 inverter has only four power switches and gate drivers; hence, it has the highest reliability among the three inverters from the power semiconductor device’s point of view.
Since the B4 inverter operates with a DC link voltage that is twice that of a corresponding B6/B8 inverter, the voltage rating of B4 power semiconductor devices is higher, resulting in higher switching and conduction losses. If the generated heat energy is not efficiently dissipated via the proper selection of switches, and heat sink design, the B4 inverter will be more prone to failure.
On the other hand, both the B4 and B8 inverters connect one of the phases to the center point of the DC link capacitor, resulting in capacitor voltage ripple. This capacitor voltage ripple (hence current ripple) suggests that B4 and B8 DC link capacitors are more prone to failure than is the B6 inverter capacitor.
Generally, four approaches could be implemented to improve power inverter reliability, specifically utilizing robust components in a better-cooled environment, continuous monitoring and control, utilizing advanced power semiconductor devices, specifically wide-bandgap GaN and SiC devices, and finally increasing inverter redundancy by utilizing extras switches to reconfigure the inverter in case of switch failure.
Table 10 gives a comprehensive comparison between B6, B4, and B8 inverters.
Figure 12 summarizes the comparison between the B6, B4, and B8 inverters in terms of seven aspects, namely cost effectiveness, compactness, converter simplicity, computational speed, efficiency, THD, and CMV. Each aspect is scaled from 1 to 10.