Compensation-Voltage-Injection-Based Neutral-Point Voltage Fluctuation Suppression Method for NPC Converters ^†

Abstract

Three-level neutral-point clamped (NPC) inverters are widely used in the new energy power generation, motor drive, and many other occasions. However, the neutral-point voltage imbalance of an NPC inverter will affect the output of the inverter system, and the control of the neutral point voltage has become a popular research topic. In this paper, a compensation-voltage-injection-based neutral-point voltage balancing method is proposed. During the switching cycle, the average value model of the neutral-point current under different voltage vectors is applied to calculate the value of the compensation voltage that needs to be injected. The self-balance of the neutral-point voltage based on a switching cycle is realized, and the influence of modulation ratio and power factor on equalization ability is discussed. A MATLAB/Simulink simulation model and a small power prototype are established to verify the effectiveness of the method, and the simulation and experimental results show that the proposed method can effectively suppress the neutral-point voltage fluctuation in a wide range of modulation ratios and power factors.

1. Introduction

Compared with the two-level inverter, the three-level neutral-point-clamped (NPC) [1,2] inverter has the advantages of less switching stress and less harmonic content of output voltage. It is widely used in the new energy power generation, active power filter (APF), flexible AC transmission system (FACTS), motor drive, and other medium high-voltage, high-power occasions.

However, there is a key technical problem in this topology, which is the balance of the neutral-point voltage [3]. This topology requires two capacitors in series on the DC side to output three levels of phase voltage on the AC side. Under ideal conditions, the voltage of each capacitor is half the voltage of the DC bus. However, there will be current flowing out of the neutral point, causing voltage fluctuation. The unbalance of neutral-point voltage results in low-frequency harmonics in the output voltage, which reduces the waveform quality of the output voltage. At the same time, the voltage stress of the power switching device is inconsistent, which may damage the switching device and affect the normal operation of the system [4]. Therefore, capacitor voltage balance control becomes one of the key points in the research of three-level NPC inverters.

To solve this problem, many hardware methods such as increasing the capacitance value or replacing the capacitor with a DC source can effectively reduce or even eliminate the fluctuation of the neutral-point voltage. This problem can also be ameliorated by modifying the modulation strategy, which greatly reduces the cost and volume of the system compared with the hardware methods. Many scholars have studied the balance control of capacitor voltage in NPC inverters. The proposed balance control method can be summarized as a space vector pulse width modulation (SVPWM) method and a carrier-based pulse width modulation (CBPWM) method [5,6,7]. The former usually adopts the method of adjusting the action time of a pair of redundant small vectors to adjust the neutral-point voltage under the condition of keeping the output line voltage unchanged [8,9], while the latter mostly adopts the method of injecting compensation voltage to realize the balance of capacitor voltage [10,11,12].

Refs. [13,14] proposed a hybrid modulation technique of virtual SVPWM and SVPWM. SVPWM is used when the neutral-point voltage is balanced; otherwise, virtual SVPWM is used. However, under the conditions of high-modulation ratio and low-power factor, the proportion of virtual SVPWM exceeds 80%. The switching loss of virtual SVPWM is much larger than that of CBPWM or SVPWM, so virtual SVPWM can balance the midpoint voltage, but it will bring huge switching losses.

Refs. [15,16] proposed proportional integral (PI)-based regulation. The control method of the capacitor can suppress the DC voltage deviation and reduce the low-frequency fluctuation through PI parameter matching, but the instantaneous control effect of voltage balancing regulation is weakened when the load changes. According to the SVPWM principle of nearest three vector (NTV), a CBPWM voltage balancing control strategy with zero-sequence component injection is proposed in [17]. This method can reduce the switching loss and reduce the low-frequency oscillation of neutral-point voltage in a certain range of working conditions, but it sacrifices the quality of AC output waveform.

Ref. [18] proposed an algebraic modulation strategy using a math model to transform the gate signal into a general modulation matrix solution with three free parameters. By designing free parameters and arranging switching patterns, the neutral-point voltage is achieved without any other controllers. Ref. [19] used low common-mode voltage vectors to generate a PWM signal. The neutral-point current was controlled by selecting limited vectors and modulation mode. The leakage current was suppressed during the balancing process.

In [20], a harmonic voltage-injection-based DC-Link imbalance compensation technique method was proposed. The offset voltage consisted of double the frequency harmonic and the voltage difference of the two DC capacitors. Ref. [21] found that the amplitude of neutral-point voltage fluctuation was a function of load current amplitude, power angle, and modulation ratio. In [22], an offset voltage injection based on a modified min–max function was proposed. The min–max function limited the modulation ratio, and a further adjustable voltage signal of the difference of capacitor voltage was added to balance the neutral-point voltage.

In this paper, a compensation voltage injection method in a switching cycle based on CBPWM is proposed. By analyzing the neutral-point current under different voltage vectors, an average model of neutral-point current and voltage fluctuation is built to estimate the relationship between the voltage fluctuation and the load current, and the expected compensation voltage is calculated to minimize the fluctuation. Compared to the method of adjusting the voltage vectors to suppress the fluctuation, the compensation voltage injection based on the switching cycle method has a better suppression extent and a faster response. The influence of modulation ratio and power factor is analyzed, and the voltage can be self-equalized within a switching cycle in a wide range of modulation ratios and power factors. The simulation model on MATLAB/Simulink and a small power prototype are established to verify the effectiveness of the proposed method.

2. Analysis and Modeling of Neutral-Point Voltage Fluctuation

2.1. Principle of Modulation Strategy for NPC Inverter

Figure 1 shows the topology of a three-phase, three-level NPC inverter, with each phase arm consisting of four switching tubes and two clamped diodes. $C_1$ and $C_2$ are bus capacitors, and $U_{dc}$ is the DC source voltage. The switching variable $S_a$, $S_b$, and $S_c$ are defined as the bridge arm output level state of phase a, b, and c.

Table 1. Output levels and switching states.

${\mathit{u}}_{\mathit{a}\mathit{o}}$	${\mathit{Q}}_1$	${\mathit{Q}}_2$	${\mathit{Q}}_3$	${\mathit{Q}}_4$	${\mathit{S}}_{\mathit{a}}$
$+U_{dc}$/2	ON	ON	OFF	OFF	1
0	OFF	ON	ON	OFF	0
$-U_{dc}$/2	OFF	OFF	ON	ON	−1

shows the corresponding relationship between the output voltage $u_{ao}$ and the switching state variable $S_a$.

The output level state of a three-phase three-level inverter is a combination of $S_a$, $S_b$, and $S_c$, so there are 27 kinds of switching status, known as 27 voltage vectors. Figure 2 shows the corresponding relationships of 27 space vectors in the vector diagram.

Under different voltage vectors, the NPC circuit topology is different due to the influence of voltage on the neutral point. The 27 voltage vectors in Figure 2 are generally divided into four categories. A typical example of how voltage vectors influence the neutral-point current is shown in Figure 3 in each category.

Based on Figure 2 and Figure 3, 6 of 27 vectors are large vectors (PPN, PNN, PNP, NPP, NPN, NNP), which have no influence on the neutral-point voltage; 3 of 27 vectors are zero vectors (PPP, OOO, NNN), which will also cause no current to flow in or flow out from the neutral point; and 12 small vectors (POO PPO…) and 6 medium vectors (PON, OPN…) will cause current to flow into or out from the neutral point, thus causing the voltage fluctuation. According to the reference direction of neutral-point current $i_o$ and load current $i_a$, $i_b$, and $i_c$ shown in Figure 3, the relationship between $i_o$ and $i_a$, $i_b$, $i_c$ under switching status of medium vectors and small vectors is shown in

Table 2. Relationship between voltage vectors and neutral-point current.

Vector	${\mathit{i}}_{\mathit{o}}$	Vector	${\mathit{i}}_{\mathit{o}}$	Vector	${\mathit{i}}_{\mathit{o}}$
ONN	$-i_a$	POO	$i_a$	ONP	$-i_a$
POP	$-i_b$	ONO	$i_b$	PON	$-i_b$
NNO	$-i_c$	OOP	$i_c$	PNO	$-i_c$
OPP	$-i_a$	NOO	$i_a$	OPN	$-i_a$
NON	$-i_b$	OPO	$i_b$	NOP	$-i_b$
PPO	$-i_c$	OON	$i_c$	NPO	$-i_c$

.

2.2. Modeling of Neutral-Point Voltage Fluctuation

As shown in Figure 1, according to the circuit principle we have the formula:

$$\left\{\begin{array}{l}\begin{array}{l}{i}_{\mathrm{dc}1}=C_1\frac{\mathrm{d}{u}_{\mathrm{dc}1}}{\mathrm{d}t}\hfill \\ i_{\mathrm{dc}2}=C_2\frac{\mathrm{d}{u}_{\mathrm{dc}2}}{\mathrm{d}t}\hfill \\ \begin{array}{l}{i}_{\mathrm{o}}=i_{\mathrm{dc}2}-i_{\mathrm{dc}1}\\ \Delta U=\frac{u_{\mathrm{dc}1}-u_{\mathrm{dc}2}}{2}\end{array}\hfill \end{array}\\ \mathrm{d}{u}_{\mathrm{dc}1}+\mathrm{d}{u}_{\mathrm{dc}2}=0\end{array}\right.$$

(1)

Assuming that $C_1$ = $C_2$ = $C$, we thus acquire the voltage fluctuation of the neutral point:

$$\Delta U=\frac{1}{2}\frac{{\displaystyle \int i_{o}dt}}{C}$$

(2)

According to (2), the fluctuation of the neutral-point voltage is related to the direction and value of $i_o$. During a switching period, the switching status is usually a process of vectors changing among large vectors, medium vectors, and small vectors. As can be seen from Table 2, $i_o$ depends on the switching state and the magnitude and direction of the load current. To analyze the switching states, firstly, suppose a set of modulation signals are given as (3) and ideal current output as (4):

$$\left\{\begin{array}{c}{u}_{\mathrm{a}}=m\cos (\omega t)\\ u_{\mathrm{b}}=m\cos (\omega t-\frac{2}{3}\mathsf{\pi })\\ u_{\mathrm{c}}=m\cos (\omega t+\frac{2}{3}\mathsf{\pi })\end{array}\right.$$

(3)

$$\left\{\begin{array}{c}{i}_{\mathrm{a}}=I\cos (\omega t-\phi )\\ i_{\mathrm{b}}=I\cos (\omega t-\frac{2}{3}\mathsf{\pi }-\phi )\\ i_{\mathrm{c}}=I\cos (\omega t+\frac{2}{3}\mathsf{\pi }-\phi )\end{array}\right.$$

(4)

where m is the modulation ratio, I is the amplitude of the output current, and $\phi$ is the power angle. Under the modulation wave of (3), the generation process and the neutral-point current of a certain period is shown in Figure 4.

From Figure 4, it can be seen that there are 4 states (OOO, OON, PON, PNP) during this switching cycle under CBPWM. For each switching period, $d_a$, $d_b$, $d_c$ respectively represent the time when $S_a$, $S_b$, $S_c$ are not equal to 0. For the switching status of OON, $i_o$ = $i_c$, and the duration is $d_c-d_a$; for the switching status of PON, $i_o$ = $-i_b$, and the duration is $d_a-d_b$; for the switching status of OOO and PPN, $i_o$ = 0, and the duration is $1-d_c+d_b$. So, we can obtain the neutral-point fluctuation based on (2) during this switching period:

$$\Delta U=\frac{1}{2C}({\displaystyle \underset{d_{\mathrm{c}}-d_{\mathrm{a}}}{\int }{i}_{\mathrm{a}}\mathrm{d}t}+{\displaystyle \underset{d_{\mathrm{a}}-d_{\mathrm{b}}}{\int }-i_{\mathrm{b}}\mathrm{d}t}+{\displaystyle \underset{1-d_{\mathrm{c}}+d_{\mathrm{b}}}{\int }0\mathrm{d}t})$$

(5)

Suppose that the switching cycle is relatively short enough; thus, there is very little change of reference signal and load current during one switching cycle, and it can be assumed that both remain constant during one switching cycle. Thus, the following assumptions can be made:

$$\left\{\begin{array}{l}{u}_{\mathrm{a}}={\langle u_{\mathrm{a}}\rangle }_{T_{\mathrm{s}}}\hfill \\ {\displaystyle \underset{{}_{T_{\mathrm{s}}}}{\int }{u}_{\mathrm{a}}dt={\langle u_{\mathrm{a}}\rangle }_{T_{\mathrm{s}}}•T_{\mathrm{s}}=u_{\mathrm{a}}•T_{\mathrm{s}}}\hfill \\ d_{\mathrm{a}}=\left|u_{\mathrm{a}}\right|=u_{\mathrm{a}}•sign(u_{\mathrm{a}})\hfill \end{array}\right.$$

(6)

where ${〈u_{\mathrm{a}}〉}_{T_s}$ means the average value of $u_{\mathrm{a}}$ during a switching period of $T_{\mathrm{s}}$, $sign\left(u_{\mathrm{a}}\right)$ means the positivity or negativity of $u_{\mathrm{a}}$. According to Figure 4, the voltage variation can be calculated:

$$\Delta U=\frac{1}{2C}[(d_{\mathrm{a}}-d_{\mathrm{c}})T_{\mathrm{s}}{i}_{\mathrm{a}}+(d_{\mathrm{c}}-d_{\mathrm{b}})T_{\mathrm{s}}(-i_{\mathrm{b}})]$$

(7)

Combining (6) and (7), the voltage variation can be replace with:

$$\Delta U=\frac{1}{2C}{\displaystyle \underset{T_{\mathrm{s}}}{\int }{u}_{\mathrm{a}}{i}_{\mathrm{a}}\mathrm{s}ign(u_{\mathrm{a}})+}{u}_{\mathrm{b}}{i}_{\mathrm{b}}\mathrm{s}ign(u_{\mathrm{b}})+u_{\mathrm{c}}{i}_{\mathrm{c}}\mathrm{s}ign(u_{\mathrm{c}})\mathrm{d}t$$

(8)

More generally, it can be found that (8) not only applies to the switching state in Figure 4, but also to every switching period based on CBPWM modulation.

Figure 5 is a simple simulation verification for (8) during a power frequency cycle. It can be seen that there are only very few discretization errors in each switching cycle.

3. Proposed Voltage Fluctuation Suppression Method

3.1. Switching-Cycle-Based Compensation Voltage Injection Method

From (8), we can see that during one switching cycle, the voltage variation is the function of voltage reference and load current. If a compensation signal $u_{\mathrm{c}\mathrm{o}\mathrm{m}}$ is injected into the three-phase reference voltage, then the voltage variation during one switching cycle will be:

$$\begin{array}{cc}\Delta U& =\frac{1}{2C}{\displaystyle \underset{T_{\mathrm{s}}}{\int }(u_{\mathrm{a}}+u_{\mathrm{com}})i_{\mathrm{a}}\mathrm{s}ign(u_{\mathrm{a}}+u_{\mathrm{com}})+}(u_{\mathrm{b}}+u_{\mathrm{com}})i_{\mathrm{b}}\mathrm{s}ign(u_{\mathrm{b}}+u_{\mathrm{com}})\\ & +(u_{\mathrm{c}}+u_{\mathrm{com}})i_{\mathrm{c}}\mathrm{s}ign(u_{\mathrm{c}}+u_{\mathrm{com}})\mathrm{d}t\end{array}$$

(9)

To minimize the neutral-point voltage fluctuation, one effective method is to minimize voltage variation within each switching cycle, which means minimizing the absolute value of $\Delta U$. Considering $\Delta U=0$, we can solve (9) and obtain:

$$\left\{\begin{array}{c}{u}_{\mathrm{com}}=-\frac{A}{B}\\ A=u_{\mathrm{a}}{i}_{\mathrm{a}}\mathrm{s}ign(u_{\mathrm{a}}+u_{\mathrm{com}})+u_{\mathrm{b}}{i}_{\mathrm{b}}\mathrm{s}ign(u_{\mathrm{b}}+u_{\mathrm{com}})+u_{\mathrm{c}}{i}_{\mathrm{c}}\mathrm{s}ign(u_{\mathrm{c}}+u_{\mathrm{com}})\\ B=i_{\mathrm{a}}\mathrm{s}ign(u_{\mathrm{a}}+u_{\mathrm{com}})+i_{\mathrm{b}}\mathrm{s}ign(u_{\mathrm{b}}+u_{\mathrm{com}})+i_{\mathrm{c}}\mathrm{s}ign(u_{\mathrm{c}}+u_{\mathrm{com}})\end{array}\right.$$

(10)

As for (9), the key to solving this equation is whether the value of sign function changes after adding $u_{\mathrm{c}\mathrm{o}\mathrm{m}}$ to $u_{\mathrm{a}\mathrm{b}\mathrm{c}}$. In general, the case of sign function change after $u_{\mathrm{c}\mathrm{o}\mathrm{m}}$ is added to $u_{\mathrm{a}\mathrm{b}\mathrm{c}}$ occurs on the signal which is closest to 0. Therefore, to solve (10), firstly, suppose the value of “sign” function does not change after compensation of $u_{\mathrm{c}\mathrm{o}\mathrm{m}}$, thus, (10) can be solved as in (11):

$$\left\{\begin{array}{c}{u}_{\mathrm{com}}=-\frac{A}{B}\\ A=u_{\mathrm{a}}{i}_{\mathrm{a}}\mathrm{s}ign(u_{\mathrm{a}})+u_{\mathrm{b}}{i}_{\mathrm{b}}\mathrm{s}ign(u_{\mathrm{b}})+u_{\mathrm{c}}{i}_{\mathrm{c}}\mathrm{s}ign(u_{\mathrm{c}})\\ B=i_{\mathrm{a}}\mathrm{s}ign(u_{\mathrm{a}})+i_{\mathrm{b}}\mathrm{s}ign(u_{\mathrm{b}})+i_{\mathrm{c}}\mathrm{s}ign(u_{\mathrm{c}})\end{array}\right.$$

(11)

Then, sort $u_{\mathrm{a}}$, $u_{\mathrm{b}}$, and $u_{\mathrm{c}}$ as $u_{\mathrm{m}\mathrm{i}\mathrm{n}}$, $u_{\mathrm{m}\mathrm{i}\mathrm{d}}$, and $u_{\mathrm{m}\mathrm{a}\mathrm{x}}$. Substitute the value of $u_{\mathrm{c}\mathrm{o}\mathrm{m}}$ into ${sign(u}_{\mathrm{m}\mathrm{i}\mathrm{d}}+u_{\mathrm{c}\mathrm{o}\mathrm{m}})$ to check whether it changes after compensation. If not, then the value of $u_{\mathrm{c}\mathrm{o}\mathrm{m}}$ is the correct compensation voltage signal need to inject into the reference signal. If the value of sign function has changed, then ${sign(u}_{\mathrm{m}\mathrm{i}\mathrm{d}}+u_{\mathrm{c}\mathrm{o}\mathrm{m}})=-{sign(u}_{\mathrm{m}\mathrm{i}\mathrm{d}})$, map $u_{\mathrm{m}\mathrm{i}\mathrm{d}}$ to $u_{\mathrm{a}\mathrm{b}\mathrm{c}}$ and resolve it using (10).

Since the signal $u_a$, $u_b$, $u_c$, and $u_{com}$ are the modulation reference signals, then we have the limitations for $u_{\mathrm{c}\mathrm{o}\mathrm{m}}$ in (12):

$$\left\{\begin{array}{c}-1\le u_{\mathrm{a}}+u_{\mathrm{com}}\le 1\\ -1\le u_{\mathrm{b}}+u_{\mathrm{com}}\le 1\\ -1\le u_{\mathrm{c}}+u_{\mathrm{com}}\le 1\end{array}\right.$$

(12)

Therefore, the process of solving the compensation voltage is a process of “Assumption—Verification—Correction—Limitation”.

Assumption: assume that the sign function does not change after compensation and solve the compensation voltage using (11).

Verification: sort $u_{\mathrm{a}}$, $u_{\mathrm{b}}$, and $u_{\mathrm{c}}$. Check whether ${sign(u}_{\mathrm{m}\mathrm{i}\mathrm{d}}+u_{\mathrm{c}\mathrm{o}\mathrm{m}})$ satisfies the assumption that it does not change after compensation.

Correction: if it satisfies, skip this step. If not, correct the value ${sign(u}_{\mathrm{m}\mathrm{i}\mathrm{d}}+u_{\mathrm{c}\mathrm{o}\mathrm{m}})=-{sign(u}_{\mathrm{m}\mathrm{i}\mathrm{d}})$ and recalculate the compensation voltage using (10).

Limitation: check that the compensation voltage does not exceed the limit in (12). If so, correct it to the maximum or minimum limit.

Figure 6 shows the control block diagram of the proposed method. The sampled three-phase current signal and the original modulation signal are the input to the $u_{\mathrm{c}\mathrm{o}\mathrm{m}}$ calculation function. Through (10) to (12) and the above process, the compensated voltage is obtained. The compensated voltage is injected into the modulation wave signal $m_{\mathrm{a}\mathrm{b}\mathrm{c}}$. The m_abc^* is the modulation signal after injection and the gate signal of the switch is obtained after amplitude limiting and comparison with the triangular carrier.

3.2. Influence of Modulation Rate and Power Factor

Based on the analysis in Section 3.1, the neutral-point voltage can be self-balanced by making the voltage variation $\Delta U=0$ within each switching cycle. At the same time, since the time scale of balance is the switching period, even if the value of busbar capacitor $C_1$ and $C_2$ is very small, the voltage variation $\Delta U$ caused by the neutral-point current will be still very low according to (2).

However, it is not always possible for the voltage variation $\Delta U=0$. The value of $u_{\mathrm{c}\mathrm{o}\mathrm{m}}$ is greatly affected by the modulation ratio m and the power factor $\mathrm{c}\mathrm{o}\mathrm{s}\left(\phi \right)$. As it is affected by the amplitude limit shown in (12), when $u_{\mathrm{c}\mathrm{o}\mathrm{m}}$ exceeds the limit, the voltage variation $\Delta U$ is no longer equal to 0, and so there will be much larger voltage fluctuation.

Figure 7 shows the compensation voltage calculated using the proposed method under different modulation ratios and power angles. By contrasting (a) with (b), it can be seen that the compensation voltage will not exceed the limit even if the modulation ratio m is 1 when $\cos \left(\phi \right)=1$. When the modulation ratio m is reduced to 0.8, the compensation voltage has a looser limit. Therefore, the proposed method is more suitable for the situation of a lower modulation ratio m. The lower the modulation ratio, the more likely the voltage variation $\Delta U$ is to be 0 in the switching cycle.

By contrasting (a) with (c), when the power angle $\phi$ changes to $\pi /6$, the condition voltage variation $\Delta U=0$ can no longer be satisfied because the voltage to be compensated exceeds the limit of the modulating wave. Therefore, the proposed method is more suitable for the situation of a larger value of power factor $\cos \left(\phi \right)$. The closer $|\cos \left(\phi \right)|$ is to 1, the more likely the voltage variation $\Delta U$ is to be 0 in the switching cycle.

In Figure 7d, although the power angle is still $\pi /6$, the condition voltage variation $\Delta U=0$ can still be satisfied because of the reduction in the modulation ratio m. However, with the further change of the power factor $\cos \left(\phi \right)$, the compensation voltage still exceeds the limit under the lower modulation ratio m, so the voltage variation $\Delta U=0$ in the switching cycle cannot be satisfied at this time, and there will be voltage fluctuation at the neutral point. However, the fluctuation amplitude is still much smaller than that without voltage compensation, because the voltage variation $\Delta U$ during the switching cycle has been limited to the minimum.

4. Simulation and Experimental Results

4.1. Simulation Results

To test the feasibility of the proposed method, a three-level NPC inverter system based on MATLAB/Simulink shown in Figure 1 is established. The simulation parameters are presented in

Table 3. Simulation parameters.

Parameters	Value
DC voltage $U_{dc}$/V	50
Switching frequency/kHz	10
DC capacitor $C_1$/μF	300
DC capacitor $C_2$/μF	300
$(\phi =12°)$ Inductor L/mH	5
$(\phi =12°)$ Resistor R/Ω	10
$(\phi =41°)$ Inductor L/mH	7
$(\phi =41°)$ Resistor R/Ω	2.5

.

Figure 8 shows the simulation results under CBPWM modulation without compensation voltage injection. Among them,$i_{\mathrm{a}}$, $i_{\mathrm{b}}$, and $i_{\mathrm{c}}$ are the load current; $m_{\mathrm{a}}$, $m_{\mathrm{b}}$, and $m_{\mathrm{c}}$ are the voltage reference signals for modulation; and it can be seen that it is a tradition CBPWM modulation. The neutral-point current fluctuates at three times the frequency. Under this modulation mode, the neutral-point current $i_{\mathrm{o}}$ is always positive in some periods and always negative in some periods, and the polarity of positive and negative changes three times in each power frequency cycle. Based on the waveform of $i_{\mathrm{o}}$, it is obvious that there will be three times the frequency of fluctuation on the neutral-point voltage. Additionally, from Figure 8d, the amplitude of three times the frequency of voltage fluctuation is very high.

Figure 9 shows the simulation results under modulation after compensation voltage injection. Among them, $i_{\mathrm{a}}$, $i_{\mathrm{b}}$, and $i_{\mathrm{c}}$ are the load current and $m_{\mathrm{a}}$, $m_{\mathrm{b}}$, and $m_{\mathrm{c}}$ are the voltage reference signals for modulation, and they are no longer standard sine waves after being injected with a compensation voltage. Figure 9b shows that the modulation wave after compensation does not exceed the limit, so it can achieve self-balance in each switching cycle. For the waveform of $i_0$, there are both positive and negative of $i_0$ during every switching cycle. In addition, the integral of the current $i_{\mathrm{o}}$ in each switching cycle is 0. Based on the waveform of $i_{\mathrm{o}}$, it is obvious that the voltage fluctuation on the neutral point is at switching frequency, and the amplitude of this high-frequency voltage fluctuation is almost 0.

Figure 10 shows the simulation results of the proposed method in [22] with the same parameters. The proposed method in [22] uses a PI controller to acquire the adjustable compensation voltage based on the neutral-point voltage. By comparing Figure 9 and Figure 10, the neutral-point voltage fluctuation decreases significantly after the compensation voltage injection of the proposed method [22], but the suppression effect is still far less than that of the method in Figure 9.

Figure 11 shows the influence of the modulation rate m and power angle $\phi$ on the fluctuation suppression ability of the proposed method. By contrasting Figure 11b,d, when $\phi$ changes from $12°$ to $41°$, m = 1 can no longer satisfy the requirement of compensation voltage, and there is a lower frequency and much larger amplitude voltage fluctuation in Figure 11b. After the modulation is reduced from 1 to 0.9 in Figure 11e, the amplitude of voltage fluctuation greatly decreased in Figure 11f. In Figure 11g,h, with the further reduction of m = 0.8, the voltage fluctuation is almost 0.

Table 4. THD analysis of the simulation results.

THD of iabc under Different Cases	THD, Amp of 2nd, Amp of 5th
Case1: m = 1, $\phi =12°$(SPWM without compensation) Case2: m = 1, $\phi =12°$	1.90%, 0.32%, 1.60% 1.32%, 0%, 0.007%
Case3: m = 1, $\phi =41°$	0.69%, 0.12%, 0.49%
Case4: m = 0.9, $\phi =41°$	0.45%, 0.16%, 0.12%
Case5: m = 0.8, $\phi =41°$	0.45%, 0.01%, 0%

shows the THD analysis of the simulation results under different cases. It was observed that the THD is very low and complies with international standards.

Figure 12 and Figure 13 show the dynamic performance of the proposed method. Figure 12 shows the rapid change of the modulation ratio when $\phi =12°$. Based on the pervious analysis, the neutral-point current can achieve self-balance under both modulation ratios. In Figure 11b, there is almost no change of amplitude of neutral-point fluctuation.

Figure 13 shows the rapid change of the modulation ratio when $\phi =41°$. It was observed that, with the change of m from 0.8 to 0.9 and 1, the neutral point starts to show small fluctuations at the time 0.07 s. At 0.14 s, with the m further increased, the amplitude of fluctuation also increased.

To sum up, the proposed method is suitable for low-modulation ratios and high-power factors, and it can achieve voltage variation self-balance in each switching cycle. Even in high-modulation ratios and low-power factor conditions, the proposed method is subject to some limitations. The fluctuation amplitude is still much smaller than that without compensation.

4.2. Experimental Results

To further verify the effectiveness of the proposed method, the low-power prototype in Figure 1 was established as shown in Figure 14. The prototype parameters are presented in

Table 5. Experimental parameters.

Parameters	Value
DC voltage $U_{dc}$/V	50
Switching frequency/kHz	10
DC capacitor $C_1$/μF	300
DC capacitor $C_2$/μF	300
$(\phi =12°)$ Inductor L/mH	5
$(\phi =12°)$ Resistor R/Ω	10
$(\phi =41°)$ Inductor L/mH	7
$(\phi =41°)$ Resistor R/Ω	2.5

. The prototype components’ specifications are: MOSFET: IRFP260N (50 A/200 V), Diode: RHRP3060 (30 A/600 V), DC-Capacitor: AISHI WH 300 uF, 200 V.

Figure 15 shows the suppression effect of the proposed method on neutral-point voltage fluctuation; (a) and (b) are waveforms before the compensation voltage is injected, while (c) and (d) are waveforms after the compensation voltage is injected according to the proposed method. It is observed that, in Figure 15a, the voltage amplitude of each PWM period fluctuates, and the current also has a large distortion, which is caused by the fluctuation of the neutral-point voltage shown in Figure 15b. However, after the compensating voltage injection using the proposed method, it is observed that the large voltage fluctuation is almost invisible in Figure 15d, and only the high-frequency fluctuation based on the switching period is left. Therefore, the phase voltage amplitude in Figure 15c is more stable among each PWM period and the current waveform has less distortion.

Figure 16 shows the how the modulation rate m and power angle $\phi$ influence the fluctuation suppression effectiveness of the proposed method in the prototype experiment. Figure 16a shows that the proposed method can effectively suppress neutral-point voltage fluctuation when m = 1 and $\phi =12°$. As the power angle $\phi$ increases to $32°$, the condition that the compensation voltage does not exceed the limit can no longer be satisfied. The voltage fluctuation as shown in (b) appears at the neutral point under the condition of not completed compensated. At this time, when lowering modulation ratio to 0.9, the condition of compensation voltage is satisfied again, and the neutral-point fluctuation is suppressed again, as shown in Figure 16c. With further increase of $\phi =41°$, the neutral-point fluctuation appears again in (d) and disappears after reducing modulation m = 0.85 shown in (e). By comparing Figure 16a,c, the voltage fluctuation increases because the load resistance is reduced to a quarter and the load current increases to 4 times.

5. Conclusions

This paper proposed a compensation voltage injection method for the suppression of the amplitude of neutral-point voltage fluctuation for a three-level NPC inverter. From the view of neutral-point current, using a mean value model for the neutral-point current during each switching cycle, the voltage fluctuations could be calculated accurately. Then, a high-frequency, switching-cycle-based compensation voltage was calculated and injected into the modulation signal to minimize the voltage variation in each switching cycle. The calculation process of compensation voltage was given, and the influence of the modulation ration and power factor on compensation voltage was analyzed. A MATLAB/Simulink simulation model and a small power prototype were established to verify the proposed method. The conclusions are as follows:

(1)

The proposed average model can accurately calculate the voltage fluctuation of the neutral point. There are only very few discretization errors.

(2)

The proposed method can effectively suppress the voltage fluctuation of the neutral point. In the condition of high-power factor and low-modulation ratio, the voltage variation in each switching cycle can be self-balanced. The amplitude of the voltage fluctuation of the neutral point is much lower than that without compensation.

(3)

The power factor and modulation ratio have a great influence on the suppression ability of the proposed method. Usually, the higher the power factor and the lower the modulation ratio, the better the suppression effect. However, even the proposed method cannot achieve completed compensation in the condition of low-power factor and high-modulation ratio. The amplitude of the neutral-point voltage fluctuation is still much lower than without compensation.