Flyback Converter Using a D-Mode GaN HEMT Synchronous Rectifier

Abstract

The flyback converter with its active cell balancing topology for charging lithium-based batteries in Electrical Vehicles (EV) have been adopted recently into the industry. Electrical Vehicle battery charging requires high current operation in continuous current mode and hence, the power loss on the Schottky diode rectifier on the secondary side determines the power conversion efficiency. The depletion mode (D-mode) GaN HEMT synchronous rectifier proposed in this paper has been used to replace the Schottky diode on the secondary side of the flyback converter in order to improve the power conversion efficiency. This synchronous rectifier regulates the forward voltage drop of an external switch to about 100 mV per ampere of current flow with no concern to threshold voltage. The first challenge of converting the D-mode GaN HEMT as a synchronous rectifier is that the normally-on device must be off when the primary side inductor of the flyback converter is initially charging the magnetic energy. That is, the rectifier must behave as the normally-off device during its initialization stage. The second challenge is that the D-mode GaN HEMT must switch off as soon as the secondary current becomes zero. The third challenge is posing a fast recovery feature to reduce the drain-source voltage rise on the primary side switch, which suffices to be the main reason as to why the D-mode GaN HEMT is used instead of MOS devices. The proposed depletion mode GaN HEMT synchronous rectifier is verified to be able to overcome all challenges and in result becomes a candidate for the synchronous rectifier.

1. Introduction

The flyback converter has been widely adopted because of its simple structure and high conversion efficiency [1,2,3,4]. Many applications require a large DC current with a galvanic isolation, hence the popularity of the flyback converter. For pursuing high efficiency, the use of flyback converters with high-efficiency GaN transistors are reported and the efficiency improvement has been verified in some works [5,6]. Moreover, synchronous rectification using GaN to replace the output diode has low conduction loss and show better performance [7].

GaN devices have some superior material properties resulting in low gate charge, small output capacitance, and zero reverse recovery characteristics that provide them the capability of fast switching and low loss [8,9]. However, there are several challenges needed to be overcome for using the D-mode GaN HEMT, such as the negative gate voltage needing to be applied to let normally-on device operate as normally-off [10,11,12], and the third quadrant loss of GaN FETs needs to be solved when it is used as a rectifier [9,13]. Few studies have presented several methods to let normally-on devices act as normally-off [10,11,12], like using self-powered gate drives [10], biased charge pump gate drives [11], or cascode structure [12]. For addressing the third quadrant loss of GaN FETs, optimizing the dead time can improve the overall system performance [9,13]. Therefore, TI implemented an ideal diode mode function [9] to solve a high reverse voltage drop in GaN resulting from conducting current in the third quadrant when the gate is off. Furthermore, an adaptive dead-time control strategy is proposed to minimize the dead-time [14,15], and an active clamp method is presented for increasing the efficiency [16].

Previous works have already suggested implementing the developed P-Cascode GaN HEMT module with the biased charge pump gate drive [17] to synchronous buck converter [18]. Moreover, the GaN-switching based cascode GaN HEMT and the modified GaN-switching based cascode GaN HEMT with only two diodes and one capacitor are used on the flyback converter [12]. Based on these mentioned works, an insight of the CCM, DCM mechanism and zero current switching of flyback converter are implemented to yield higher power efficiency [19]. Taking synchronous rectifier method into consideration is normally used to obtain higher power conversion efficiency. Especially, using GaN transistors as synchronous rectifier to replace the Schottky diode showing a great performance in reducing loss [7]. However, several challenges, like, as blocking the current flowing to the battery during the inductor charging period, and self-sustainable on the secondary side when the battery is on low voltage or even empty, need to be concerned with in the battery charging system. Nevertheless, with the benefit of the GaN material property, anti-series (back-to-back) connected transistors [20] can be simplified with using only one D-mode GaN due to no body diode characteristic [13].

The aim of this study is to provide the proposed D-mode GaN HEMT topology as a synchronous rectifier to get a better power conversion efficiency. To conquer the aforementioned challenges for using D-mode GaN HEMT as a synchronous rectifier, the proposed D-mode GaN HEMT topology and self-sustainable power supply for gate driver are studied in this work. For analyzing the efficiency of the power conversion and the reliability of the flyback converter, the entire process of current flow to turn on and turn off the secondary diode D_S during the continuous current mode, including the diode voltage rise to turn-on time, the snubber reaction time, the battery charging time, the diode voltage falls to turn-off time, and the inductor charging time are introduced in Section 2. The proposed D-mode GaN HEMT synchronous rectifier consisting of D-mode GaN HEMT topology and self-sustainable power supply for gate driver are presented in Section 3. Then, the proposed depletion mode GaN HEMT synchronous rectifier verified through the Pspice simulation and experiment are shown in Section 4. The discussion and main conclusions of this work are summarized in Section 5 and Section 6.

2. Flyback Converter

A flyback converter is shown in Figure 1. It shall be noted that the voltage of the primary winding v_P is defined according to the conduction of the diode. The feature of battery charging is that the equivalent secondary resistance R_S including the resistance of the battery and the on resistance of the secondary diode which is typically less than one Ohm (Ω) is very small. The small resistance provides not much of or even no damping to the current fluctuation. Thus, the two inductor coils with the leakage inductance and the transformer parasitic capacitance [21] can induce high frequency oscillation in both voltage and current during the power conversion.

In Figure 2, under the gate signal of frequency f₀, the entire cycle of switching can be divided into two parts. The first part is when the switch Q₁ turns on with the duty time δT₀, the coil of the primary winding is energized with the magnetic energy in form of current flow. The second part is when the switch turns off with the remaining time (1 − δ)T₀ of the switching period, the coil of the magnetic energy in the transformer coils is shuffled into the battery. When the duty δ increases, we will reach a continuous current mode in which the magnetic field is never drained out. During the continuous current mode, the entire process of current flow can be subdivided into five steps in order to turn on and off the secondary diode D_S. The resonant flyback with or without an active clamp is mostly popular. The GaN HEMT brings power efficiency advantages when the parasitic capacitive behavior is thoroughly investigated. In order to achieve the soft switching, we can introduce the ZCS (Zero Current Switching) control to optimize the efficiency in the DCM operation, when in the CCM operation the ZVS (Zero Voltage Switching) control can be applied [12,18,19].

These five steps include the diode voltage rise to turn-on time t_D,rise, the snubber reaction time t_snubber, the battery charging time t_BCH, the diode voltage falls to turn-off time t_D,fall, and the inductor charging time t_LCH. The current flows on the diode in only three of the five time periods. However, the efficiency of the power conversion and the reliability of the flyback converter relies on all six time steps which are introduced in the following sections.

2.1. Diode Turn-On Period of Time t_D,rise

The mathematical model in this section is simplified into a secondary order O.D.E. by ignoring a parasitic inductance in series with the diode DB. With the parasitic inductance concerned, the model may yield two KVL equations to be solved simultaneously. Moreover, the parasitic capacitances are considered as constant which is known as not true for the D-mode GaN has C_oss differences around five times when comparing the C_oss in low v_DS of the turn-on state and high v_DS of the turn-off state. However, the reality can bring the system equation into a non-linear differential equation which is very difficult to be analyzed. Hence, we neglect these nonlinear effects with the experimental results as a proof to the applicability of the secondary order O.D.E. The diode on the secondary side of the transformer starts to conduct current when the primary side switch turns off. The secondary side voltage v_S takes some rise time t_D,rise to increase from the negative induced voltage to the positive voltage higher than the charged voltage in the battery capacitor v_BAT. As shown in Figure 1, the derivation of the diode turn-on time may start from the time when the drain-source voltage v_DS rises due to the switch Q₁ turns off at the primary side, the KVL equation is written as follows.

$$V_{DD}=-v_p+v_{DS}=L_p\frac{d{i}_p}{dt}+v_{DS}$$

(1)

Ignoring the bypass current i_B into the snubber, we have the inductor current as follows.

$$i_P=i_{sw}=C_{OSS}\frac{d{v}_{DS}}{dt}$$

(2)

C_OSS denotes the output parasitic capacitance of the transistor Q₁. We then obtain the undamped second order differential equation as follows.

$$\frac{1}{{\omega }_1^2}\frac{d^2{v}_{DS}}{d{t}^2}+v_{DS}=V_{DD}$$

(3)

where the resonant frequency is

$${\omega }_1=\frac{1}{\sqrt{L_p{C}_{OSS}}}$$

(4)

Providing that the initial condition of Equation (3) is v_DS(0) = 0 and ${\stackrel{•}{{\displaystyle v}}}_{DS}(0)=i_p(0)/C_{OSS}$. The solution of v_DS can be obtained as follows.

$$v_{DS}=\frac{i_p(0)}{{\omega }_1{C}_{OSS}}\sin {\omega }_{1}t+V_{DD}(1-\cos {\omega }_{1}t)$$

(5)

Simultaneously the secondary side voltage v_s increases from V_DD/a when v_DS rises from zero voltage. The diode turns on when the voltage v_s reaches the battery voltage v_BAT + V_TH,Ds where V_TH,Ds denotes the threshold to turn-on voltage of the diode on the secondary side.

$$v_s=\frac{v_p}{a}=\frac{v_{DS}-V_{DD}}{a}=v_{BAT}+V_{TH,Ds}$$

(6)

For small ω₁ t_D,rise, sinω₁t ≈ ω₁t, the diode turn-on time can be solved as follows.

$$t_{D,rise}=\frac{C_{OSS}}{i_p\left(0\right)}(V_{DD}+a(v_{BAT}+V_{TH,Ds}))$$

(7)

Equation (7) states that the diode turn-on time decreases as the input current increases. According to

Table 1. Parameters used to estimate the diode turn-on time.

Symbol	Unit	Original	Value
COSS	pF	Measurement	200 @ VDS = 72 V
VDD	V	Measurement	72 V
vBAT	V	Measurement	7
a		Measurement	6
VTH,Ds	V	RFN10T2D	0.5 V
ω1	Mrad	Equation (5)	3.5
tD,riseip(0)	nC	Equation (7)	23

, if the current of the primary winding is i_p(0) = 1 A, then the diode turn-on time is 23 ns.

2.2. Snubber Activated Period of Time t_snubber

When the diode turns on, the secondary winding current starts to flow while the primary winding current falls to zero from its peak value and hence the magnetic energy is shuffled from the primary winding to the secondary winding. However, it will take some delay time until the current on the secondary side reaches the steady state charging current I_BCH. The governing equation on the secondary side right after the diode turns on is as follows.

$$R_s\frac{d{i}_s}{dt}+\frac{i_s}{C_{BAT}}=\frac{d{v}_s}{dt}=\frac{d}{dt}(L_{Sl}\frac{d{i}_s}{dt})$$

(8)

When i_s started to flow, v_p remained ramping up to reach more positive value due to the rise of v_DS, which brought v_s to be simultaneously ramping up. Since the switch Q₁ turns off immediately after the secondary diode is turned on, the snubber circuit as shown in Figure 3 is then activated. During the activation of snubber circuit, Equation (8) yields a governing equation on the secondary side after the diode turns on is as follows.

$$L_{Sl}\frac{d^2{i}_s}{d{t}^2}+R_s\frac{d{i}_s}{dt}+\frac{i_s}{C_{BAT}}=0$$

(9)

The initial condition of di_S/dt at time t_D,rise can be written into the voltage across the leakage inductance of the secondary winding as follows.

$$\frac{d{i}_s}{dt}=\frac{1}{L_{Sl}}(\frac{v_p}{a}-v_{BAT}-V_{TH,Ds})$$

(10)

Since the capacitance C_BAT of batteries values at thousands of Faradays, the third term of Equation (9) can be ignored and the current is derived as follows.

$$i_s(t)=\frac{1}{R_s}(\frac{v_p}{a}-v_{BAT}-V_{TH,Ds})(1-e^{-\frac{t-t_{D,rise}}{L_{Sl}/R_s}})$$

(11)

The current will keep increasing until the snubber circuit is deactivated again. The charging process of the snubber capacitor was derived in [22].

$$\frac{d^2{v}_p}{d{t}^2}+2{\xi }_2{\omega }_2\frac{d{v}_p}{dt}+{\omega }_2^2{v}_p=a(v_{BAT}+V_{TH,Ds}){\omega }_2^2$$

(12)

In the above equation, the natural frequency and the damping ratio are as follows.

$${\omega }_2=\frac{1}{a\sqrt{L_{Sl}{C}_B}}$$

(13)

$${\xi }_2=\frac{R_{Bs}}{2a}\sqrt{\frac{C_B}{L_{Sl}}}$$

(14)

To prevent an excessive oscillating response, we prefer an overdamped system, ξ₂ >> 1, by increasing C_B to yield the first order response of v_p with a time constant as follows.

$$T_2=\frac{1}{2{\xi }_2{\omega }_2}=\frac{a^2{L}_{Sl}}{R_{Bs}}$$

(15)

With the time constant, v_p falls from a voltage higher than V_B and down to the voltage of a(v_BAT + V_TH,Ds). For the design that R_Bs > a²R_S, the snubber circuit regulates the tempo when converting the magnetic energy from primary winding to the secondary winding. As the snubber capacitor C_B stored the voltage V_B at time t_D,rise + t_snubber in the previous cycle and was discharged through R_Bp, when D_B turns on again, it is recharged to reach the same voltage level V_B in steady state. It will typically take one time constant to bring v_p down to V_B and at that moment the snubber is deactivated. That is,

$$t_{snubber}\approx T_2=\frac{a^2{L}_{Sl}}{R_{Bs}}$$

(16)

Table 2. Parameters used to estimate the snubber activated time.

Symbol	Unit	Original	Value
CB	μF	Measurement	1
a		Measurement	6
RBs	Ω	Measurement	33
RS	Ω	Measurement	0.55
LSl	nH	Measurement	270
tsnubber, T2	ns	Equation (16)	300

shows the parameters that are used to estimate the snubber activated time. A higher snubber resistance R_Bs leads to a lower snubber voltage V_B and a shorter snubber activation time. However, a higher snubber resistance R_Bs leads also to the higher ring on the v_DS which may damage the transistor Q₁.

2.3. Battery Charging Period of Time t_BCH

With proper design of the snubber circuit of R_Bp, the snubber circuit can be assumed off-line after the first peak and reach to the charging time. Due to the current oscillation, the current i_s in the secondary winding still needs to commute with the primary winding current i_p to shuffle the energy in the magnetic field. The charging current is a function of duty δ of switching. In the continuous current mode of battery charging, the duty must be attuned to a large value and the moving average of the charging current must be through a constant current I_BCH. As shown in Figure 4, without the interference of the snubber circuit, the commuting current will flow into the output parasitic capacitance of the transistor Q₁. The voltage across the transistor can be simplified as follows.

$$\frac{1}{{\omega }_2^2}\frac{d^2{v}_{DS}}{d{t}^2}+v_{DS}=V_{DD}+a(I_{CH}{R}_S+v_{BAT}+V_{TH,Ds})$$

(17)

where the resonant frequency is

$${\omega }_2=\frac{1}{\sqrt{L_{pl}{C}_{OSS}}}$$

(18)

During the charging period, the current flows into the batteries and thus converts the magnetic energy back into the electrical energy storing in the electrical field. From the energy conservation between the input and output assuming that the power loss is negligible, the output is derived as follows.

$$V_O=\frac{\delta }{a(1-\delta )}{V}_{DD}$$

(19)

The average battery charging current is then derived in terms of the battery voltage and the duty as follows.

$$I_{BCH}=\frac{1}{R_S}(V_O-(v_{BAT}+V_{TH,Ds}))=\frac{1}{R_S}(\frac{\delta }{a(1-\delta )}{V}_{DD}-(v_{BAT}+V_{TH,Ds}))$$

(20)

Table 3. Calculation of the charging current provided with parameters in Table 1 and Table 2.

Symbol	Unit	Original	Value
LPl	uH	RLC meter	9.97
f2 = ω2/2π	MHz	Equation (18)	3.6
δ		Input	45%
IBCH	A	Equation (20)	6

shows the calculation of the charging current. With the same parameters provided in Table 1 and Table 2, the average charging current can be calculated from the given duty ratio δ. The charging current is indeed oscillating with the frequency of ω₁. T₀ is switching period time which is the reciprocal of switching frequency f₀. The charging time t_BCH is a fraction of the switch-off time (1 − δ)T₀ of the transistor Q₁ as follows.

$$t_{BCH}=\left(1-\delta \right)T_o-t_{snubber}$$

(21)

The rate of Coulomb charged into the battery at each cycle time during the switch-off time (1 − δ)T₀ is estimated as follows.

$$\mathrm{Battery} \mathrm{charging} \mathrm{rate}=\frac{1}{R_S}(\delta \frac{V_{DD}}{a}-(1-\delta )(v_{BAT}+V_{TH,Ds}))$$

(22)

2.4. Diode Turn-Off Period with Time t_D,fall

The secondary diode turn-off period is a reverse process of the turn-on period providing that the current is turned off before the diode goes into a reverse bias on the secondary side. Right after the switch is turned on, the voltage v_DS goes to zero and the transistor conducts the current returned from the secondary side. The KVL equation on the secondary side is written as follows.

$$L_{Sl}\frac{d{i}_s}{dt}+i_s{R}_S=-(\frac{V_{DD}}{a}+v_{BAT}+V_{TH,Ds})$$

(23)

The current response for i_s > 0 is derived as follows.

$$i_s=-\frac{1}{R_S}(\frac{V_{DD}}{a}+v_{BAT}+V_{TH,Ds})\left(1-e^{\frac{-t}{L_{Sl}{R}_S}}\right)$$

(24)

With the current rate of i_s is

$$\frac{d{i}_s}{dt}=-\frac{1}{L_{Sl}}(\frac{V_{DD}}{a}+v_{BAT}+V_{TH,Ds})$$

(25)

The time t_{D, all} can be estimated as follow.

$$t_{D,fall}=\frac{L_{Sl}{I}_{CH}}{\frac{V_{DD}}{a}+v_{BAT}+V_{TH,Ds}}$$

(26)

Table 4. Calculation of the charging current with parameters provided in Table 1, Table 2 and Table 3.

Symbol	Unit	Original	Value
tD, all	ns	Equation (26)	100

shows the calculation result based on Equation (26) and data from Table 1, Table 2 and Table 3. The actual result will be ringing in high frequency due to the zero-bias capacitance of the p-n junction C_j0 of the diode. The actual oscillation takes the same form as provided in the next section.

2.5. Inductor Charging Period with Time t_LCH

In the beginning of battery charging time, considering the diode is a capacitor C_j0 which is in series with the battery, the voltage ripple is determined by the resonance between smaller capacitor C_j0 and the inductor of the leakage inductance of the secondary winding assuming that the parasitic capacitance of the secondary winding is typically smaller than C_j0. The governing equation is written as follow.

$$L_{Sl}\frac{d^2{i}_s}{d{t}^2}+R_S\frac{d{i}_s}{dt}+\frac{i_s}{C_{j0}}=0$$

(27)

Assuming the initial condition of di_s/dt at time the starting time of t_LCH still remains the same as Equation (25) after a short time decay t_{D, all}. The current response is then written in a form of impulse response of the second order system as follows.

$$i_s=A_1{e}^{-{\xi }_3{\omega }_{3}t}\cos \left(\sqrt{1-{\xi }_3^2}{\omega }_{3}t\right)$$

(28)

$${\omega }_3=\frac{1}{\sqrt{L_{Sl}{C}_{j0}}}$$

(29)

$${\xi }_3=\frac{R_S}{2}\sqrt{\frac{C_{j0}}{L_{Sl}}}$$

(30)

$$A_1=\frac{V_{DD}}{a}+v_{BAT}+V_{TH,Ds}-I_{BCH}{R}_S$$

(31)

The constant A₁ is derived from the continuity of the voltage v_s as a transition from the diode turn-off period. The current ripple i_s as well as the voltage ripple v_s are both in high frequency ω₃ as shown in

Table 5. Calculation of the Inductor charging with parameters provided in Table 1, Table 2 and Table 3.

Symbol	Unit	Original	Value
Cj0	pF	Data sheet	15
f3 = ω3/2π	MHz	Equation (29)	60
ξ3	Damping ratio	Equation (30)	0.002

. The damping ratio of the current response is also a function of C_j0. Higher the capacitance C_j0, higher the damping. On the other hand, when C_j0 reaches a large value, the reverse saturation current could become a significant input function on the right-hand side of Equation (27) and induce a steady state voltage ripple as an EMF problem on the secondary side. During the inductor charging time with the DC power supply of voltage V_DD, the primary winding raises the amount of current flowing in the inductor as follows.

$$t_{LCH}=L_p\frac{\Delta i_p}{V_{DD}}$$

(32)

3. D-Mode GaN HEMT Synchronous Rectifier

The typical rectifier diode holds a certain threshold voltage V_TH,Ds during the forward bias period as battery charging period may cause a power loss. Nevertheless, the zero bias junction capacitance C_j0 can induce a high frequency oscillation during the inductor charging period. The reverse recovery current from the PN junction can also impose the high frequency oscillation that becomes a burden to the EMI filter of the primary side of the flyback converter. There is thus a reason to design a synchronous rectifier to relief the common problems occurred while using the rectifier diode. The D-mode GaN HEMT is made in NYCU with the characteristics stated in [22,23], which is summarized in

Table 6. Characteristics summary of the D-mode GaN HEMT under 1 MHz switching.

Symbol	Unit	Description	Value	vDS
				0 V	800 V
Vgs,GaN_ON	V	Turn-on voltage	−7
CDS	pF	Parasitic capacitance		40	30
CGD	pF	Parasitic capacitance		220	20
CGS	pF	Parasitic capacitance		100	115

.

Several challenges that are needed to overcome for using the D-mode GaN HEMT includes:

• It is a normally-on device which is not applicable to block the current flowing to battery during the inductor charging period;
• The power supply system to the GaN HEMT must be self-sustainable on the secondary side when the battery is on low voltage or even empty;
• It shall turn off itself during the reverse bias.

3.1. Cascode GaN HEMT Power Module

Using a conventional cascade configuration, in which the Si MOSFET is used to perform the switching, may not be in favor of losses. The temperature capability of the D-GaN may not be used because the Si MOSFET does not enable to reach a higher operating temperature when the switching loss falls on the Si MOSFET. Instead of the conventional cascade configuration, this paper uses a GaN-switching cascode power module proposed in [12,18] which fulfills the conversion from the normally on device into the normally off device and delegate the switching responsibility to the D-mode GaN. The Si MOSFET is then prevented from a high operating temperature. Conventionally, a cascode configuration combining Si MOSFET and D-mode GaN HEMT is used to simplify the driving requirements. The cascode configuration makes the D-mode GaN HEMT switching operation from normally-on to normally-off, and makes it compatible with conventional gate driver, where normally-off devices are preferred because of safety consideration. Usually, low-voltage LDMOS were used in the cascode configuration [24]. The GaN-switching cascode GaN HEMT power module, consisting of three terminals, is shown in Figure 5. There is a diode connecting the module gate (G) with the NMOS gate, whereas the source of the module will be connected to the battery. A clamp circuit is inserted before the module drain (S) and the gate of the GaN HEMT. When the clamp circuit’s capacitor C_p is not charged in the initial state, both the NMOS and D-mode GaN HEMT are turned off. Hence, it is a normally-off power module initially. Thus, the power module fulfills the first condition to be a normally-off module and capable of blocking the current flow to battery during the inductor charging period.

3.2. Self-Sustainable Power Supply for Gate Driver

The flyback converter will initially go through the periods from (a) the inductor charging period and proceeds to (b) the snubber reaction period, (c) the diode turn-on period, (d) the battery charging period, and finally continues to (e) the diode turn-off period. During the inductor charging period, there is a window of time in which we can utilize the blocking voltage in reverse bias by the power module to charge the capacitor. As shown in Figure 6, a peak detector circuit is used to store the electrical charges into the storage capacitor. To prevent the surge occurred in the initialization stage of capacitor C_PD, the peak detector circuit may also connect a resistor R_PD in series with the diode D_PD and C_PD. During the forward bias time, the capacitor C_PD will supply charges to the gate drive for switching the power module. The gate drive is a non-inverting, single 7.6 A peak current low-side gate driver LM5114B from Texas Instruments, which can be used with +4 V to +12.6 V single power supply. The source (S) of power module is connected to the high side of v_s. The drain (D) of the power module is connected to the battery. The power module is controlled at the gate (G). The circuit in Figure 6 is more complex than a simple rectifier diode, the fabrication of which needs quite some effort and knowledge to form a SIP (System in a Package) package. However, the D-mode GaN Synchronous rectifier does not need to hold a threshold voltage as a rectifier diode does when it turns on. The D-mode GaN Synchronous rectifier is more power efficient in medium output voltage applications such as 12 V battery charging, which trades off the efficiency and EMI reduction with the extra cost on fabrication.

As shown in Figure 7, during the period from the initial time t₀ to t₁ the first inductor charging period starts that the voltage on the secondary side of the transformer v_s < 0 the capacitor C_PD and is charged in a polarity as shown in Figure 6. The capacitor C_P is discharged, thus the NMOS turns off while the D-mode GaN turns on as a normally on device. The NMOS is oriented in the direction as shown in Figure 6. The body diode of NMOS can block the reverse current when NMOS turns off, surpassing the first challenge as stated in Section 3 that the power module is off when the primary side inductor of the flyback converter is initially charging the magnetic energy. In the same initial inductor charging period, the control terminal v_c of the gate driver IC powered by the capacitor C_PD is self-sustainable on the secondary side when the battery is on low voltage which overcomes the second challenge as stated before. The control terminal v_c is high relative to its voltage source ground at v_A+, thus R_G,n will connect the positive end of the capacitor C_P to v_A+. Owing to v_s < 0, the diode D_P is zero biased, which will not conduct any current if there was no charge existing in C_P initially. Parameters in D-Mode GaN HEMT Synchronous Rectifier are shown in

Table 7. Parameters in D-Mode GaN HEMT Synchronous Rectifier.

Symbol	Unit	Original	Value
CP	nF	Peak detector capacitor	1
DP		Power module diode 1	BAV170
DM		Power module diode 2	1N4007
CPD	nF	Peak detector capacitor	100
RPD	Ω	Peak detector resistor	33
DPD		Peak detector diode	1N4007
IC		Gate drive	LM5114B
RG,n	Ω	Gate drive	27
RG,p	Ω	Gate drive	30

.

As shown in Figure 7, during the period from the initial time t₁ to t₂, the secondary side voltage v_s > 0 and the control terminal v_c of the gate driver IC is high relative to its voltage source ground at v_A+. The capacitor C_p will be gradually charged through the gate resistance R_G,p to the same voltage level as V_PD in C_PD. When the voltage of C_p denoted as v_CP reaches a high voltage, the NMOS turns on. At the same time, the gate of the D-mode GaN HEMT senses zero voltage relative to v_A+, that is v_gs,GaN = V_PD − v_CP = 0. The D-mode GaN HEMT remains off. In practice, we need an external resistor R_PD to slow down the process of C_PD charging to prevent the ripple during the capacitor redistribution between C_P and C_PD.

As shown in Figure 7, during the period from the initial time t₂ to t₃ the voltage becomes negative again, i.e., v_s < 0. R_G,n will connect the positive end of the capacitor C_p to v_A+, at this time v_gs,GaN = − v_CP < v_{gs,GaN_ON}. The D-mode GaN HEMT turns off due to the large negative voltage presented across the gate-source. This overcomes the third challenge that the power module shall turn off itself during the reverse bias.

3.3. D-Mode GaN HEMT Synchronous Rectifier

As shown in Figure 7, during the period from the initial time t₃ to t₄, the voltage v_s > 0 becomes positive again. After the first time, v_s > 0 the parasitic capacitance of the NMOS of the power module is storing the voltage V_s,high which can no more be released due to the presence of the diode D_M. The NMOS of the power module will remain turn-on after the first cycle of switching, therefore the actual rectification is performed by D-mode GaN HEMT synchronously according to the v_s. Compared to a normal rectifier diode such as RFN10T2D, the D-Mode GaN HEMT synchronous rectifier poses the features as follows:

• The threshold voltage for the diode V_TH,Ds vanishes in the synchronous rectifier, which can yield the synchronous rectifier with an advantage on the large current applications;
• The reverse recovery current of the D-mode GaN HEMT is insignificant due to the GaN HEMT, which does not have a body diode. The NMOS remains turn-on without further switching, hence the body diode effect on the NMOS is also insignificant;
• The zero-voltage capacitance of the conventional diode is low, which causes much oscillation noise which becomes a burden to the EMI filter. The GaN HEMT will present a smoother switching response in the voltages compared to the rectifier diode. The switching ringing during the diode turn-off as well as the inductor charging period are most benefited by the D-Mode GaN HEMT synchronous rectifier.

4. Simulation and Experimental Results

4.1. SPICE Simulation of the D-Mode GaN HEMT Synchronous Rectifier

The flyback converter with a D-Mode GaN HEMT synchronous rectifier is simulated using the OrCAD Pspice simulator, and the circuit topology is shown in Figure 8. The identical parameters are used in the simulation for the above analysis. Nevertheless, the battery equivalent circuit with extra parasitic inductances are used to mimic their non-ideality due to the parasitic inductances resulting from the lead of the switch and the connecting wire. For making simulation more realistic, the transformer equivalent circuit and parameter used in simulation are shown in Figure 9 and

Table 8. Transformer parameters in SPICE Simulation.

Symbol	Unit	Description	Value
Rp	mΩ	Primary winding resistance	1
Cp	pF	Primary parasitic capacitance	10
Lp1	nH	Primary parasitic inductance	300
Lp	μH	Primary winding inductance	400
Ls	μH	Secondary winding inductance	10.27
Cs	pF	Secondary parasitic capacitance	10
Ls1	nH	Secondary parasitic inductance	235
k	-	Coupling coefficient	0.987

, respectively. For reducing the simulation time to reach the steady state, a voltage source is used to connect in series with the output capacitance. The waveforms represent the gate voltage (v_GS), primary switch current (i_p), output current (i_s) and transformer secondary voltage (v_s) as shown in the schematic. The five-state-rectification waveforms with both the rectifier diode synchronous rectifier switch were shown in Figure 10a,b, respectively. In the simulation, both circuits with rectifier diode and synchronous rectifier yielded the transformer secondary voltage (v_s) with similar oscillating frequency around 60 MHz, which is the same as derived in Table 5, when the rectifiers turn off. The amplitude of the oscillation is smaller when the synchronous rectifier is introduced. The secondary synchronous rectifier takes shorter time to turn on within (1 − δ)T interval, and the current provided by the magnetic energy flow into battery after snubber capacitance was fully charged. According to (7), the rectifier takes about 23 ns which fits the simulation. Additionally, the snubber charging time and the battery charging time derived in (16) and (21) were compared in

Table 9. Comparison between analysis and simulation result.

Time	Equation Number	Analysis	Simulation
tD,rise (ns)	(7)	28	34
tsnubber (ns)	(16)	166	137
tBCH (ns)	(21)	1770	1786
tD,fall (ns)	(26)	100	89
tLCH (ns)	(32)	1390	1510

. When primary switch turns on again, the secondary current is decreased to zero in t_D,fall. The secondary voltage rings will lead to some power lose due to zero-voltage capacitance. However, the rectifier using GaN power module has lower conduction loss and parasitic capacitance. Thus, it is worthy to replace diode with a GaN based transistor. Then, the result of the flyback converter is used to compare the analysis of the theoretical and experiment data with the same circuit parameters.

4.2. Experimental Result

To verify the above theoretical analysis, a laboratory prototype was implemented, and the experimental setup as shown in Figure 11 was built on a PCB, including lithium-ion battery pack, and flyback converter circuit with synchronous rectifier. The input DC voltage of the converter is 72 V, and its output voltage is 7.6 V. Moreover, the switching frequency and duty cycle of the converter are 280 kHz and 62%, respectively. The values of parameters are selected based on the design considerations and are shown in

Table 10. Parameter of the proposed converter.

Parameter	Type	Value
Power switch		-
Snubber diode (DB)	1N4007	-
Magnetizing inductor (Lp, Ls)	-	400 μH, 10.27 μH
Leakage inductor (LPl, LSl)	-	9.97 μH, 0.27 μH
Snubber capacitor (CB)	Ceramic capacitor	3300 pF
Snubber resistance (RBs)	Carbon film resistor	45 Ω
Turn ratio	-	6

. The waveforms are shown in Figure 12, the oscilloscope is used to test the V_S, V_G, and i_s. The gate voltages V_G on the primary side switch, which is a Transphorm GaN, carried some high frequency noise could be induced by parasitic coupling of the power supply; however, it can merely affect the five-state-rectification on the secondary side. The results are found closely comparable and confirm the aforementioned theoretical analysis and waveforms of the proposed converter. According to the derivation of the response described in the previous section, it is clear in

Table 11. The time comparison in two different kinds of rectifier.

Time	Equation Derived	Diode (RFN10T2D)	Synchronous Rectifier (D-Mode GaN HEMT)
tD,rise (ns)	11	30	30
tsnubber (ns)	216	350	350
tBCH (ns)	1140	1058	1041
tD,fall (ns)	133	440	420
tLCH (ns)	1667	1693	1730

that the comparison of derivation in each of five steps. In Table 11, we can see the same time of the t_D,rise and t_snubber, but the component measure might not be precise, thus the value coming from the equation derived has some difference.

Compared with the simulation results shown in Figure 10, the transformer secondary voltages from the experiments can drop to below zero but not from the simulation. It was owing to the negative voltage from leakage inductance due to decreasing current cannot be separately measured from the transformer in practice. This is caused by the position of the differential probe that cannot be put in front of the leakage inductance while conducting the experiment. In Figure 12b, the D-mode GaN HEMT synchronous rectifier works similar to a diode rectifier in Figure 12a in discontinuous conduction mode, the structure is very simple and its voltage sequence is shown in Figure 13.

Figure 14 shows waveform captured at 5.05 A when it is in the heavy loading condition. Due to its capacitive load, the capacitive reactance resisting the voltage change caused the circuit current to yield a phase leading that of the voltage by 90 electrical degrees. For the diode rectifier as shown in Figure 14a, the oscillation of V_o occurred during the time period t_BCH because the primary inductance and parasitic capacitance of the transistor had a high frequency resonant as stated in Section 2. In addition, the ringing problems occurred during the time periods t_D,fall and t_LCH may impose the EMI filter with extra burden. The ringing problem is due to its small capacitor C_j0 of the diode and the inductor of the leakage inductance on the secondary winding. As shown in Figure 14b, the GaN HEMT synchronous rectifier presented smoother switching responses in both the voltages and the currents. The high frequency switching ringing can be greatly reduced when the D-Mode GaN HEMT synchronous rectifier is adopted. As shown in Figure 14c, the frequency spectrums of transformer secondary voltage show that the rectifier diode circuit can induce higher amplitudes at 30 MHz and 60 MHz. The EMI signature differences verified the reduction in oscillations using the synchronous rectifier.

5. Discussion

Literature [25] addresses with the extreme efficiency in power electronics when efficiency approaches 100%. The measurement data have been acquired in the two-chamber calorimeter which handles the temperature control. In this study, we used the air conditioner to maintain the room temperature. The experiments were performed intermittently to reduce the temperature effect upon the experiments. The measurement of current and voltage responses in Section 4 can be used in the efficiency calculation as follows. When the rectifiers are used in the secondary side of the flyback converter. The input power can be calculated as the average of the multiplication of the secondary voltage vs and the current is. The output power can be calculated as the average of the multiplication of the battery voltage v_BAT and same current i_s. By ignoring the internal resistance loss of the battery, the rectification efficiency η may be calculated from the division of the output power to battery and the input power from the secondary winding.

$$\eta =\frac{{\displaystyle {\sum }_{k=1}^{10000}{v}_{BAT}(k)\cdot i_s(k)}}{{\displaystyle {\sum }_{k=1}^{10000}{v}_s(k)\cdot i_s(k)}}$$

(33)

When the converter runs at discontinuous current mode (DCM) [12] with the load current lower than 1.5 A, there is no sufficient current to drive the D-Mode GaN HEMT synchronous rectifier properly. The gate driver of D-Mode GaN HEMT synchronous rectifier is not charged to a specific voltage the gate driver needs, i.e., 12 V in this study. Therefore, the efficiency of the GaN HEMT synchronous rectifier can be lower than the diode rectifier as shown in Figure 15. The particular diode we have chosen to compare with is a super-fast recovery diode RFN10T2D. However, in the continuous current mode (CCM) applications, the D-Mode GaN HEMT synchronous rectifier is better than RFN10T2D by 2% of the efficiency. However, at very light load situation (current > 5.5 A), the efficiency of D-Mode GaN HEMT synchronous rectifier will fall to below 95%. The efficiency drop is due to the on-resistance loss of the D-mode GaN HEMT. The corresponding result for the parallel battery charging application using the D-mode GaN synchronous rectifiers will be reported in [26].

6. Conclusions

The response of continuous current mode of the flyback converter is essentially determined by the rectifier diode characteristics. Namely, the diode turn-on period, the battery charging period, and the diode turn-off period of the continuous current mode are all determined by the diode characteristics. Selection of the rectifier diode is crucial to the power conversion efficiency. This research proposed a synchronous rectifier using the D-mode GaN HEMT and fabricated and tested the corresponding circuit. The result shows that the comparison case, diode RFN10T2D, is advantageous in the discontinuous current mode due to the diode threshold voltage (0.5 V in this study) did not cause much power loss in low current operation. Whereas the D-Mode GaN HEMT synchronous rectifier overwhelmed in the continuous current mode application, which presented a 2% leading in the rectification efficiency compared with the RFN10T2D. In addition to the efficiency advantage, the GaN HEMT synchronous rectifier presented smoother switching responses in both the voltages and the currents, which is preferable in the EMI filter loading consideration. In the operation of higher current with 5 A and more, the 120 mm gate length D-Mode GaN HEMT having nearly 200 mΩ on-resistance can induce nearly 1 V voltage drop under 5 A current charging. Thus, in order to achieve a higher efficiency, the 240 mm GaN HEMT may be used. However, a 240 mm GaN HEMT may add more parasitic capacitances to the switching, which is unfavorable in the high frequency switching. The parallel connection of two 120 mm GaN HEMT power modules with independent gate drives is needed to study in the future.