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Article

Analysis and Design of a High-Efficiency SiC MOSFET 6-Phase Boost Rectifier †

C-PED Center for Power Electronics and Drives, Department of Engineering, Roma Tre University, 00146 Roma, Italy
*
Authors to whom correspondence should be addressed.
This paper is an extended version of our conference paper published in 2021 21st International Symposium on Power Electronics (Ee), Novi Sad, Serbia, 27–30 October 2021; pp. 1–6.
Energies 2022, 15(6), 2175; https://doi.org/10.3390/en15062175
Submission received: 10 February 2022 / Revised: 8 March 2022 / Accepted: 14 March 2022 / Published: 16 March 2022
(This article belongs to the Special Issue Recent Advances in Smart Power Electronics)

Abstract

:
In this paper, the analysis and the design of a high-efficiency power electronic conversion system for offshore wind applications are presented. This system is composed of a 6-phase AC–DC converter based on the SiC power semiconductors, to be used to control the achievable power from the wind turbine electrical generator. Thanks to the phase redundancy, the proposed boost rectifier is suitable for applications where reliability and fault tolerance capability are the main targets. To select the appropriate power semiconductor devices, voltage and current ratings have to be determined. After that, the power loss equations are derived in order to evaluate the conversion efficiency. To design the appropriate DC-bus capacitor configuration, an analytical investigation is carried out by estimating the DC-bus RMS current and the voltage ripple. Finally, the thermal sizing of the system is calculated to identify a suitable heatsink. To validate the proposed analysis, the analytical results are compared to simulation ones using the Plexim/PLECS tool in the MATLAB/Simulink environment. For further validation, a prototype of the converter is built and the experimental results are carried out. The results demonstrate that the peak efficiency of the 6-phase boost rectifier can reach 98% at 100 kHz switching frequency.

1. Introduction

In recent years, the demand for renewable energy has grown due to concerns about global warming and environmental issues. Consequently, wind energy has become one of the most attractive renewable sources, reaching 743 GW overall in 2020 [1,2]. Offshore wind farms are gaining increased interest for two main motives: the first is the lack of space on the mainland, and the second is the wind speed being much stronger and more constant than in the onshore case [3,4]. However, in designing an offshore site, DC transmission is preferred in view of the excessive losses of AC transmission over long distances [5]. Additionally, on one side there is a variable speed generator, and on the other side there is a grid with fixed voltage and frequency. Thus, the power conversion system stage is necessary, and it is composed of an AC–DC converter in cascade with a DC–AC converter. An increasing variety of power converter topologies for wind energy conversion systems (WECS) are proposed in the literature [6,7,8]. These topologies are mainly classified according to the low voltage (LV) and medium voltage (MV) converters. A 3-phase 2-level voltage source converter is an example of an LV converter, whereas a multilevel converter constitutes an MV converter [9]. For this reason, it is important to know the operating voltage of the WECS in order to identify the best power converter configuration. Moreover, in offshore systems, it is preferable to realize a power electronic converter with relatively low cost, which aims to emphasize the fault tolerance capability without neglecting the conversion efficiency [10,11,12,13,14]. For this reason, to increase the reliability and fault tolerance capability, a power conversion system with modular characteristics and/or redundant legs is recommended. In this way, when a converter breaks down and stops working, the wind turbine is still capable of delivering power, but with reduced capacity. This aspect is of major importance in offshore wind applications because maintenance cannot be performed routinely, and maintenance costs are higher than in the onshore case [3]. Clearly, the number of parallel modules or redundant legs must be limited, otherwise the costs could increase, and the reliability of the system could even decrease, resulting in greater complexity in terms of designing and tuning the control algorithm [15,16,17]. For this purpose, the 2-level converter topology with parallel legs seems to be an excellent solution in terms of simplicity, reliability, performance, and cost. Moreover, to improve the conversion efficiency, SiC power semiconductors can be used to obtain low conduction and switching power losses [18,19]. Besides, switching frequency can be enhanced, decreasing the passive components’ size. Because of this, SiC MOSFET is a competitive technology, even though it is less reliable with respect to the Si IGBT [20].
An analytical method to design the SiC MOSFET 6-phase power conversion system is proposed in this paper to be used in offshore wind applications. To accomplish this task, the first phase is aimed at determining the voltage and current rating of the power semiconductors in order to select the suitable power module. Afterwards, the power losses and the efficiency as a function of the power are evaluated. The DC-bus capacitors are selected according to the analytical investigation. In particular, a detailed analysis of the DC-bus current stress and the voltage ripple, considering three different situations with phase displacement between the two 3-phase stator windings of the 6-phase electrical generator of 0°, 30°, and 60°, is carried out in this paper. Compared to [21], the thermal analysis is carried out and the experimental tests added in order to confirm the proposed analysis. The 6-phase topology, chosen for the boost converter design, is attractive thanks to the reliable and fault tolerance capabilities and subsequently to achieve lower maintenance costs, making it very useful for offshore wind applications. The power conversion system is shown in Figure 1, where it is possible to notice the presence of a 6-phase (two 3-phase windings) permanent magnet synchronous generator (PMSG), a 6-phase, 2-level boost rectifier (6P-2L BR) with a common DC-bus and the two-level voltage source inverter (2L-VSI) connected to the grid through the output filter.
The investigated solution is addressed to a 10kW floating offshore wind turbine prototype, to be installed in the Naples Gulf area (Italy).
This paper is organized as follows: in Section 2 the design of the 6-phase power conversion system is carried out, including the selection of the power semiconductor devices, the power loss distribution evaluation, the DC-bus rms current stress and voltage ripple analysis, and the thermal sizing; in Section 3, the simulation and experimental results are illustrated; finally, in Section 4, the contribution of the proposed work is discussed, and the conclusions are presented.

2. 6-Phase Power Conversion System Design

This section focuses on the analysis and design of the 6-phase AC–DC converter. In particular, to design the proposed power conversion system, an analytical approach was adopted by determining several parameters, such as:
  • Voltage rating and current rating to select proper power semiconductor devices;
  • Power loss distribution for the selected power semiconductor devices;
  • DC-bus current stress and voltage ripple to select an appropriate DC-bus configuration;
  • Thermal sizing to evaluate the minimum thermal resistance in order to opt for a suitable heatsink.

2.1. Voltage Rating and Current Rating

To accurately select the power module, it is essential to evaluate the voltage rating for each semiconductor device. The voltage rating VMAX is a function of two factors: the maximum blocking voltage VBL during the steady state, and the overvoltage during the commutation transient according to Equation (1).
V M A X = V B L + k R L s d i d t + V F R
In a two-level converter, the maximum blocking voltage is equal to the DC-bus voltage VBUS. The overvoltage ΔV, instead, depends on many factors, such as the leak inductance LS, the current transient di/dt, the coefficient kR to consider possible resonance in the DC-bus circuit, and the voltage drop across the free-wheeling diode VFR [22,23]. Therefore, the voltage rating can be estimated as in (1). In the considered application, VBUS is 750 V, and the maximum blocking voltage VMAX across the semiconductor devices is valued at 860 V; thus, the optimum voltage rating of the 6-phase power converter is 1200 V.
Once the maximum blocking voltage of the power semiconductor devices has been determined, it is necessary to study the current stress to which the power semiconductor devices are subjected. The current stress for each power semiconductor device can be found by resolving the equations for the average and RMS currents in (2) and (3), in which T0 represents the fundamental period, i(t) is the phase current, and dx stands for the duty cycle.
I A V , x = 1 T 0 0 T 0 i t d x t d t
I R M S , x = 1 T 0 0 T 0 i 2 t d x t d t
The sinusoidal phase current can be stated as in (4), where Irms is the rms value of the phase current, ω0 is the fundamental frequency, and φ is the phase displacement between the input phase voltage and the corresponding phase current.
i ( t ) = 2 I r m s sin ( ω 0 t φ )
Considering a sinusoidal pulse width modulation (SPWM), the duty cycle waveform can be found as in (5), where the subscript “p” stands for the top switches, whereas the subscript “n” represents the bottom switches, and M is the modulation depth [23].
d p ( t ) = 1 d ( t ) = 1 2 1 M sin ( ω 0 t ) d n ( t ) = 1 2 1 + M sin ( ω 0 t )
Replacing the (4) and (5) into (2) and (3), the current stress for the power semiconductors can be obtained as in (6):
I A V , T = 2 2 I r m s 1 π M cos φ 4 I R M S , T = 2 I r m s 1 24 π 3 π 8 M cos φ I A V , D = 2 2 I r m s 1 π + M cos φ 4 I R M S , D = 2 I r m s 1 24 π 3 π + 8 M cos φ
where the subscripts “T” and “D” stand for MOSFET and diode, respectively.
The achieved values for the MOSFET average and rms currents and for the diode average and rms current are illustrated in Figure 2 as a function of the transfer power.
According to this analysis and considering a maximum operating power of 10 kW, DC-bus voltage VBUS equal to 750 V, the Wolfspeed SiC MOSFET power module (part number CAB016M12FM3) was selected.

2.2. Power Loss Distribution

Starting from the values reported in the datasheet of the chosen power module, the conduction and switching losses for each semiconductor device can be calculated in order to evaluate the conversion efficiency that the power module is able to achieve. In particular, using Equation (7), it is possible to estimate the conduction losses Pc of a power semiconductor, where V0 is the forward voltage and Ron is the on-state resistance: in the case of the MOSFET, the forward voltage V0 is equal to zero; the diode, instead, presents both forward voltage and on-state resistance for the establishment of its conduction losses.
P c = V 0 I A V , x + R o n I R M S , x 2
Concerning the switching losses of the MOSFET, they can be determined by linearizing around the operative conditions the energy losses provided by the datasheet of the manufacturer. Thus, the switching losses were evaluated according to (8), in which fsw is the switching frequency, and kon and koff are two coefficients. Particularly, by normalizing the energy loss values provided by the manufacturer on the datasheet with respect to the junction temperature, the operating voltage, and the operating current of the switching device, it is possible to obtain the two factors kon and koff. Once the conduction losses and switching losses for each power semiconductor device have been determined, the total losses Ploss of the 6-phase boost rectifier can be calculated as in (9), where Pc,T and Psw,T are the conduction and switching losses related to the power switch, and Pc,D and Psw,D are the conduction and switching losses related to the power diodes. In (9), the reverse recovery losses of the SiC diodes are neglected.
P s w = f s w k o n + k o f f 1 T 0 0 T 0 i ( t ) d t = 1 π f s w k o n + k o f f I m k o n T j , V D S , I D = k o n V D S k o n T j E o n I D I D , n o m k o f f T j , V D S , I D = k o f f V D S k o f f T j E o f f I D I D , n o m
P l o s s = 12 P c , T + P s w , T + P c , D + P s w , D
The total losses of the 6-phase boost rectifier were calculated at the switching frequency fsw of respectively 20 kHz, 60 kHz, and 100 kHz, and the results are shown in Figure 3a. In Figure 3b, instead, the conversion efficiency η of the power module is shown, evaluated as in (10), where Pin and Pout are the input and output power of the conversion system, respectively.
η = P o u t P i n = P i n P l o s s P i n = 1 P l o s s P i n

2.3. DC-Bus Design

In the design of a power electronic conversion system, a key aspect is the sizing of the DC-bus capacitors. The most appropriate DC-bus capacitor configuration was selected according to two parameters: (1) the rms DC-bus current stress, and (2) the output voltage ripple.
The rms current in the equivalent DC-bus capacitor can be calculated as in (11), in which Irms and Idc are respectively the rms current and the average current coming from the 6-phase boost rectifier. Therefore, these current values can be found by evaluating the output current of the 6-phase 2-level converter, defined as ibus(t) in Figure 1 [24]. The output current ibus(t) can be expressed as in (12), where sk(t) is the switch state and ik(t) are the input phase currents; these currents ik(t) can be formulated as in (13), assuming k = a, b, c, d, e, f. In particular, the electrical generator is a 6-phase PMSG having two 3-phase stator windings being arranged as a function of the displacement phase angle δ. For this reason, the DC-bus analysis was divided into three main cases, depending on the displacement phase angle δ between the stator windings.
I C r m s = I r m s 2 I d c 2
i b u s ( t ) = k = a f s k ( t ) i k ( t )
i a = I m sin θ φ i b = I m sin θ φ 2 3 π i c = I m sin θ φ 4 3 π i d = I m sin θ φ δ i e = I m sin θ φ 2 3 π δ i f = I m sin θ φ 4 3 π δ
Applying the method as in [25], the rms current was carried out first, considering δ = 0°. Afterward, the method was extended to δ = 30° and δ = 60°. The three-phase current waveforms for different displacement angles δ are shown in Figure 4. As can be noticed in Figure 4b, intuitively, the best solution with reference to the voltage ripple seems to be δ = 60° with respect to δ = 0° and δ = 30°. The following graphical method was carried out in order to demonstrate it. Thank to symmetry, in Figure 4a, it is possible to subdivide the sinusoidal waveforms into six intervals AF, whose period is π/3; in Figure 4b, it is possible to distinguish 12 intervals AN, whose period is π/6; in Figure 4c, it is possible to differentiate 18 intervals AT, in which there is the alternance of one interval of period π/6 and two intervals of period π/12.
By observing the waveforms during a switching period in the interval A, Figure 5. can be realized: Figure 5a illustrates the waveforms of modulation depth and the carrier signal (top figure), the duty cycles for each leg (middle figure), and the output current from the converter ibus(t) (bottom figure) in the case of δ = 0°; Figure 5b shows the same waveforms in the case of δ = 60°; and Figure 5c displays the same waveforms, but in the case of δ = 30°. As can be noticed from Figure 5a, it is possible to separate the switching period in eight intervals. The length of the interval T0T3 can be found as in (14), where Ts is the switching period. Next, the average current into the DC-bus can be evaluated for each interval AF in the case of δ = 0°, and the solution of the integral to estimate the average current gives the same results for every interval, as reported in (15).
T 0 = T s 2 1 d a = T s 4 1 M sin θ T 1 = T s 2 d a d c = T s 4 M sin θ M sin θ 4 3 π T 2 = T s 2 d c d b = T s 4 M sin θ 4 3 π M sin θ 2 3 π T 3 = T s 2 d b = T s 4 1 + M sin θ 2 3 π
I d c = 3 2 M I m cos φ
Regarding the rms current in the case of δ = 0°, in the interval A its value can be estimated from (16), where the Idc2 is expressed in (17).
I r m s A 2 = 3 π π / 6 π / 2 I d c A 2 d θ
I d c A 2 = 1 T s 2 t 1 t 2 2 i a 2 d t + 2 t 2 t 3 2 i b 2 d t = 8 T 1 T s i a 2 + 8 T 2 T s i b 2
The same process can be utilized for the other intervals BF in order to obtain the rms current of the output current ibus(t) of the power converter. The achieved expression of the rms current Irms is reported in (18).
I r m s 2 = 3 π M I m 2 4 cos 2 φ + 1
Definitively, the rms current ICrms flowing into the equivalent DC-bus capacitor for δ = 0° can be written as in (19).
I C r m s = I m M 3 π + 4 3 π 9 4 M cos 2 φ
The same procedure can be adopted for δ = 60°. Analyzing the switching period of interval A, as shown in Figure 5b, it is possible to divide it into 14 intervals T0T6. By this means, calculating the average current coming from the converter and repeating the analysis for every interval AN, even in this case, Equation (15) has been found. With regard to the rms current Irms, the formula is the same as in the previous case with δ = 0°. In this case, however, the integration period is half of the previous case, as can be noticed when comparing Figure 4a,b. Then, during a switching period of the interval A, Irms can be evaluated as in (20), where Idc2 can be carried out as in (21).
I r m s A 2 = 6 π π / 6 π / 3 I d c A 2 d θ = M I m 2 2 π 3 1 + 3 + 4 + 2 3 cos 2 φ + 19 11 3 sin 2 φ
I d c A 2 = 2 T 1 T s i f 2 + 2 T 2 T s i a + i f 2 + 2 T 3 T s i f i b 2 + 2 T 4 T s i b i e 2 + 2 T 5 T s i b 2
Performing the same calculations to obtain the rms current in interval B, the result is not the same as that in (20). In particular, the obtained expression is reported in Equation (22). Evaluating the rms current in the other ten intervals CN, the equality in (23) can be found.
I r m s B 2 = M I m 2 2 π 3 1 + 3 + 4 + 2 3 cos 2 φ + 11 3 19 sin 2 φ
I r m s A 2 = I r m s C 2 = I r m s E 2 = I r m s G 2 = I r m s I 2 = I r m s M 2 I r m s B 2 = I r m s D 2 = I r m s F 2 = I r m s H 2 = I r m s L 2 = I r m s N 2
By averaging over the fundamental period, the expressions of the 12 intervals, the rms current ICrms flowing through the equivalent DC-bus capacitor for δ = 60° can be evaluated as in (24).
I C r m s = I m M 3 1 2 π + 4 + 2 3 π 9 4 M cos 2 φ
Applying the same method seen previously, even in the case of δ = 30°, it is possible to estimate the average current as in (18) for each interval AT Figure 4c. Instead, like the case of δ = 60°, the rms current can be calculated in each interval AT and then averaged over the fundamental period. By this means, it is possible to carry out the rms current into the equivalent DC-bus capacitor for δ = 30°, as in (25).
I C r m s = I m M 5 3 + 2 6 4 2 4 6 π + 7 3 + 4 6 + 4 2 5 3 π 9 4 M cos 2 φ
Eventually, the waveforms of ICrms were plotted in MATLAB as a function of φ and M, as shown in Figure 6. The maximum values of the rms DC-bus current, normalized with respect to the peak of the phase current Im as a function of the phase displacement δ, occur when cosφ = 1 and M is close to 0.6 and are listed below: ICrms/Im = 0.92 when δ = 0°, ICrms/Im = 0.87 when δ = 30°, ICrms/Im = 0.83 when δ = 60°.
To design a suitable DC-bus capacitor configuration for the 6-phase power conversion system, the second step is the evaluation of the output voltage ripple. To do this, Equation (26) is considered, where vC0 is the voltage initial value, ΔVC is the voltage ripple, and iC(t) is the instantaneous current into the equivalent DC-bus capacitor reported in (27).
v C = v C 0 + 1 C i C d t = v C 0 + Δ V C
i C ( t ) = i b u s ( t ) I d c
The peak-to-peak voltage ripple can be estimated as in (28) [26].
Δ v p p = max Δ V C T s w min Δ V C T s w
The waveforms of the instantaneous current through the equivalent capacitor iC(t) and the peak-to-peak voltage ripple Δvpp over the switching period when the phase displacement δ is equal to 0° are illustrated in Figure 7. Specifically, the Δvpp can be estimated considering two different cases: in the first, the current Idc is lower than the phase current ia (case A), as shown in Figure 7a; in the second, the current Idc is greater than the phase current ia (case B), as illustrated in Figure 7b. As can be seen, on the one hand, the voltage ripple Δvpp shows a symmetric trend, while on the other hand the voltage ripple Δvpp shows an asymmetrical behavior. Subsequently, the maximum voltage ripple Δvpp can be evaluated by integrating iC over the period 2T3 in the first case, and by integrating iC over the period 2(T0 + T1) in the second case. The maximum voltage ripple Δvpp can be expressed as in (29), where Im is the maximum phase current, fsw is the switching frequency, C is the equivalent capacitor value, and rpp can be found as in (30) in case A and as in (31) in case B. By varying θ = 2πf0t, φ, M, and combining the maximum ripple value between case A and case B, the maximum voltage ripple can be estimated for δ = 0° as in (32).
Δ v p p = I m f s w C r p p M , θ , φ
r p p A M , θ , φ = 3 4 M cos φ 1 + M sin θ 2 3 π
r p p B M , θ , φ = 3 4 M cos φ 1 M sin θ + 3 4 M cos φ sin θ φ M sin θ M sin θ 4 3 π
Δ v p p = 3 4 I m f s w C
Similarly, it is possible to obtain the voltage ripple Δvpp in the case of δ = 30° and δ = 60°. Indeed, Figure 8 shows the instantaneous current iC(t) and the peak-to-peak voltage ripple Δvpp over the switching period when the phase displacement δ is equal to 30° and 60°. In this case, the waveforms, as illustrated in Figure 8, show the same behavior for both δ = 30° and δ = 60°. By integrating iC over the period 2T6 in case A (Figure 8a), and by integrating iC over the period 2(T0 + T1 + T2) in case B (Figure 8b), it is possible to obtain the maximum voltage ripple as in (29): in (33), the estimated maximum voltage ripple in the case of δ = 60° is presented; in (34), the estimated maximum voltage ripple in the case of δ = 30° is stated.
Δ v p p = 3 8 I m f s w C
Δ v p p = 0.261 I m f s w C
Summarizing the obtained results of the voltage ripple Δvpp and rms DC-bus current normalized with respect to the peak of the phase current ICrms/Im as a function of the phase displacement δ in Table 1, the worst case can be defined when δ = 0° and the best case when δ = 60°, as expected. It is important to say that if one increases δ over 60° or decreases it, the voltage ripple increases.
Assuming the fault tolerance capability, if a converter fails, the power conversion system continues to deliver power, but the voltage ripple will double with respect to the best situation with δ = 60°. For this reason, considering the worst case of δ = 0° and Δvpp = 0.1%VBUS, the required total capacitor value is equal to 278 μF. According to this analysis, 12 TDK film capacitors (2 for each phase leg) in parallel can be used, where the single capacitor is equal to 30 μF. Knowing the equivalent series resistance (ESR) of the selected capacitor, it is possible to estimate the DC-bus capacitor losses as in (35).
P B U S = 12 E S R I C r m s 12 2

2.4. Thermal Sizing

Thermal sizing is a fundamental step in the design of a power electronic converter. The aim is to size a heatsink capable of dissipating the heat produced by the power semiconductor devices, assuming negligible losses of the DC-bus capacitors. On the basis of the power losses shown in Figure 3, it is possible to evaluate the maximum value of the thermal resistance in order to choose a suitable heatsink.
The thermal equivalent of Ohm’s law is expressed in (36).
Δ T = R t h P l o s s
Furthermore, an equivalent thermal circuit can be realized, as shown in Figure 9, in which Ta, Ts, Tc, and Tj are, respectively, the ambient temperature, the heatsink temperature, the case temperature, and the junction temperature of the semiconductor devices; while Rth(j-c) is the thermal resistance between the junction of a device and the case, Rth(c-s) is the thermal resistance between the case and the heatsink, and Rth(s-a) is the thermal resistance between the heatsink and the environment. Assuming the maximum transfer power of 10 kW, a junction temperature Tj = 120 °C, and the switching frequency fsw = 100 kHz, the maximum temperature leap between the junction temperature of the power semiconductor devices and the case temperature was carried out using Equation (36).
Then, considering an ambient temperature Ta = 40 °C, it is possible to evaluate the thermal resistance Rth(s-a) between the heatsink and the external environment as in (37), where Ploss,T and Ploss,D stand for the power losses of the MOSFET and the diode, respectively.
R t h ( c a ) = T c T a 6 P l o s s , T + P l o s s , D
Assuming the arrangement of three Wolfspeed power modules on a heatsink, the power losses of the MOSFET and the diode have to be multiplied for the number of the power semiconductor devices. By this means, the maximum value of the thermal resistance Rth(s-a) = 0.72 °C/W was found. Since any heatsink with lower thermal resistance than the value obtained is suitable, Fisher Elektronik’s SK 47 extruded air heatsink was considered, characterized by a thermal resistance Rth(s-a) = 0.53 °C/W.

3. Results

To validate the proposed analysis, the analytical results were compared to simulated ones using the Plexim/PLECS tool in the MATLAB/Simulink environment. Afterward, a prototype of the converter was built and the experimental results carried out for further validation.

3.1. Simulation Results

To obtain simulation results and compare them with the obtained analytical results, a PLECS model of the power converter was realized and thermal models of the power devices created. The simulation results were carried out considering an input phase voltage of 245 V, a DC-bus voltage of 750 V, and a variable power between 1 kW and 10 kW. Figure 10a and Figure 10b show the power losses and the efficiency related to the only power semiconductors estimated for different switching frequencies: 20 kHz, 60 kHz, and 100 kHz, respectively.
As can be seen from Figure 10b, in the case of power lower than 3 kW, the efficiency at 20 kHz is lower than the ones at 60 kHz and 100 kHz. This happens because the phase current ripple at 20 kHz is much greater than the ripple at 60 kHz and 100 kHz; thus, the power converter works in discontinuous mode for a significant part of the fundamental period. This is confirmed by the fact that the power losses at 20 kHz are higher with respect to 60 kHz and to 100 kHz in the case of output power lower than 3 kW, as shown in Figure 10a. The DC-bus rms current ICrms and voltage ripple Δvpp evaluated for the three phase displacements of 0°, 30°, and 60° are shown in Figure 11a,b. It can be seen in Figure 11a that the simulation results are perfectly superimposed; additionally, as can be noticed from Figure 11b, among the analyzed cases, the worst case for the voltage ripple happens at δ = 0°, whereas the best case for the voltage ripple occurs at δ = 60°.

3.2. Experimental Results

The prototype of the 6-phase boost rectifier was built and the experimental results carried out for further validation of the proposed analysis. The prototype of the 6-phase converter is illustrated in Figure 12. Each phase is equipped with its own driving circuit, current sensor, and two capacitors. The experimental tests were obtained using the 6-phase PMSG with the following parameters: PM machine rated speed equal to 3000 rpm, PM machine pole-pairs equal to 5, PM machine inductance equal to 0.4 mH, and flux equal to 0.11 Wb.
Figure 13a shows the back electromotive force waveforms of the 6-phase PMSG with an rms value of 160 V and the phase angle θ = ω0t, with ω0 = 150 rad/s. Two of the phase currents of the 6-phase boost rectifier and the DC-bus voltage VBUS are illustrated in Figure 13b, where the rms phase current is about 15 A and VBUS is close to 750 V. Figure 14 shows the trend of the DC-bus rms current stress ICrms and the DC-bus voltage ripple Δvpp as a function of the output power at the phase displacement δ = 30°, obtained by comparing the simulation and experimental results. To validate the 60° electrical drive, a hardware-in-the-loop (HIL) was used.
An inverter thermal model was coded for the HIL solver and a real-time simulation was performed. The achieved results are illustrated in Figure 15, which shows the comparison between the analytics and simulation results considering δ = 60°. Moreover, comparing the obtained results in Figure 14 and Figure 15, the good agreement between the 30° and the 60° machines can be seen, validating the proposed approach. Figure 16 illustrates the comparison between the experimental results and the simulations of the conversion efficiency, considering a switching frequency of 60 kHz.

4. Conclusions

The design of a 6-phase boost rectifier was carried out. First of all, the SiC MOSFET power module (manufacturer: Wolfspeed, part number: CAB016M12FM3) was selected on the basis of the estimated voltage rating and current rating. Consequently, the power losses and efficiency were calculated for the different values of the switching frequency (20 kHz, 60 kHz, and 100 kHz). The results show that the peak efficiency of the 6-phase boost rectifier was able to reach 98% at 100 kHz switching frequency. Special attention was given to the analysis of both the DC-bus current stress and the output voltage ripple. From the obtained analysis it was found that the worst case of the DC-bus current stress and the output voltage ripple occurred when δ = 0°, while the best case of the DC-bus current stress and the output voltage ripple occurred when δ = 60°. To reach 0.1% VBUS peak-to-peak voltage ripple, 12 film parallel capacitors (manufacturer: TDK, part number: B32778G0306K000) were selected. From the thermal sizing, the extruded air heatsink SK 47 produced by Fisher Elektronik was chosen. The simulation results obtained by creating the model in the Plexim/PLECS environment validated the analytical results. Furthermore, the prototype of the designed 6-phase boost rectifier was realized and the experimental results were carried out, validating the proposed analysis.

Author Contributions

Funding acquisition, A.L. and L.S.; Investigation, G.D.N. and M.d.B.; Methodology, G.D.N., M.d.B. and A.L.; Project administration, L.S.; Resources, L.S.; Supervision, A.L.; Validation, G.D.N., M.d.B. and A.L.; Visualization, G.D.N. and M.d.B.; Writing—original draft, G.D.N. and M.d.B.; Writing—review & editing, A.L. and L.S. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Italian Ministry of Economic Development (MISE) under Grant Agreement “RdS PTR 2019-2021-27 Energia elettrica dal mare”.

Institutional Review Board Statement

The study does not involve humans or animals.

Informed Consent Statement

The study does not involve humans or animals.

Data Availability Statement

The study does not report any data.

Acknowledgments

The authors wish to thank Marco Salvi and E.D. Elettronica Dedicata S.r.l. for providing the 6-phase full SiC inverter used in the proposed analysis and experimental tests.

Conflicts of Interest

The authors declare no conflict of interest.

References

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Figure 1. Power conversion system configuration.
Figure 1. Power conversion system configuration.
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Figure 2. Average and rms current waveforms of the MOSFET and the diode as a function of the transfer power.
Figure 2. Average and rms current waveforms of the MOSFET and the diode as a function of the transfer power.
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Figure 3. (a) Power losses Ploss of the 6-phase boost rectifier and (b) conversion efficiency assuming the switching frequency fsw of 20 kHz (yellow line), 60 kHz (red line), and 100 kHz (green line), respectively.
Figure 3. (a) Power losses Ploss of the 6-phase boost rectifier and (b) conversion efficiency assuming the switching frequency fsw of 20 kHz (yellow line), 60 kHz (red line), and 100 kHz (green line), respectively.
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Figure 4. Phase current waveforms of the 6-phase boost rectifier considering (a) δ = 0°, (b) δ = 60°, and (c) δ = 30°.
Figure 4. Phase current waveforms of the 6-phase boost rectifier considering (a) δ = 0°, (b) δ = 60°, and (c) δ = 30°.
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Figure 5. DC-bus current stress analysis in a switching period considering (a) δ = 0°; (b) δ = 60°; and (c) δ = 30°.
Figure 5. DC-bus current stress analysis in a switching period considering (a) δ = 0°; (b) δ = 60°; and (c) δ = 30°.
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Figure 6. The rms DC-bus current normalized with respect to the peak of the phase current as a function of (a) the modulation depth M, and (b) the power factor φ, where the yellow line represents δ = 0°, the red line represents δ = 30°, and the blue line represents δ = 60°.
Figure 6. The rms DC-bus current normalized with respect to the peak of the phase current as a function of (a) the modulation depth M, and (b) the power factor φ, where the yellow line represents δ = 0°, the red line represents δ = 30°, and the blue line represents δ = 60°.
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Figure 7. Voltage ripple analysis in the switching period considering δ = 0°, ibus(t) (red trace), Idc (violet trace), and voltage ripple (green trace): (a) shows case A, in which Idc is lower than the phase current ia; (b) shows case B, in which Idc is greater than the phase current ia.
Figure 7. Voltage ripple analysis in the switching period considering δ = 0°, ibus(t) (red trace), Idc (violet trace), and voltage ripple (green trace): (a) shows case A, in which Idc is lower than the phase current ia; (b) shows case B, in which Idc is greater than the phase current ia.
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Figure 8. Voltage ripple analysis in the switching period considering δ = 30° and δ = 60°, ibus(t) (red trace), Idc (violet trace), voltage ripple (green trace): (a) shows case A, in which Idc is lower than the phase current ia; (b) shows case B, in which Idc is greater than the phase current ia.
Figure 8. Voltage ripple analysis in the switching period considering δ = 30° and δ = 60°, ibus(t) (red trace), Idc (violet trace), voltage ripple (green trace): (a) shows case A, in which Idc is lower than the phase current ia; (b) shows case B, in which Idc is greater than the phase current ia.
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Figure 9. Equivalent thermal circuit.
Figure 9. Equivalent thermal circuit.
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Figure 10. Simulation results of: (a) the power losses and (b) the power conversion efficiency assuming a switching frequency fsw of 20 kHz (green line), 60 kHz (yellow line), and 100 kHz (blue line).
Figure 10. Simulation results of: (a) the power losses and (b) the power conversion efficiency assuming a switching frequency fsw of 20 kHz (green line), 60 kHz (yellow line), and 100 kHz (blue line).
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Figure 11. Simulation results of: (a) the DC-bus current stress, and (b) the voltage ripple.
Figure 11. Simulation results of: (a) the DC-bus current stress, and (b) the voltage ripple.
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Figure 12. Prototype of the 6-phase boost rectifier.
Figure 12. Prototype of the 6-phase boost rectifier.
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Figure 13. Experimental results of the 6-phase AC–DC converter: (a) back electromotive force considering the phase displacement δ = 30° (100 V/div, 10 ms/div), and (b) input current waveforms of two phases and DC-bus voltage VBUS (yellow line) (10 A/div, 100 V/div).
Figure 13. Experimental results of the 6-phase AC–DC converter: (a) back electromotive force considering the phase displacement δ = 30° (100 V/div, 10 ms/div), and (b) input current waveforms of two phases and DC-bus voltage VBUS (yellow line) (10 A/div, 100 V/div).
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Figure 14. Comparison between experimental results, simulation results, and analytics results of: (a) the DC-bus rms current stress, and (b) the DC-bus voltage ripple power conversion efficiency assuming the phase displacement δ = 30°.
Figure 14. Comparison between experimental results, simulation results, and analytics results of: (a) the DC-bus rms current stress, and (b) the DC-bus voltage ripple power conversion efficiency assuming the phase displacement δ = 30°.
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Figure 15. Comparison between HIL results, simulation results, and analytics results of: (a) the DC-bus rms current stress, and (b) the DC-bus voltage ripple power conversion efficiency assuming the phase displacement δ = 60°.
Figure 15. Comparison between HIL results, simulation results, and analytics results of: (a) the DC-bus rms current stress, and (b) the DC-bus voltage ripple power conversion efficiency assuming the phase displacement δ = 60°.
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Figure 16. Efficiency as a function of the power: comparison between simulations and experimental results.
Figure 16. Efficiency as a function of the power: comparison between simulations and experimental results.
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Table 1. DC-bus voltage ripple and rms current stress results.
Table 1. DC-bus voltage ripple and rms current stress results.
Phase Displacement δVoltage Ripple ΔvppNormalized Current Stress ICrms/Im
Δ v p p = 3 4 I m f s w C 0.92
30° Δ v p p = 0.261 I m f s w C 0.87
60° Δ v p p = 3 8 I m f s w C 0.83
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Di Nezio, G.; di Benedetto, M.; Lidozzi, A.; Solero, L. Analysis and Design of a High-Efficiency SiC MOSFET 6-Phase Boost Rectifier. Energies 2022, 15, 2175. https://doi.org/10.3390/en15062175

AMA Style

Di Nezio G, di Benedetto M, Lidozzi A, Solero L. Analysis and Design of a High-Efficiency SiC MOSFET 6-Phase Boost Rectifier. Energies. 2022; 15(6):2175. https://doi.org/10.3390/en15062175

Chicago/Turabian Style

Di Nezio, Giulia, Marco di Benedetto, Alessandro Lidozzi, and Luca Solero. 2022. "Analysis and Design of a High-Efficiency SiC MOSFET 6-Phase Boost Rectifier" Energies 15, no. 6: 2175. https://doi.org/10.3390/en15062175

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