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Article

High Performance Single and Double Loop Digital and Hybrid PID-Type Control for DC/AC Voltage Source Inverters

Department of Automatic Control and Robotics, Silesian University of Technology,16 Akademicka St, 44-100 Gliwice, Poland
*
Author to whom correspondence should be addressed.
Energies 2022, 15(3), 785; https://doi.org/10.3390/en15030785
Submission received: 15 November 2021 / Revised: 17 December 2021 / Accepted: 10 January 2022 / Published: 21 January 2022
(This article belongs to the Topic Power System Modeling and Control)

Abstract

:
The concept of hybrid control has been introduced, in which the analog implementation of the control algorithm is combined with a digital algorithm for determining the PWM duty cycle. Single-loop PD and PID control systems are compared to a double-loop architecture with additional capacitor current sensing for both digital and hybrid controller realizations. The performance is measured as the THD value under resistor-capacitor rectifier load. It has been shown that a properly constructed continuous-time model of a digital controller with a PWM power converter behaves like the actual discrete-time system, which allows for a simple controller analysis and design. The role of a PWM type for capacitor current feedback is emphasized. The simulation models of a real inverter are presented, which are used to tune the controllers and to evaluate the control performance for both rectifier and abruptly changing resistive load. The obtained solutions achieve the THD values comparable to the VSI without load. The results are contrasted with the control methods based on resonant filters.

1. Introduction

DC/AC Voltage Source Inverters (VSI) are commonly used as a basic component of Uninterruptible Power Supply (UPS) units to convert the DC energy contained in batteries into the appropriate AC voltage when the mains power fails. Due to the ever increasing availability of renewable energy sources, single-phase UPS inverters have also found wide application in supplying local electric power networks.
The sinusoidal output voltage of inverters consisting of conservative passive components and semiconductor components acting as switches is obtained by a Pulse Width Modulated (PWM) signal.
The performance of the inverter is usually measured as the Total Harmonic Distortion (THD) value of the output voltage under the standard non-linear rectifier resistor-capacitor (RC) load. Another measure of performance is the distortion of the output voltage caused by a sudden decrease or increase of the resistive load. In the article, we use both performance indicators regardless of the source of the distortion.
Since the performance of simple inverters without feedback control is usually not satisfactory, many control schemes and algorithms have been proposed in the literature. Since the 1990s, articles have been published that consider combining almost all known control algorithms that appeared then in control theory, including both continuous and discrete, with various inverter models.
Recent developments include digital control strategies such as repetitive control [1,2,3,4,5], dead-beat control [6,7], and discrete-time sliding mode control [8,9].
Due to the sinusoidal reference, a popular concept is to use resonant controllers that have excellent reference tracking ability under a constant resistive load. Unfortunately, single-loop control based on a Resonant (R), Proportionally Resonant (PR) [10,11,12,13], or Repetitive Controller (RC) [2], have poor disturbance rejection properties.
Therefore, a double-loop architecture was proposed, where the outer loop should follow the reference sine wave and the inner loop should be responsible for disturbance attenuation. For this purpose, the outer loop was equipped with a Resonant (R), Proportional Resonant (PR), or Repetitive Controller (RC), and the inner loop for controlling the filter capacitor current was usually based on a proportional controller [2,14,15,16].
Even more complex multi-loop structures with DC bus voltage decoupling and load current compensation are shown and discussed in [17]. Another sophisticated multi-input solution is the Passivity-Based Control (PBC) [18,19,20] which uses three input variables: Output voltage, and the inductor and output currents [7].
Since the task of the VSI control is to stabilize the amplitude of the output voltage, not its phase, reasonable solutions focus on disturbance rejection rather than reference tracking. This is possible both in the double-loop structure and in a simple single loop that does not require additional sensors. This makes it possible to use a simpler Proportional-Integral (PI) controller in the outer loop in a double-loop structure, or a Proportional-Integral-Differential (PID) in the single-loop structure, instead of a resonant R controller or proportionally-resonant PR which cause bad dynamics [14,17,21,22,23]. To maintain the amplitude of the output voltage, this may only require modifying the amplitude of the reference signal. One approach in this category is the Coefficient Diagram Method (CDM), which leads to single loop with dynamical controllers of higher order [7,24,25].
It should be noted that it is practically impossible to compare the results presented in the literature. They are written at various levels of abstraction, ranging from a verbal description of the expected features of presented systems and ending with specific quantitative results. The power part is modeled very differently, ranging from treating the PWM signal as continuous, leading to a continuous-time description, to sophisticated discrete-time models [26,27]. Some papers, e.g., [2,17], completely neglect digital data processing and treat inverters as continuous-time systems. Others, such as [12,15], only use the sampling rate to discretize continuous-time controllers that were designed, neglecting the effect of sampling and PWM.
To evaluate different algorithms, comparisons should be made for inverters with the same parameters. This requirement is fulfilled in [7,28,29,30] where the results refer to the same physical system. Unfortunately, it is unclear to what extent the conclusions are valid for other systems. For more general results, a theoretical model for control design is required along with a simulation model to validate the results. This gives flexibility, which makes it possible to test systems with different parameters. Such methodology, based on the Quasi-Continuous-Time (QCT) model of the PWM-controlled system, developed in [31] for a single-loop digital PID control, has been extended in this article to include hybrid analog-digital control and double-loop structures.
The article is inspired by the research devoted to double-loop control structures with additional capacitance current control [14,17,21,22,23], and on the influence of the sampling rate on single-loop digital PID inverter control [31]. The positive effect of improving performance with an increasing sampling rate is mainly due to the shortening of the one-step delay introduced by the digital controller. This delay can be eliminated by replacing the digital controller by a delay-less analog algorithm. Such a controller can be embedded in a digital control system forming a hybrid control system in which an analog setpoint is obtained as the output of DAC converting the reference value taken from a pre-computed table, and the analog controller output is converted to the digital one used to determine the duty ratio for a digital PWM forming system.
The article focuses on the comparison of a single-loop Proportional-Differential (PD) or PID-type control with a double-loop structure consisting of an inner P capacitor current control loop and an outer P or PI output voltage control loop. Both analog and digital realizations of the control algorithms are taken into account and the influence of both the PWM type and sampling frequency is studied. All control structures are optimally tuned to the RC rectifier load case by simulations carried out using the QCT approach and validated on the PWM model. For comparison with other results, the article is based on the parameters of an experimental VSI designed for the carrier frequency f s = 25.6 kHz, which was presented in [7,29,30]. Although it was designed for the carrier frequency f s = 25.6 kHz, it will be used in the article for two additional frequencies, 12.8 and 51.6 kHz.

2. Double-Loop Control Architecture, PWM Strategies, and QCT Inverter Model

2.1. Double-Loop Control Architecture

Consider the systems depicted in Figure 1 and assume that the Equivalent Serial Resistance (ESR) of the capacitor is negligible.
A distinctive feature of a double-loop structure, proposed in [14,17,21,22,23] and depicted in Figure 1, consisting of an inner capacitor current control loop and an outer voltage control loop, is that the current i c is proportional to the first derivative of v o u t , i.e.,
i c ( t ) = C F d d t v o u t ( t ) .
As a result, instead of differentiating v o u t ( t ) to be used in control algorithms, which can not be done exactly, the signal proportional to the exact derivative of v o u t ( t ) can be sensed.
Two combinations of controllers were proposed:
C v ( s ) = k v , s + c s C i ( s ) = k i ,
C v ( s ) = k v s + c s , C i ( s ) = k i .
The first one, called further 2L P+P, is equivalent with a single-loop control system fitted with an ideal PD controller, while the second, called 2L PI+P, is equivalent with a single-loop control system fitted with an ideal PID controller. Their transfer functions are:
C ( s ) = ( k v + s C F ) k i   and   C ( s ) = ( k v s + c s + s C F ) k i .
It should be emphasized that neither the substitute diagram of Figure 1b nor the controllers with a purely differentiating term are physically realizable, and as a result, double-loop systems cannot be simply replaced by single-loop ones. This also suggests that the double-loop structures can be superior to the single-loop ones, but at the cost of an additional sensor. Therefore the main aim of the article is to compare the performance of these structures.
The systems presented in the aformentioned literature were purely analog with the natural PWM created by comparing a saw-tooth carrier with the analog output from the current controller. Any analysis was done assuming the PWM signal as a continuous-time one. It can easily be shown that such a system would be stable at any, even very large, values of k i and k v , leading to ideal control with a control error approaching zero. As for the actual PWM system, this is of course not true.
Nowadays, in the digital age, analog systems are considered obsolete since all analog solutions can be cheaply replaced by the digital ones. However, in the area of high-speed control systems, this is not entirely true since computations take time that leads to delays affecting the performance. Therefore, we also consider hybrid control, taking the advantages of both analog and digital techniques with an analog delay-less controller core and digital set-point and PWM generation.
To summarize, our task is to consider and compare double-loop and single-loop structures in both purely digital as well hybrid realization. This is illustrated in Figure 2 and Figure 3 along with the notation used to distinguish the particular structure.

2.2. Preliminaries: Open Loop System

The LC filter acts as a controlled plant, the output of which is to follow the amplitude of the reference sine wave V m sin ω t despite the variable load depicted in Figure 4.
The dynamics of the inverter can be represented by transfer functions K ( s ) related to particular modes of operation. As shown in [31], for the idle period there is:
K ( s ) = 1 L F C F s 2 + R F C F s + 1
for the resistive load:
K ( s ) = 1 L F C F s 2 + [ L F R L + R F C F ] s + 1 + R F R L
and for the conducting rectifier mode:
K ( s ) = b 1 s + b 0 a 3 s 3 + a 2 s 2 + a 1 s + a 0 ,
with a 3 = R L s R L C L L F C F , a 2 = R L s C F ( L F + R F R L C L ) + R L L F ( C F + C L ) , a 1 = R L s ( R F C F + R L C L ) + R L R F ( C F + C L ) + L F , a 0 = R L s + R L + R F , b 1 = R L s R L C L , b 0 = R L s + R L .
For
R F = 1 Ω , L F = 1 mH , C F = 50 μ F
as in [7,29], the characteristics of these transfer functions are presented in Figure 5.

2.3. PWM Strategies

The inverters are controlled by the PWM signal produced by the appropriate switching of MOSFET or IGBT transistors in the the H-bridge legs which produces a three-level PWM signal taking the values V D C , V D C and 0 whose entire length over the carrier period h equals to d ( i h ) h . Duty ratio d ( t ) plays the role of the control variable. There are many PWM strategies that use different switching techniques [32] implemented in microcontrollers as so-called PWM with regular sampling, as opposed to natural PWM produced using analog comparators. Figure 6 shows two symmetrical double-edge PWM along with the single-edge PWM and PAM. Symmetrical double-edge PWM signals are denoted by PWM Λ and PWM V according to the isosceles shape of the triangular carrier signal. PWM Λ consists of two pulses of width h d ( i h ) / 2 : One at the beginning of the sampling period and one at the end. PWM V consists of one pulse of width h d ( i h ) symmetrical around the centre of the period. As opposed to them, a non-symmetrical single-edge PWM S signal is produced by comparison of the constant value with a sawtooth signal. Pulse Amplitude Modulation (PAM) is a standard modulation strategy used in the classical theory of sampled-data control systems. Its amplitude equals to V D C d ( i h ) . As a result, the area of all pulses equals to V D C h d ( i h ) . The PWM modulators are built into modern signal processors and digital controllers. Pulse Amplitude Modulation (PAM) has a purely theoretical value in the VSI context.

2.4. QCT Model of the PWM Controlled Inverter Output

Consider two models of the open-loop system with the rectifier RC load depicted in Figure 7, where:
M = V m V D C .
is called the modulation index. In the article V m = 20 V and V D C = 40 V are assumed as default values.
The first model contains a PWM modulator, the second assumes a linear controllable voltage source with a reference signal delayed by τ . The appropriate value of τ can be determined as a mean delay introduced by the modulator.
Assume that the system is unloaded and denote:
v o u t ( t ) = k = 0 A k sin k ω t + φ k
the output signal v o u t ( t ) , and:
γ = τ h = φ 1 r e f φ 1 ω h
the relative delay, where φ 1 r e f is the phase shift introduced by the LC filter, and φ 1 is the phase shift of the first harmonic after passing the sinusoidal reference through the modulator and filter. The results for three values of the sampling rate f s and three values of the modulation index M are collected in Table 1.
It is noticeable that PAM, PWM V , and PWM Λ are characterized by τ = h / 2 , while PWM S lives its own life. However, although the system with PWM S is nonlinear, the delay does not exceed h / 2 . Linearity is one reason to prefer symmetrical PWM.

2.5. Distortion Functions and Total Harmonic Distortion-THD

Denoting the distortion function ψ ( t ) as:
ψ ( t ) = v o u t ( t ) A 1 sin ( ω t + φ 1 ) A 1 = 1 A 1 k = 2 A k sin ( k ω t + φ k ) ,
the quality of the output voltage can be expressed by the value of THD H defined as:
THD H = 1 A 1 k = 2 H A k 2
for H high enough, i.e., covering an interesting range of harmonics. Similarly, a distortion function χ ( t ) can be defined for a control signal determined by the duty ratio d ( t ) . Let:
d ( t ) = k = 0 B k sin ( k ω t + ϕ k ) .
Then the distortion function of d ( t ) is:
χ ( t ) = d ( t ) B 1 sin ( ω t + ϕ 1 ) B 1 = 1 B 1 k = 2 B k sin ( k ω t + ϕ k ) .

2.6. Distortion and THD Function in Open-Loop VSI without Load

A comparison of the distortion functions for an unloaded VSI with open loop, characterizing the deviation of the actual output from its first harmonic, obtained for various PWM types and various carrier frequencies f s , is presented in Figure 8. The residual values of the carrier frequency are represented there as time functions. Surprisingly, they can have quite large values, especially at 12.8 kHz. The THD values are collected in Table 2 for all modulation methods. Note that they depend on both the modulation factor M and f s . They play the role of a lower bound for a feedback-controlled VSI.
Since the THD values for PWM Λ are smaller than those for PWM S , this is the second reason that PWM Λ is used in the article in contrast to [31] which is based on PWM S .
The THD values for PAM depend only on f s and are more than two orders smaller than those of PWM Λ . Unfortunately, since PAM is technically irrelevant to the VSI, this finding is only of theoretical value.

2.7. Capacitor Current and QCT Method

While the output voltage v o u t ( t ) seems to be a smooth function of time, the capacitor current i c ( t ) is not. Since the capacitor current i c ( t ) is proportional to the first derivative of the output volatage v o u t ( t ) , and v o u t ( t ) is contaminated with a ripple presented in Figure 8, then the ripple gets amplified in i c ( t ) . Figure 9 presents i c obtained assuming three types of PWM together with the output from the QCT model and the values sampled at sampling instants. It should be noted that despite the widely scattered inter-sample values, the samples obtained using PWM Λ and PWM V coincide with the results of the QCT model. With the exception of the PWM S , there is a close proximity of all models at sampling points in spite of large inter-sample variability of PWM-controlled systems. This also justifies the QCT model for non-smooth outputs provided that the appropriate modulation type is selected. Therefore, in the article, PWM Λ is chosen.

3. Control Systems

3.1. Remarks on the Loop and Controller Gains

Note that in the schematic diagrams depicted in Figure 3 and Figure 4, the control systems work with original variable v o u t expressed in volts. This is of course not true in the physical VSI system where these variables are scaled by the measurement path to v o u t ( t ) such that:
v o u t ( t ) = k x a v o u t ( t ) ,
where the non-dimensional k x a is the gain of the measurement path chosen so that e.g., v o u t ( t ) fits the allowable range of further components. The variable v o u t ( t ) is either sampled in a digital control system, or it is a physical variable expressed in volts in analog systems. In the hybrid control system, the physical output of the controller is sampled by an ADC. In either case, sampling means conversion form volts to machine units, which can be expressed as [ x ( i h ) ] = k a d x ( i h ) , where x ( i h ) are samples of a variable x ( t ) standing either for v o u t ( t ) or the output u ( t ) of the analog controller expressed in volts, and [ x ( i h ) ] is its digital representation expressed in machine units. As a result, the dimension of k a d is 1 / V , and in the digital control system the actual output of the VSI is represented by its digital counterpart according to the formula:
[ v o u t ( i h ) ] = k D v o u t ( i h ) ,   where   k D = k x a k a d , ( 1 / V ) .
Conversion of the digital controller output [ u ( i h ) ] into the duty cycle involves another gain k P W M such that d ( i h ) = k P W M [ u ( i h ) ] . As described in [31], k P W M depends on f s . Moreover, it depends on the PWM type, and for PWM Λ or PWM V is twice as large as for PWM S . In the hybrid control system, the machine representation of the controller output u ( i h ) is [ u ( i h ) ] = k D u ( i h ) . And finally, the amplitude of the PWM signal is V D C . As a result, the entire loop gain k c whose value determines the properties of the closed loop can be expressed as:
k c = V D C k P W M k D k c ,
where k c is the controller gain.
In further considerations, we use k c or its equivalent as the loop gain. Then the gain of the physically existing controller is:
k c = k c V D C k P W M k D .
Similar considerations can be made for double loop system also with regard to i c ( t ) , such that i c ( t ) = k x a i c ( t ) with i c ( t ) expressed in (V), but they do not influence the loop gain represented by k i in the same way as k c in the single loop.

3.2. Digital Control Systems

The digital single-loop control systems with a PID controller have been the subject of extensive analysis in [31]. Here we extend the class of controllers to the PD ones. The appropriate discrete-time transfer functions are:
1 Ld ( PD ) : H ( z ) = k c ( b 0 + b 1 z 1 ) ,
1 Ld ( PID ) : H ( z ) = k c b 0 + b 1 z 1 + b 2 z 2 1 z 1 .
The QCT controllers are obtained by the following transformation:
C ( s ) = H ( z ) z 1 = 1 s h 2 1 + s h 2 .
As a result the QCT controllers in Figure 10a corresponding with those in (13) and (14) are:
1 Ld ( PD ) : C ( s ) = k c s + c h 2 s + 1 = k c s + c s + 2 h ,
1 Ld ( PID ) : C ( s ) = k c ( s + c 1 ) ( s + c 2 ) s ( h 2 s + 1 ) = k c ( s + c 1 ) ( s + c 2 ) s ( s + 2 h ) .
Discrete-time controllers applied in the double-loop structure are as follows:
2 Ld ( P + P ) : H v ( z ) = k v , b 0 + b 1 z 1 1 z 1 H i ( z ) = k i ,
2 Ld ( PI + P ) : H v ( z ) = k v b 0 + b 1 z 1 1 z 1 , H i ( z ) = k i .
The corresponding QCT controllers in Figure 10b are:
2 Ld ( P + P ) : C v ( s ) = k v , s + c s C i ( s ) = k i ,
2 Ld ( PI + P ) : C v ( s ) = k v s + c s , C i ( s ) = k i .

3.3. Hybrid Control Systems

The subject of this section is the analysis of control systems depicted in Figure 3. Consider schematic diagrams of QCT models of hybrid control systems depicted in Figure 11.
Analog controllers of the single-loop structure are:
1 Lh ( PD ) : C ( s ) = k c s + c μ s + 1 = k c s + c s + 1 μ ,
1 Lh ( PID ) : C ( s ) = k c ( s + c 1 ) ( s + c 2 ) s ( μ s + 1 ) = k c ( s + c 1 ) ( s + c 2 ) s ( s + 1 μ )
with k c = k c / μ , while in the double-loop control system there is:
2 Lh ( P + P ) : C v ( s ) = k v , s + c s C i ( s ) = k i ,
2 Lh ( PI + P ) : C v ( s ) = k v s + c s , C i ( s ) = k i .
The denominator of the transfer function in Equation (29) and (30) acts as a filter enabling the physical impementation of the PID controller. The time constant μ > 0 should be small, but at the same time large enough not to amplify noises or ripples contained in the sensed voltage v o u t ( t ) . We assume μ = h / 2 as an option compatible with a QCT model in Equation (24) of the discrete-time PID regulator in Equation (21). Then the fundamental advantage of hybrid control over digital is the lack of one-step delay in the control path in Figure 11, as it is in Figure 10.

3.4. Optimal Controller Tuning

As far as tuning of the control systems is concerned, it described in detail in [31] for single-loop discrete-time controllers. With small modifications, it can also be used for hybrid controllers. More modifications are necessary for differently parameterized double-loop systems, where for the hybrid control there is:
C ( s ) = ( k v + s C F ) k i = k i C F ( s + k v C F ) = k c ( s + c ) ,
C ( s ) = ( k v s + c s + s C F ) k i = k i C F s ( s 2 + k v C F s + k v k σ σ 0 C F ) ,
= k c ( s + c 1 ) ( s + c 2 ) s .
The easiest way is to express THD as a function of parameters k v or k v , k σ and to find its minimum assuming the value of k i providing a certain value Δ A of the gain margin for the no-load system. Another method consists in determining c 1 = c ^ 2 using methods of [31]. Exemplary surfaces of the THD values as functions of parameters are shown in Figure 12. Note the flatness of THD near the extremum. From this it follows that no particular precision of analog PID components is required.
It should also be noted that the open-loop gain, which determines the dynamics of the system, is the product of the controller gain and V C D . The gain values presented in Table 3 and Figure 13 and Figure 14 should be interpreted as open-loop gains, not just controller gains.
The difference between the THD values obtained using various values of k c as functions of the gain margin Δ A at different carrier frequencies f s are displayed in Figure 14. These characteristics can be used to determine the effect of controller detuning.

4. Simulation Results

4.1. Results for the Basic Carrier Frequency f s = 25.6  kHz

A comparison of the distortion functions, characterizing the deviation of the actual output from its first harmonic, obtained in various control structures with different types of controllers, is presented in Figure 15. It is to be noted that the 2L structures perform better than the 1L ones, and that the results of (PI+P)/(PID) are better than of (P+P)/(PD). Therefore, in the article we will focus on the 1L (PID) and 2L (PI+P) control structures. Nevertheless, the full set of results in terms of THD for (P+P)/(PD) structures is collected in Table 4.
Blurring is seen in the original PWM output around the QCT one, making the difference between their THD values shown in Figure 16, where the THD jump in f s is due to the residual presence of f s in v o u t .
The dependence of THD H on H has such property that to find controller parameters minimizing THD, it is enough to use the THD of the QCT system, taking H so that the frequencies up to the closed-loop resonant frequency f r are covered. To find the final THD value for a PWM-controlled system, the number H of harmonics taken for the calculation should be great enough to cover the carrier frequency f s .
Another interesting feature is the shape of the duty cycle d ( i h ) , which in digital systems is produced by a digital controller, and in hybrid systems can be considered as samples of a d ( t ) signal produced by an analog controller. Exemplary plots of both d ( t ) and χ ( t ) along with d ( i h ) and χ ( i h ) are displayed in Figure 17.

4.2. Results for Carrier Frequencies f s = 12.8, 25.6 and 51.2 kHz

The comparison of PD/P+P with (PID)/(PI+P) controllers shown in Figure 15 reveals the superiority of controllers with integral action. Therefore only plots for better structures (PID)/(PI+P) are presented in Figure 18 and Figure 19 and further considerations.
The THD values in the right part of Table 4 are shown graphically in Figure 20. Notice that THD of 1Ld (PID) at 25.6 kHz approximately equals to that of 1Lh (PID) at 12.8 kHz. The same applies to 2Ld (PI+P) at 25.6 kHz and 2Lh (PI+P) at 12.8 kHz. These dependencies also apply to the frequencies of 25.6 and 51.2 kHz in the sense that the use of a more complex structure 2L is equivalent to doubling the carrier frequency. This property is valid for both hybrid and digital implementations. Figure 20c suggests that this property is also valid for intermediate frequencies.

4.3. Abruptly Changing Resistive Load

As far as the effect of abruptly changed resistive load according to Figure 4b is concerned, Figure 21 shows that the 2Ld structure does not significantly improve the response. However, it shows the excellent control results for hybrid systems. Interestingly, the maximum value of ψ ( t ) is similar as in a digital system, but it extinguishes much faster, so that the THD value is smaller.

5. Other Features

In this section, comparisons of the considered structures will be made using various characteristics. Further interpretations and explanations can be gained from the root loci and frequency characteristics.

5.1. Closed-Loop Roots

The root loci of single-loop PID hybrid and digital control systems for different values f s are shown in Figure 22, with the dominant roots:
s 1 , 2 = σ 0 ± j ω 0 = σ 0 ( 1 ± j θ ) ; ω 0 = 2 π f 0
pointed by arrows. Two aspects are to be noted. First, that ω 0 thus f 0 increases as the sampling rate f s increases. Second, that at the same f s , f 0 of the hybrid system is greater than that of the digital system.
In Figure 23a, comparison is made between double-loop and single-loop systems working at the same f s = 25.6 kHz. Similarly, as previously, the f 0 of hybrid control systems is greater than of digital ones. However, when comparing f 0 of more advanced double-loop systems with simpler single-loop systems then the benefit in terms of higher frequency f 0 is much greater for a hybrid than for digital implementations. This is clearly seen in Table 5 where the dominant roots are listed for all structures (with integral action) and for all frequencies considered. These roots are also shown in Figure 24 illustrating the relationships between them graphically.
The absolute value of the real part of the root, σ , called the degree of stability, determines the rate of extinction of transients envelope. The higher σ is, the faster the transients approach zero. Specifically, the time t r to shrink the envelope r times equals to:
t r = 1 σ ln r .
θ , called the degree of oscillability, relates two consecutive amplitudes, A i + 1 and A i , by the relation:
A i + 1 A i = e 2 π θ
and determines the number of oscillations during transients. High θ values mean visually more dense filling of the space between transients asymptote by oscillations to be observed on plots of ψ ( t ) presented in Figure 15, Figure 18 and Figure 21. These parameters are collected in Table 5 and it is clearly seen in the previous plots of ψ ( t ) that they improve as f s increases.
Dominant real roots are the distinguishing feature of the 1Ld (PID) and 2Ld (PI+P) systems. As a result, the transients in the no-load mode consist of two components: Damped oscillations and a decaying exponent. This can be seen in Figure 25 as a certain asymmetry of the oscillations. Another unpleasant property is the relatively high THD value, not much better than in the uncontrolled system, and the phase lag with respect to the reference signal, see Figure 26a. The reason of the latter is the relatively small gain value that makes it necessary to increase the reference amplitude to obtain the required output voltage v o u t ( t ) at 50 Hz. Increasing the gain does not influence the phase. As a result, the system does not follow the phase but is able to maintain the required amplitude. Figure 26 shows that there are no such problems at higher carrier frequencies. Summarizing, it can be concluded that 12.8 kHz is too low a frequency for the digitally controlled VSI under consideration.

5.2. Closed-Loop Frequency Plots

Further interpretations can be obtained from the frequency plots of the complementary sensitivity function T ( ω ) and the sensitivity function S ( ω ) defined generally as:
S ( ω ) = 1 1 + C ( s ) K ( s ) s = j ω , T ( ω ) = C ( s ) K ( s ) 1 + C ( s ) K ( s ) s = j ω .
Figure 26 shows a comparison of these functions for single-loop hybrid and digital systems at all considered carrier frequencies f s . The values of resonant frequencies f r , collected in Table 6, are equal to the values f 0 which determine the pair of dominant roots defined in Equation (29) of the closed-loop system. It is to be noted that a single-loop hybrid system with μ 0 is equivalent to a double-loop hybrid system. In Figure 27, 1L and 2L structures are compared separately at all considered carrier frequencies. It is interesting to note that, analogously to THD, an upgrade from 1Ld (PID) to 1Lh (PID) is equivalent to doubling f s in 1Ld (PID). This is, however, not the case for 2L structures where an upgrade from 2Ld (PID) to 2Lh (PID) leads to a value of f r greater than the one obtained when doubling f s in 2Ld (PID).

5.3. Impact of PWM Type on Control

PWM Λ was selected as the standard PWM type in this article due to the property shown in Figure 9 that the samples of actual i c ( t ) coincide with i c ( t ) resulting from the QCT model. It is interesting to check the impact of the PWM type on control structures considered in the article. The results are shown in Figure 28. As expected, PWM Λ -controlled systems are closer to the QCT model. Surprisingly, except for the 2Lh structure, the PWM type is irrelevant to the control performance.

6. Comparison with Other Control Methods

The aim of the section is to compare our solutions with Resonant (R), Proportional-Resonant (PR), and Integral-Resonant (IR) single-loop control structures known in the literature and mentioned in the introduction. Open Loop (OL), Proportional (P), and Proportional-Integral (PI) controllers are also a part of this comparison. They are briefly discussed for digital implementations only.
Observe that for the closed-loop system to reproduce the reference magnitude V m at f o u t = 50 Hz, the V m value of the reference should be replaced by V m / T ( ω o u t ) , where T ( ω ) is defined in (39). If desired, the phase can also be adjusted by applying an appropriate phase shifter to the reference signal.

6.1. Open-Loop System with a Rectifier Load

The Open-Loop system and its QCT representation is presented in Figure 7. Note that the signal M sin ( ω t ) can be generated by a resonant controller with apropriately chosen initial conditions. To maintain amplitude A 1 of the fundamental harmonic of V o u t ( t ) independent of V D C , any change of V D C can be easily compensated in OL by adjusting M = V m / V D C . Plots of v o u t ( t ) , i o u t ( t ) , ψ ( t ) , d ( i h ) , and χ ( i h ) as well as the start-up process are presented in Figure 29.

6.2. Proportional Controller P

The continuous-time transfer function C P ( s ) and the discrete-time one are:
C P ( s ) = k p , H P ( z ) = k p .
The optimal value k p = 0.6 of the gain was found as the one minimizing THD in Figure 30d using the QCT method. Then V m has to be multiplied by (1 + 0.6)/0.6 = 2.67.

6.3. Resonant Controller R

The continuous-time transfer function C R ( s ) of the R controller and its digital implementation H R ( z ) are:
C R ( s ) = k r s s 2 + ω 2 , H R ( z ) = k r 3.9057 × 10 5 3.9057 × 10 5 z 1 1 1.9997 z 1 + 0.9998 z 2
where ω o u t = 2 π f o u t . Since for any k r , T ( ω o u t ) = 1 at f o u t = 50 Hz then V m has not been modified when using the R controller.
In Figure 31 the characteristics T ( ω ) , S ( ω ) and root locus are shown for the unloaded system along with roots at relevant values of k r . Note that the imaginary part of these roots is almost the same and equals to j ω L C at which T ( ω ) and S ( ω ) have resonant maxima. Therefore the transients in the no-load mode in Figure 32 have the same frequency f L C .
The steady-state of regulation process is presented in Figure 32, and the start-up process in Figure 33. From T ( ω ) displayed in Figure 31, it follows that in the unloaded system the sinusoidal reference can be recreated exactly regardless of k r . On the other hand, the shape of S ( ω ) , far from 0 except for ω = ω o u t , with a resonant peak at ω L C increasing with increasing k r , explains why the THD in the system with rectifier load increases with k r increasing.
Figure 32 and Figure 33 show that there is a trade-off between the THD value and the start-up time, where shortening the time results in an increase in THD. As a result, the minimum THD value approaches the OL value as k r 0 . Whenever k r > 0 , sooner or later the system automatically adjusts to V D C . In the limit situation, k r = 0 , the system becomes OL with the control signal generated by the R-controller with a zero input and appropriately selected initial values. Then, to conform to actual V D C , it needs to be sensed and compensated as described in the previous subsection.

6.4. PI, PR, and IR Controllers

Let us consider three controllers:
C P I ( s ) = k p + k i s , C P R ( s ) = k p + k r s s 2 + ω 2 , C I R ( s ) = k i s + k r s s 2 + ω 2 .
Their digital implementations can be built on the basis of earlier solutions. The performance surfaces as a function of their parameters are shown in Figure 34.
It can be interpreted that the optimal PI controller approaches P with THD = 2.90, so the optimal PR controller and IR controller also approach the R controller with THD = 3.72.

6.5. Summary

THD for the controls considered here is at best as good as that of the P controller when PR or PI is used, and for R and IR at best as in an open loop system. To avoid long start-up process, it is necessary to increase the R-controller gain, leading to a performance worse than in the open-loop system. As a result, it is hard to find a good reason to choose the former, especially if V D C = const or no compensation for its variations is necessary.
Summing up, this group of controllers is dramatically inferior to the PID-type structures analyzed in the article.

7. Conclusions

Two architectures were compared, single loop and double loop for VSI voltage control systems using hybrid (analog/digital) and purely digital controller implementations. In the double-loop variant, the the output voltage is controlled by an external loop equipped with a P or PI controller. The inner loop with a P regulator is based on the filter capacitor current. The effects of discrete-time data processing and PWM signal modulation were analyzed using the Quasi-Continuous-Time (QCT) approach that approximates such systems with continuous-time models. It has been shown that the type of PWM modulation is important for applicability of the QCT method in a double-loop control architecture where symmetric double-slope modulation is required.
While building the model and tuning the controller, the variable dynamic structure of the inverter with rectifier load was taken into account. This was achieved by using a physical VSI model in the form of electrical circuit for all calculations.
Control loop delay due to PWM signal and the digital control delay are the main factors that reduce the control performance. Delays can be reduced by increasing the sampling rate and replacing digital control algorithms with analog.
Another factor diminishing the performance is the implementation of signal differentiation either by differences in digital solutions, or filtered differentiation in analog ones. This factor is counteracted in the double-loop structure by sensing the capacitor current that is exactly proportional to the derivative of the output signal. Its disadvantage is the need for an additional sensor. When comparing more advanced double loop systems with simpler single-loop systems, the benefits in terms of THD reduction are much greater for hybrid than digital implementations. Another interesting property is that compared to a 1L structure, the use of a more complex 2L structure is equivalent to doubling the carrier frequency in the 1L structure. This property is valid for both hybrid and digital implementations.
In order to obtain good control performance, a high sampling rate should be used, and the digital control should be replaced with hybrid in which the analog controller core is integrated with a microprocessor that generates a sinusoidal reference and produces a PWM signal. An additional benefit is then the release of the processor from the control algorithm calculations, leaving more time for inverter monitoring, e.g., for detecting overloads and short circuits [33,34], and other system interface functions or for increasing the sampling frequency. Moreover, this can be done almost at no cost as an extension of the signal conditioning circuit. Unfortunately, upgrading to a 2L design requires investment in an additional sensor.
As an alternative to the analog controller, a high-speed digital regulator consisting of A/D converters, hardware-accelerated programmable compensators and digital modulators implemented using FPGA or as a dedicated CMOS integrated circuit capable of operating in the range of hundreds kHz [35,36,37], can be used.
Our solutions control both the first harmonic amplitude and the distortion caused by the rectifier and abruptly changing resistive load. They are superior in all respects over P, R, PR, IR and PI controllers.
As the carrier frequency increases, the THD of the controlled VSI with rectifier load can theoretically approach the lower bound obtained for the system without load. Our model does not take into account switching delays, ESR of the capacitor, sensor dynamics and noises becoming important in such extreme situations. This creates space for experimentation and, if necessary, for further model development. The article provides guidelines and methodology how to do that.

Author Contributions

Conceptualization, M.B.; methodology, M.B., R.B., and R.G.; software, R.B. and R.G.; validation, R.B. and R.G.; formal analysis, M.B., R.B., and R.G.; writing—original draft preparation, M.B.; writing—review and editing, M.B.; visualization, R.B., R.G, and M.B.; supervision, M.B.; project administration, M.B. All authors have read and agreed to the published version of the manuscript.

Funding

Work was financed by the grant from the Silesian University of Technology–subsidy for maintaining and developing the research potential in 2021.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. (a) Schematic diagram of a double-loop analog control system with the capacitor current feedback and an analog PWM modulator, (b) continuous-time model with one reference input according to [14,17,21,22,23]. R F is the ESR of the choke.
Figure 1. (a) Schematic diagram of a double-loop analog control system with the capacitor current feedback and an analog PWM modulator, (b) continuous-time model with one reference input according to [14,17,21,22,23]. R F is the ESR of the choke.
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Figure 2. Schematic diagrams of digital control systems: (a) 1Ld-digital single loop, (b) 2Ld-digital double loop. Switches symbolize sampling performed by Analog-to-Digital-Converters (ADC).
Figure 2. Schematic diagrams of digital control systems: (a) 1Ld-digital single loop, (b) 2Ld-digital double loop. Switches symbolize sampling performed by Analog-to-Digital-Converters (ADC).
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Figure 3. Schematic diagrams of hybrid control systems: (a) single loop, 1Lh (b) double-loop, 2Lh. It is assumed that the continuous sine wave is produced from the discrete sinusoidal reference passed by a Digital-to-Analog-Converter (DAC) and an analog smoothing filter.
Figure 3. Schematic diagrams of hybrid control systems: (a) single loop, 1Lh (b) double-loop, 2Lh. It is assumed that the continuous sine wave is produced from the discrete sinusoidal reference passed by a Digital-to-Analog-Converter (DAC) and an analog smoothing filter.
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Figure 4. (a) Schematic diagram of the rectifier RC load, (b) abruptly changing resistive load. According to [7,28,29,31], the parameters for th rectifier load in (a) are R L s = 1 Ω , C L = 430 μ F, R L = 100 Ω . For the abruptly changing resistive load in (b) there is R L = 500 Ω . R L is periodically turned on when the reference sine wave V m sin ( ω t ) = 0 , and off when it reaches V m or V m .
Figure 4. (a) Schematic diagram of the rectifier RC load, (b) abruptly changing resistive load. According to [7,28,29,31], the parameters for th rectifier load in (a) are R L s = 1 Ω , C L = 430 μ F, R L = 100 Ω . For the abruptly changing resistive load in (b) there is R L = 500 Ω . R L is periodically turned on when the reference sine wave V m sin ( ω t ) = 0 , and off when it reaches V m or V m .
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Figure 5. (a) Poles and zero, (b) step responses, (c) Bode, and (d) Nyquist plots of the open-loop system in two modes. Blue lines—idle, green lines—activ load. In the no-load mode there is σ L C = 500 , ω L C = 4444 . The resonant frequencies f L C are 702.8 Hz for R L = , and 701.4 Hz for R L = 50 . Note small differences between characteristics of the no-load and the resistive load system, and a large discrepancy between the no-load and RC load system.
Figure 5. (a) Poles and zero, (b) step responses, (c) Bode, and (d) Nyquist plots of the open-loop system in two modes. Blue lines—idle, green lines—activ load. In the no-load mode there is σ L C = 500 , ω L C = 4444 . The resonant frequencies f L C are 702.8 Hz for R L = , and 701.4 Hz for R L = 50 . Note small differences between characteristics of the no-load and the resistive load system, and a large discrepancy between the no-load and RC load system.
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Figure 6. Illustration of various modulation methods: (a)-PAM, (b)-PWM S , (c)-PWM Λ , (d)-PWM V . Red crosses denote samples of the input signal, yellow dots-switching instants on the intersection of the modulating function with appropriate sampled value.
Figure 6. Illustration of various modulation methods: (a)-PAM, (b)-PWM S , (c)-PWM Λ , (d)-PWM V . Red crosses denote samples of the input signal, yellow dots-switching instants on the intersection of the modulating function with appropriate sampled value.
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Figure 7. (a) Open loop PWM controlled system model, and (b) QCT model of the system in (a).
Figure 7. (a) Open loop PWM controlled system model, and (b) QCT model of the system in (a).
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Figure 8. Dependence of ψ ( t ) and THD H from f s and M in the no-load open loop PWM V and PWM S controlled system. (a,b): ψ ( t ) ; M = 0.5 , f s = 12.8, 25.6 and 51.2 kHz, (c,d): ψ ( t ) ; f s = 25.6 kHz, M = 0.2, 0.5, 0.8.
Figure 8. Dependence of ψ ( t ) and THD H from f s and M in the no-load open loop PWM V and PWM S controlled system. (a,b): ψ ( t ) ; M = 0.5 , f s = 12.8, 25.6 and 51.2 kHz, (c,d): ψ ( t ) ; f s = 25.6 kHz, M = 0.2, 0.5, 0.8.
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Figure 9. Capacitor current i c ( t ) in the open-loop inverter of Figure 7a using different modulation types compared with QCT output of the model of Figure 7b and the sampled values. The plots in (a) are for the no-load system and in (b) for the inverter with a RC rectifier load. Observe that for PWM Λ and PWM V the sampled values and the QCT values overlap, and for PWM S they differ. Details are shown for individual sampling periods enlarged in the figures in (b).
Figure 9. Capacitor current i c ( t ) in the open-loop inverter of Figure 7a using different modulation types compared with QCT output of the model of Figure 7b and the sampled values. The plots in (a) are for the no-load system and in (b) for the inverter with a RC rectifier load. Observe that for PWM Λ and PWM V the sampled values and the QCT values overlap, and for PWM S they differ. Details are shown for individual sampling periods enlarged in the figures in (b).
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Figure 10. Schematic diagrams of QCT models for digital control systems depicted in Figure 3a: (a) 1Ld-single loop and (b) 2Ld-double-loop with the capacitor current feedback.
Figure 10. Schematic diagrams of QCT models for digital control systems depicted in Figure 3a: (a) 1Ld-single loop and (b) 2Ld-double-loop with the capacitor current feedback.
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Figure 11. Schematic diagrams of QCT models for hybrid control systems depicted in Figure 2: (a) 1Lh-single loop and (b) 2Lh-double-loop with the capacitor current feedback.
Figure 11. Schematic diagrams of QCT models for hybrid control systems depicted in Figure 2: (a) 1Lh-single loop and (b) 2Lh-double-loop with the capacitor current feedback.
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Figure 12. Exemplary surfaces of THD as functions of parameters (a) THD( k v ) for 2Lh (P+P) and (b) THD( k v , k σ ) for 2Lh (PI+P), (c) zoomed in view of (b).
Figure 12. Exemplary surfaces of THD as functions of parameters (a) THD( k v ) for 2Lh (P+P) and (b) THD( k v , k σ ) for 2Lh (PI+P), (c) zoomed in view of (b).
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Figure 13. Dependence of (a) the gain k c for PID single-loop controllers, (b) k i and (c) k v of PI+P double-loop structures as functions of carrier frequency f s in both digital and hybrid implementation.
Figure 13. Dependence of (a) the gain k c for PID single-loop controllers, (b) k i and (c) k v of PI+P double-loop structures as functions of carrier frequency f s in both digital and hybrid implementation.
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Figure 14. Dependence of THD and the gain k c from the gain margin Δ A for different values carrier frequency f s : (a) 1Lh PID and (b) 1Ld PID.
Figure 14. Dependence of THD and the gain k c from the gain margin Δ A for different values carrier frequency f s : (a) 1Lh PID and (b) 1Ld PID.
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Figure 15. Distortion function ψ ( t ) and THD values of v o u t ( t ) in 1L (PD)/(PID) and 2L (P+P)/(PI+P) control systems optimized for rectifier RC load working at carrier frequencies f s = 25.6 kHz; (a) (PD)/(P+P) controller and (b) (PID)/(PI+P) controller.
Figure 15. Distortion function ψ ( t ) and THD values of v o u t ( t ) in 1L (PD)/(PID) and 2L (P+P)/(PI+P) control systems optimized for rectifier RC load working at carrier frequencies f s = 25.6 kHz; (a) (PD)/(P+P) controller and (b) (PID)/(PI+P) controller.
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Figure 16. THD H of v o u t ( t ) as a function of H in optimally tuned control systems with ψ ( t ) displayed in Figure 15b. In (ad) control structures are arranged as in Figure 15b. Here f r denotes the closed-loop resonant frequency in the no-load mode. According to Table 6, it equals approximately to 2.4 kHz for (a), 2.9 kHz for (b), 4.8 kHz for (c) and 8.0 kHz for (d).
Figure 16. THD H of v o u t ( t ) as a function of H in optimally tuned control systems with ψ ( t ) displayed in Figure 15b. In (ad) control structures are arranged as in Figure 15b. Here f r denotes the closed-loop resonant frequency in the no-load mode. According to Table 6, it equals approximately to 2.4 kHz for (a), 2.9 kHz for (b), 4.8 kHz for (c) and 8.0 kHz for (d).
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Figure 17. Functions d ( t ) and χ ( t ) and their sampled values in optimally tuned control systems ordered in (ad) as in Figure 16 at f s = 25.6 kHz under a rectifier load. Note that the blurry shape of the continuous-time controller output d ( t ) is due to large intersample deviations from the values at sampling instants d ( i h ) depicted in light blue.
Figure 17. Functions d ( t ) and χ ( t ) and their sampled values in optimally tuned control systems ordered in (ad) as in Figure 16 at f s = 25.6 kHz under a rectifier load. Note that the blurry shape of the continuous-time controller output d ( t ) is due to large intersample deviations from the values at sampling instants d ( i h ) depicted in light blue.
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Figure 18. Distortion function ψ ( t ) and THD values of v o u t ( t ) in 1L (PID) and 2L (PI+P) control systems optimized for the RC rectifier load operating at different carrier frequencies f s : (a) 12.8 kHz, (b) 25.6 kHz, and (c) 51.2 kHz. All plots are displayed in the same scale. Plots in (a) extending beyond the display window are also displayed in the appropriate scale in Figure 25.
Figure 18. Distortion function ψ ( t ) and THD values of v o u t ( t ) in 1L (PID) and 2L (PI+P) control systems optimized for the RC rectifier load operating at different carrier frequencies f s : (a) 12.8 kHz, (b) 25.6 kHz, and (c) 51.2 kHz. All plots are displayed in the same scale. Plots in (a) extending beyond the display window are also displayed in the appropriate scale in Figure 25.
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Figure 19. Zoomed-in views of the distortion function ψ ( t ) showed in Figure 18c for various structures at carrier frequency f s = 51.2 kHz.
Figure 19. Zoomed-in views of the distortion function ψ ( t ) showed in Figure 18c for various structures at carrier frequency f s = 51.2 kHz.
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Figure 20. THD values for different structures with controllers PI/PID and carrier frequencies f s . (a) THD in linear scale, (b,c) in logaritmic scale.
Figure 20. THD values for different structures with controllers PI/PID and carrier frequencies f s . (a) THD in linear scale, (b,c) in logaritmic scale.
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Figure 21. Distortion function ψ ( t ) and THD values of v o u t ( t ) in 1L (PID) and 2L (PI+P) control systems optimized for the rectifier resistive load operating at different carrier frequencies f s : (a) 12.8 kHz, (b) 25.6 kHz, and (c) 51.2 kHz. Plots in (a) extending beyond the display window are displayed in the appropriate scale in Figure 25.
Figure 21. Distortion function ψ ( t ) and THD values of v o u t ( t ) in 1L (PID) and 2L (PI+P) control systems optimized for the rectifier resistive load operating at different carrier frequencies f s : (a) 12.8 kHz, (b) 25.6 kHz, and (c) 51.2 kHz. Plots in (a) extending beyond the display window are displayed in the appropriate scale in Figure 25.
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Figure 22. Root loci of 1L PID hybrid and digital control systems for different values of f s . The top row is for 1Lh (PID), the (bottom) row for 1Ld (PID). From (left) to (right), f s takes ascending values of 12.8 kHz, 25.6 kHz, and 51.2 kHz. The dominant roots are indicated by arrows.
Figure 22. Root loci of 1L PID hybrid and digital control systems for different values of f s . The top row is for 1Lh (PID), the (bottom) row for 1Ld (PID). From (left) to (right), f s takes ascending values of 12.8 kHz, 25.6 kHz, and 51.2 kHz. The dominant roots are indicated by arrows.
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Figure 23. Comparison of (a) 2Lh (PI+P) with (b) 1Lh (PID) and (c) 2Ld (PI+P) with (d) 1Ld (PID) at f s = 25.6 kHz. Comparison of hybrid and digital systems is also possible. The dominant roots are shown by arrows.
Figure 23. Comparison of (a) 2Lh (PI+P) with (b) 1Lh (PID) and (c) 2Ld (PI+P) with (d) 1Ld (PID) at f s = 25.6 kHz. Comparison of hybrid and digital systems is also possible. The dominant roots are shown by arrows.
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Figure 24. Dominant roots of the closed-loop systems. (a,b) single-loop systems, (c,(d) double-loop systems. Axis scales other than in Figure 22 and Figure 23 are used to show the details. Therefore, angle α = arctan θ differs from α . In particular, α = 86 . 8 , A i + 1 / A i = 0.70 for θ = 18 , and α = 85 . 2 , A i + 1 / A i = 0.59 for θ = 12 .
Figure 24. Dominant roots of the closed-loop systems. (a,b) single-loop systems, (c,(d) double-loop systems. Axis scales other than in Figure 22 and Figure 23 are used to show the details. Therefore, angle α = arctan θ differs from α . In particular, α = 86 . 8 , A i + 1 / A i = 0.70 for θ = 18 , and α = 85 . 2 , A i + 1 / A i = 0.59 for θ = 12 .
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Figure 25. Plots of v o u t ( t ) , i o u t ( t ) and ψ ( t ) for the rectifier RC load and abruptly changing resistive load in a 1Ld(PID) system at 12.8 kHz using PWM Λ and PWM S modulation. (a) PWM Λ , rectifier load; (b) PWM S , rectifier load; (c) PWM Λ , resistive load; (d) PWM S , resistive load. The presence of slow real root in the no-load mode demonstrates visually in the last part of the ψ ( t ) plots in (a,b), and in the first part of the ψ ( t ) plots for a system with a resistive load in (c,d), as asymmetry with respect to the time axis. Observe that there is greater agreement between PWM Λ and QCT than between PWM s and QCT.
Figure 25. Plots of v o u t ( t ) , i o u t ( t ) and ψ ( t ) for the rectifier RC load and abruptly changing resistive load in a 1Ld(PID) system at 12.8 kHz using PWM Λ and PWM S modulation. (a) PWM Λ , rectifier load; (b) PWM S , rectifier load; (c) PWM Λ , resistive load; (d) PWM S , resistive load. The presence of slow real root in the no-load mode demonstrates visually in the last part of the ψ ( t ) plots in (a,b), and in the first part of the ψ ( t ) plots for a system with a resistive load in (c,d), as asymmetry with respect to the time axis. Observe that there is greater agreement between PWM Λ and QCT than between PWM s and QCT.
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Figure 26. Frequency plots T ( ω ) of the closed-loop systems. Collections of T ( ω ) for all structures considered at various carrier frequencies f s : (a) 12.8 kHz; (b) 25.6 kHz; (c) 51.2 kHz. The values of f r are summarized in Table 6. f L C 700 Hz.
Figure 26. Frequency plots T ( ω ) of the closed-loop systems. Collections of T ( ω ) for all structures considered at various carrier frequencies f s : (a) 12.8 kHz; (b) 25.6 kHz; (c) 51.2 kHz. The values of f r are summarized in Table 6. f L C 700 Hz.
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Figure 27. S ( ω ) and comparison of (a) 1L structures and (b) 2L structures at various f s .
Figure 27. S ( ω ) and comparison of (a) 1L structures and (b) 2L structures at various f s .
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Figure 28. Influence of PWM type on control. The capacitor current i c ( t ) and distortion function ψ ( t ) are displayed for the structures (a) 1Ld (PID), (b) 2Ld (PI+P), (c) 1Lh (PID), and (d) 2Lh (PI+P) operating at 25.6 kHz.
Figure 28. Influence of PWM type on control. The capacitor current i c ( t ) and distortion function ψ ( t ) are displayed for the structures (a) 1Ld (PID), (b) 2Ld (PI+P), (c) 1Lh (PID), and (d) 2Lh (PI+P) operating at 25.6 kHz.
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Figure 29. Control in the OL system with rectifier RC load. (ac) steady-state variables, (d) start-up process. Note that the start-up process is very fast.
Figure 29. Control in the OL system with rectifier RC load. (ac) steady-state variables, (d) start-up process. Note that the start-up process is very fast.
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Figure 30. Control with the digital P controller. (ac) steady-state variables, (d) THD as a function of k p . Note a small improvement of THD from 3.72% in OL to 2.9% with the P controller.
Figure 30. Control with the digital P controller. (ac) steady-state variables, (d) THD as a function of k p . Note a small improvement of THD from 3.72% in OL to 2.9% with the P controller.
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Figure 31. (a) T ( ω ) , (b) S ( ω ) and (c) root locus of R controlled system in the no-load mode for various k r . As k r increases, oscillability at f L C increases. The system loses stability at k r = 964.4 .
Figure 31. (a) T ( ω ) , (b) S ( ω ) and (c) root locus of R controlled system in the no-load mode for various k r . As k r increases, oscillability at f L C increases. The system loses stability at k r = 964.4 .
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Figure 32. R control at different values of gain k r . (a) Δ A = 964.4 , k r = 1 , no-load mode is stable; (b) Δ A = 2.143 , k r = 450 , no-load mode is stable; (c) Δ A = 1.072 , k r = 900 , no-load mode is stable but close the stability boarder; (d) Δ A = 0.877 < 1 , k r = 1100 , no-load mode is unstable.
Figure 32. R control at different values of gain k r . (a) Δ A = 964.4 , k r = 1 , no-load mode is stable; (b) Δ A = 2.143 , k r = 450 , no-load mode is stable; (c) Δ A = 1.072 , k r = 900 , no-load mode is stable but close the stability boarder; (d) Δ A = 0.877 < 1 , k r = 1100 , no-load mode is unstable.
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Figure 33. Start-up process of the R control. (ah) Transients of v o u t ( t ) ordered for increasing values of k r . Note that it is slower than in OL in Figure 29, even for large k r .
Figure 33. Start-up process of the R control. (ah) Transients of v o u t ( t ) ordered for increasing values of k r . Note that it is slower than in OL in Figure 29, even for large k r .
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Figure 34. Surfaces of THD values as functions of controller gains for (a) PI, (b) PR, and (c) IR control systems. Parameters leading to the lowest THD values are marked with a reddish background.
Figure 34. Surfaces of THD values as functions of controller gains for (a) PI, (b) PR, and (c) IR control systems. Parameters leading to the lowest THD values are marked with a reddish background.
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Table 1. Values of the relative delay γ as functions of M and f s .
Table 1. Values of the relative delay γ as functions of M and f s .
M f s  (kHz)PAMPWM S PWM Λ PWM V
12.80.50000.08490.50000.5000
0.225.60.50000.08490.50000.5000
51.20.50000.08490.50000.5000
12.80.50000.21220.50000.5000
0.525.60.50000.21220.50000.5000
51.20.50000.21220.50000.5000
12.80.50000.33950.50000.5000
0.825.60.50000.33950.50000.5000
51.20.50000.33950.50000.5000
Table 2. The values of THD for a no-load open-loop PWM-controlled system as a function of M and f s .
Table 2. The values of THD for a no-load open-loop PWM-controlled system as a function of M and f s .
PWM Λ and PWM V PWM S
f s M M
(kHz)0.20.50.80.20.50.8
12.80.42630.32010.19130.44790.46930.5814
25.60.10630.07980.04770.12660.18920.2786
51.20.02660.01990.01190.04350.08810.1378
Table 3. Values of the optimal gains k c , k i , k v for different systems, ( f s = v a r ).
Table 3. Values of the optimal gains k c , k i , k v for different systems, ( f s = v a r ).
f s  (kHz)1L (PD)2L (P+P)1L (PID)2L (PI+P)
digital
12.8 k c = 8.5 k i = 8.4, k v = 0.20 k c = 9.1 k i = 8.1, k v = 0.22
25.6 k c = 31.7 k i = 15.5, k v = 0.50 k c = 35.9 k i = 17.2, k v = 0.45
51.2 k c = 124.6 k i = 30.4, k v = 1.01 k c = 146.9 k i = 37.2, k v = 0.80
hybrid
12.8 k c = 19.1 k i = 23.3, k v = 0.78 k c = 20.3 k i = 23.3, k v = 0.72
25.6 k c = 73.8 k i = 46.5, k v = 1.55 k c = 90.1 k i = 46.5, k v = 1.45
51.2 k c = 294.9 k i = 93.1, k v = 3.08 k c = 379.1 k i = 93.1, k v = 2.95
Table 4. Summary of THD values for the PWM modulator and QCT method, written as PWM/QCT, for the RC rectifier load. The difference between both components is due mainly to the ripple caused by the carrier signal.
Table 4. Summary of THD values for the PWM modulator and QCT method, written as PWM/QCT, for the RC rectifier load. The difference between both components is due mainly to the ripple caused by the carrier signal.
f s  (kHz)1L (PD)2L (P+P)1L (PID)2L (PI+P)
digital:
12.82.011/1.9801.753/1.4692.156/2.1411.782/1.559
25.60.793/0.7860.548/0.5060.717/0.7170.419/0.409
51.20.239/0.2380.150/0.1440.184/0.1830.083/0.081
hybrid:
12.80.848/0.6720.534/0.2420.715/0.6140.387/0.176
25.60.241/0.2020.121/0.0640.150/0.1240.089/0.036
51.20.063/0.0540.028/0.0160.032/0.0240.021/0.007
Table 5. Dominant roots in various control structures and their parameters: f 0 , σ , and θ .
Table 5. Dominant roots in various control structures and their parameters: f 0 , σ , and θ .
f s  (kHz)1Ld (PID)2Ld (PI+P)1Lh (PID)2Lh (PI+P)
f 0  (Hz)
12.81470171424473929
25.62396293047708018
51.247985938965016,533
σ 0 ( 1 ± j θ 0 ) and σ 1
12.8 σ 1 = 270 σ 1 = 343 n.a.n.a.
397 ( 1 ± j 23 ) 547 ( 1 ± j 20 ) 691 ( 1 ± j 22 ) 2373 ( 1 ± 10 )
25.6 752 ( 1 ± j 20 ) 1065 ( 1 ± j 17 ) 1958 ( 1 ± j 15 ) 4626 ( 1 ± j 11 )
51.2 1678 ( 1 ± j 18 ) 2963 ( 1 ± j 12 ) 4903 ( 1 ± j 12 ) 8578 ( 1 ± 12 )
Table 6. Resonant frequencies f r for different structures and carrier frequencies f s .
Table 6. Resonant frequencies f r for different structures and carrier frequencies f s .
f s  (kHz)1Ld (PID)2Ld (PI+P)1Lh (PID)2Lh (PI+P)
f r  (Hz)
12.81479171424463930
25.62395292747708013
51.247955922965016,520
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Blachuta, M.; Bieda, R.; Grygiel, R. High Performance Single and Double Loop Digital and Hybrid PID-Type Control for DC/AC Voltage Source Inverters. Energies 2022, 15, 785. https://doi.org/10.3390/en15030785

AMA Style

Blachuta M, Bieda R, Grygiel R. High Performance Single and Double Loop Digital and Hybrid PID-Type Control for DC/AC Voltage Source Inverters. Energies. 2022; 15(3):785. https://doi.org/10.3390/en15030785

Chicago/Turabian Style

Blachuta, Marian, Robert Bieda, and Rafal Grygiel. 2022. "High Performance Single and Double Loop Digital and Hybrid PID-Type Control for DC/AC Voltage Source Inverters" Energies 15, no. 3: 785. https://doi.org/10.3390/en15030785

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