Triple-Mode Average Current Control with Valley Current Shaping for DCM/CRM/CCM Boost PFC Converter

Abstract

This paper presents a triple-mode average current control (TACC) strategy to achieve unity power factor and reduce the current stress for a boost PFC converter. The controller switches among different modes in each half-line cycle, and smooth transition is ensured by mapping of the operation region. By adaptive mode shifting, it reduces the current stress and current distortion caused by non-linear effects. With valley current shaping and comparisons, the TACC controller accordingly incorporates three control laws to adapt different modes. In discontinuous conduction mode (DCM), a variable on-time is calculated while the modulation is equivalent to PWM. In critical conduction mode (CRM), a constant on-time is derived, while the switching cycle is modified to regulate the current average value. For both DCM and CRM, the switching cycle is slightly extended to realize valley switching. Furthermore, with valley current shaping, the proposed controller reuses the CRM calculation to form continuous conduction mode (CCM) control law. To make the control laws compatible, normalized mapping and design rules are provided with respect to mode boundaries. This allows the TACC controller to automatically switch among different modes. Finally, experimental results prove the effectiveness of the controller in reducing the current stress and enlarging the preferable power range.

1. Introduction

Boost PFC converters are widely used in industrial applications, such as LED drivers [1,2], uninterruptible power supplies (UPS) [3,4] and on-board chargers [5,6], etc. In order to meet industrial standards (such as IEC 61000-3-2 and IEEE Std 519), some consistent pursuits are to improve the power factor, improve the efficiency and reduce the current harmonics. With respect to continuity of inductor current, the converter can operate in discontinuous conduction mode (DCM), critical conduction mode (CRM) or continuous conduction mode (CCM). Since the operation modes suit different power levels, a great challenge is to carry out the optimizations over a wide operation range.

When a boost PFC converter operates in DCM, it has the advantages of constant switching frequency, reduced reverse recovery of diode, and zero inductor current lag [7,8]. Variable on-time (VoT) controls are proposed to regulate the input current as sinusoid, which greatly improves the power factor under DCM [9]. Furthermore, by discretely fitting VoT, digital pulse train controls can simplify the realization and reduce the hardware cost [10]. However, DCM operation can induce high current stress and conduction loss. This issue can be alleviated by artificially introducing harmonics into the input current, which slightly compromises the power factor [8,11]. For CRM operation, it is conventionally controlled with constant on-time (CoT) [12,13]. The advantage lies in its potential to achieve valley switching, which improves the light load efficiency. However, considerable zero-crossing distortion can be induced by negative current and other nonlinear effects when the on-time is short. To offset the negative current effect caused by parasitic oscillation, variable on-time controls are proposed to lengthen the on-time when the line voltage is low [14,15,16,17,18]. CCM operation is preferable in reducing the current stress and conduction loss. However, the inductor current lag complicates the controller design and power factor correction. This issue can be addressed by current mode controls with accurate reference current tracking, such as predictive digital current mode control [19,20], pulse train current mode control [21], etc. Average current mode control (ACMC) and one-cycle control (OCC) operating in CCM can achieve great performance with certain loads [22]. However, as the converter is forced into DCM under light load and near zero-crossing, an erroneous CCM control law can lead to considerable zero-crossing distortion. To ensure consistent CCM operation, the switching frequency should increase dramatically near zero-crossing and under light load, which leads to high switching loss [23,24].

Furthermore, control strategies are proposed to achieve mixed DCM/CCM operation to combine their advantages. However, the operation modes have different dynamic models that induce contradictory control laws. In [25,26], an adaptive digital controller achieves both DCM and CCM in each half-line cycle. Based on zero current events, a digital DCM detection method is used to select linear compensators for the loop. In [27], digital peak current mode control for mixed DCM/CCM operation is proposed. It adopts a finite-state machine and a look-up-table for selecting the operation mode and switching frequency. To reduce toggling during mode transition, valley estimation and ripple comparison methods are used for mode detection [28]. In simplifying digital realization, [29] presents an average current mode control for a bridgeless boost PFC converter to achieve mixed DCM/CCM operation. It adopts a Taylor series fitted-duty ratio, which effectively reduces digital calculations.

Other studies focus on control strategies to achieve mixed DCM/CRM operation. These two operations also induce different dynamic models and contradictory control laws. To address this issue, load-dependent operation-mode selection strategy is proposed to achieve either DCM or CRM in a half-line cycle [30]. With an analog circuit, [31] proposes a controller to achieve constant on-time under CRM and constant duty ratio under DCM. When mixing DCM and CRM in a single half-line cycle, an important issue lies in the current distortion caused by switching node resonance, which should be compensated to improve the THD [32].

Owing to the contradictory control laws, the existing mixed-mode controls focus on either mixed DCM/CCM or mixed DCM/CRM operations. Comparatively, mixed DCM/CCM operation usually loses valley switching, which harms the light load efficiency. Mixed DCM/CRM operation suffers high current stress at high power, which limits the power range.

Aiming at improving comprehensive performance over a wide operating range, the TACC control is proposed in this paper. The controller can switch among DCM/CRM/CCM operations in each half-line cycle, and smooth transition is ensured by mapping of the operation region and power level. When the instant power is low, the controller achieves DCM operation, which limits the switching frequency and reduces negative current effect. The switching cycle is constant while the on-time is modulated to regulate the input current. As the instant power increases, the controller automatically switches to CRM operation to improve efficiency, which adopts a constant on-time to regulate the input current as the shape of input voltage. For both DCM and CRM, the switching cycle is slightly extended to realize either valley switching or zero voltage switching. When the instant power is high enough, the controller levels up the valley current to achieve CCM operation, which is realized by a valley current shaping module. The partial CCM operation reduces the current ripple and stress at high voltage and heavy load. Both on-time and switching cycle are modulated to regulate the input current as sinusoid. Furthermore, normalized analyses and simulations are provided to evaluate the power range and current stress. With integrated control laws and valley current shaping, the TACC controller enlarges the preferable voltage and power range and improves the comprehensive performance over a wide operating range, effects that are verified by the experimental results.

This paper is organized as follows. Section 2 provides conventional control strategies for boost PFC converter operating in single DCM and CRM. In Section 3, the proposed TACC control strategy is introduced, including the control algorithm, design rules, operation region analyses and performance evaluations. Simulations and experimental results are provided in Section 4 and Section 5, respectively. Finally, a brief conclusion is given in Section 6.

2. Conventional Control Strategies for a Boost PFC Converter Operating in Single DCM or CRM

A scheme of a basic boost PFC converter is given in Figure 1. The front-end input filter is used to reduce the EMI and voltage ripple. With full bridge and C_g, the line voltage is regulated as a smooth line voltage of v_g = |v_in|. Furthermore, the boost stage regulates the voltage as v_out. Unity power factor is achieved when i_in is regulated as the shape of v_in. When the phase shift of the input filter is small, this can be achieved by regulating i_L,av (denoting average value of i_L) as the shape of v_g. Therefore, the boost stage should be controlled as a resistive load while boosting v_g to v_out. Depending on the continuity of the inductor current, the boost stage can operate in DCM, CRM or CCM.

With the use of conventional PWM to achieve DCM, a variable on-time can regulate i_L,av as the shape of v_g. However, the instant power is always limited by the DCM boundary. Detailed control strategy and the maximum instant power are analyzed in Section 2.1. When operating in single CRM, i_L,av is proportional to the product of on-time and v_g. Therefore, constant on-time can regulate i_L,av as the shape of v_g. However, depending on power and voltage levels, CRM operation leads to a high dynamic switching frequency. This challenges the input filter design, ripple reduction and speed of power switches, which will be analyzed in Section 2.2.

2.1. Variable On-Time Control to Achieve DCM Operation

To improve the power factor under DCM, variable on-time is required to achieve sinusoid i_L,av, as shown in Figure 2.

The boost stage should regulate i_L,av as the shape of v_g. When operating in DCM, i_L,av is given by:

$$i_{L,\mathrm{av}}=\frac{T_{\mathrm{on},\mathrm{DCM}}{}^2{v}_g{v}_{\mathrm{out}}}{2(v_{\mathrm{out}}-v_g)LT},$$

(1)

where T_on,DCM denotes the on-time to achieve DCM. Assuming i_L,av = I_refv_g/V_g (V_g is magnitude of v_g, while I_ref is magnitude reference for i_L,av), the required T_on,DCM is:

$$T_{\mathrm{on},\mathrm{DCM}}=\sqrt{\frac{2(v_{\mathrm{out}}-v_g)LT{I}_{\mathrm{ref}}}{V_g{v}_{\mathrm{out}}}}.$$

(2)

This variable on-time can achieve near unity power factor under PWM, whereas the instant power is limited by DCM boundary. With the boundary condition T_on,DCM < (v_out − v_g) T/v_out, the instant input power (denoted as P_in,inst) is limited by:

$$P_{\mathrm{in},\mathrm{inst}}=v_g{i}_{{}_{L,av}}<\frac{v_g{}^2(v_{\mathrm{out}}-v_g)T}{2v_{\mathrm{out}}L}.$$

(3)

Although increasing T/L can alleviate this issue, a high T/L can increase the current ripple and stress on power devices.

2.2. Constant On-Time Control to Achieve CRM Operation

Comparatively, CRM does not suffer the boundary issue, while it reduces the current stress. To regulate the input current, a constant on-time is usually adopted, as shown in Figure 3.

When a boost PFC converter operates in CRM, i_L,av is half of the inductor current peak value:

$$i_{L,\mathrm{av}}=\frac{i_{{}_{\mathrm{pk}}}}{2}=\frac{v_g{T}_{\mathrm{on},\mathrm{CRM}}}{2L},$$

(4)

where T_on,CRM denotes the on-time to achieve CRM. Based on (4), a constant T_on,CRM will regulate i_L,av as the shape of v_g. However, with different input and power levels, the required T_on,CRM could change dramatically. Assuming magnitude of i_L,av is regulated as I_ref, the required T_on,CRM is:

$$T_{\mathrm{on},\mathrm{CRM}}=\frac{2L{i}_{L,\mathrm{av}}}{v_g}=\frac{2L{I}_{\mathrm{ref}}}{V_g}.$$

(5)

Furthermore, based on voltage-second balancing, T_off,CRM is given by:

$$T_{\mathrm{off},\mathrm{CRM}}=\frac{v_g}{v_{\mathrm{out}}-v_g}{T}_{\mathrm{on},\mathrm{CRM}}=\frac{2L{i}_{L,\mathrm{av}}}{v_{\mathrm{out}}-v_g}.$$

(6)

With T_on,CRM and T_off,CRM, the achieved switching cycle is given by:

$$T_{\mathrm{CRM}}=T_{\mathrm{on},\mathrm{CRM}}+T_{\mathrm{off},\mathrm{CRM}}=\frac{2L{i}_L{}_{,av}{v}_{\mathrm{out}}}{v_g(v_{\mathrm{out}}-v_g)}=\frac{2L{v}_{\mathrm{out}}{P}_{\mathrm{in},\mathrm{inst}}}{v_g{}^2(v_{\mathrm{out}}-v_g)}.$$

(7)

With varying v_g and P_in,inst, the achieved switching cycle could change dramatically.

2.3. Current Stress and the Current Distortion Caused by Negative Current and Non-Linear Effects

The strategies mentioned above have issues in current stress and current distortion, since they are in single DCM or single CRM operations. Considering switching transients and current stress, the inductor currents under different modes are given by Figure 4.

For DCM and CRM operations, the inductor current peak values are given by (8).

$$i_{L,\mathrm{pk}}=\left\{\begin{array}{l}2i_{L,\mathrm{av}}\frac{T}{T_{\mathrm{on},\mathrm{DCM}}+T_{\mathrm{off},\mathrm{DCM}}},\hspace{0.33em}\hspace{0.33em}\mathrm{under}\hspace{0.33em}\mathrm{DCM}\\ 2i_{L,\mathrm{av}},\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}\mathrm{under}\hspace{0.33em}\mathrm{CRM}\end{array}\right..$$

(8)

Since T > T_on,DCM+T_off,DCM, the current stresses are always higher than 2i_L,av, which is not beneficial to power devices. Furthermore, non-linear effects can induce considerable distortion to i_L,av. This is especially true for CRM near the zero-crossing point, where the negative current effect is evident. This is because CRM has lower positive current part in each switching cycle. Compared with DCM and CRM operations, CCM operation can effectively reduce the current stress under the same i_L,av. Moreover, it eliminates the negative current effect. However, when i_L,av is very low, the required switching frequency is too high to be operational. For CRM and CCM operations, either the negative current effect or the high switching frequency can induce considerable zero-crossing distortion, since i_L,av is very low near the zero-crossing point.

In conclusion, CCM operation is preferable to reduce the current stress, since it reduces the inductor current peak value below 2i_L,av. Thus, it can improve the power level under the same current stress. To avoid current distortion near the zero-crossing point, DCM operation is preferable, since the current average value is less affected by the negative current effect. To address the above-mentioned issues simultaneously, the TACC control strategy is proposed in the followings.

3. Triple-Mode Average Current Control to Achieve Mixed DCM/CRM/CCM Operation

Overall scheme of TACC control strategy is given by Figure 5, while the typical waveforms are in Figure 6. Compared with control strategies in Section 2, TACC incorporates three control laws to adapt different operation modes. Moreover, it incorporates feedforward actions to perform valley current shaping and on-time calculations. The line voltage (v_g) is sampled for calculations of i_v,ref, T_on,CRM&CCM and T_on,DCM. With valley current shaping and simple comparisons, the converter can automatically switch among DCM/CRM/CCM operations.

The proposed TACC controller includes an on-time calculator that incorporates DCM/CRM/CCM control laws, a PI compensator to generate the reference current (I_ref), and a valley current shaping (VCS) module to regulate the inductor current valley value under CCM. The VCS module generates two outputs: a reference to regulate the inductor current valley value (i_v,ref) and an extended ramp signal (eRAMP). When eRAMP is higher than T while the inductor current is lower than i_v,ref, a new switching cycle is initiated by resetting eRAMP. Magnitude of i_v,ref is adjusted by (9), so as to suit different operation modes.

$$i_{v,\mathrm{ref}}=\max (0,I_{{}_{\mathrm{ref}}}{v}_g/V_g-I_{\mathrm{th}}),$$

(9)

where I_th is a threshold to trigger CCM operation (updated every half-line cycle). When I_refv_g/V_g ≤ I_th, the calculated i_v,ref is clamped as zero, and the converter achieves DCM or CRM operations. When I_refv_g/V_g > I_th, the calculated i_v,ref is positive, and the converter achieves CCM operation.

For DCM operation, i_L ≤ i_v,ref is immediately detected once eRAMP is higher than T; thus, the achieved switching cycle is T. For CRM and CCM operations, the VCS module dynamically alters the turn-on point of each switching cycle, resulting in a higher switching cycle. In this way, the TACC controller incorporates three control laws to suit DCM/CRM/CCM operations. A small delay (t_d) is artificially added in transmitting rst_c, so as to achieve either valley switching or zero voltage switching under DCM and CRM. This helps to improve the overall efficiency, especially at light load. To achieve valley switching, t_d should be set as 1/4 of the parasitic resonant cycle, i.e., $t_d=0.5\pi \sqrt{L(C_{\mathrm{oss}}+C_j)}$, where C_oss is the output capacitance of power switch and C_j is the junction capacitance of the diode.

Algorithms and design rules of the TACC controller are given in Section 3.1. Normalized conditions and operation regions under TACC control are analyzed in Section 3.2, while a comprehensive evaluation for the proposed control is given in Section 3.3.

3.1. Algorithms and Design Rules of TACC Control

For all operation modes, the magnitude of i_L,av should be regulated as I_ref, i.e., the output of the PI compensator. To regulate i_L,av, a variable on-time calculator is used to calculate T_on,MIX of each switching cycle:

$$T_{\mathrm{on},\mathrm{MIX}}=\max (T_{\mathrm{on},\mathrm{DCM}},T_{\mathrm{on},\mathrm{CRM}\&\mathrm{CCM}}),$$

(10)

where T_on,DCM is the same as (2), and T_on,CRM&CCM is the on-time for CRM and CCM operations. Assuming that valley value of i_L is regulated as i_v,ref, then i_v,av is given by (11) under CRM and CCM operations.

$$i_{L,\mathrm{av}}=\frac{v_g{T}_{\mathrm{on},\mathrm{CRM}\&\mathrm{CCM}}}{2L}+i_{v,\mathrm{ref}}.$$

(11)

Furthermore, substituting i_L,av = I_refv_g/V_g into (11) gives the required T_on,CRM&CCM to achieve the unity power factor:

$$T_{\mathrm{on},\mathrm{CRM}\&\mathrm{CCM}}=2L(\frac{i_{{}_{L,\mathrm{av}}}}{v_g}-\frac{i_{v,\mathrm{ref}}}{v_g})=2L(\frac{I_{{}_{\mathrm{ref}}}}{V_g}-\frac{i_{v,\mathrm{ref}}}{v_g}).$$

(12)

With (10), the finally calculated on-time is the higher value of T_on,DCM and T_on,CRM&CCM. However, the relationship between T_on,DCM and T_on,CRM&CCM could change dynamically in a half-line cycle. Potential operation modes within a half-line cycle are given in Figure 7a. i_v,ref is consistent zero, which disables CCM operation. Depending on the relationship between T_on,DCM and T_on,CRM&CCM, the converter achieves mixed DCM/CRM, single DCM or single CRM operations. In Figure 7b, i_v,ref becomes positive at the middle of the half-line cycle, which enables CCM operation. The converter achieves CCM operation only when T_on,DCM < T_on,CRM&CCM and i_v,ref > 0.

When T_on,DCM > T_on,CRM&CCM and i_v,ref > 0, erroneous operation occurs, which must be prevented by an appropriate I_th. In this situation, a positive i_v,ref intends to achieve CCM operation, whereas the on-time calculator sets T_on,MIX = T_on,DCM. The error will deviate the inductor current under CCM, since the required on-time is smaller than the calculated result. To prevent this, a suitable I_th should guarantee T_on,CRM&CCM ≥ T_on,DCM when i_v,ref is positive, i.e.:

$$2L(\frac{I_{{}_{\mathrm{ref}}}}{V_g}-\frac{i_{v,\mathrm{ref}}}{v_g})\ge \sqrt{\frac{2(v_{\mathrm{out}}-v_g)LT{I}_{\mathrm{ref}}}{V_g{v}_{\mathrm{out}}}}\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}for\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}{i}_{v,\mathrm{ref}}\ge 0.$$

(13)

Substituting $i_{v,\mathrm{ref}}=I_{{}_{\mathrm{ref}}}{v}_g/V_g-I_{\mathrm{th}}$ into (13) derives:

$$I_{\mathrm{th}}\ge \sqrt{\frac{I_{{}_{\mathrm{ref}}}T}{2V_{g}L}(v_g{}^2-\frac{v_g{}^3}{v_{\mathrm{out}}})}.$$

(14)

According to (14), erroneous operations can be effectively prevented by selecting a high I_th. However, as a threshold to trigger CCM operation, I_th determines the portion of CCM operation and magnitude of i_v,ref. When I_th is too high, inadequate CCM operation cannot effectively suppress the current ripple and current stress. Therefore, an appropriate strategy is to set I_th exactly as:

$$I_{\mathrm{th}}=\sqrt{\frac{I_{{}_{\mathrm{ref}}}T}{2V_{g}L}(v_g{}^2-\frac{v_g{}^3}{v_{\mathrm{out}}})}.$$

(15)

Modulating I_th directly with (15) requires extensive calculations, since v_g changes every switching cycle. Nevertheless, (15) reaches its maximum value when v_g = 2v_out/3. Therefore, substituting v_g = 2v_out/3 into (15) gives a sufficient condition to prevent erroneous operations:

$$I_{\mathrm{th}}=v_{\mathrm{out}}\sqrt{\frac{2}{27}\frac{I_{{}_{\mathrm{ref}}}T}{V_{g}L}}.$$

(16)

Compared with (15), this result is simplified to a considerable extent. Moreover, both I_ref and V_g change every half-line cycle, while variation of v_out within a half-line cycle is usually small. Therefore, the calculation only needs to be updated every half-line cycle.

3.2. Operation Regions under TACC Control

With TACC control, the converter will automatically switch among DCM/CRM/CCM operations while regulating the input current as sinusoid. The achieved operation mode depends on I_ref, v_out, v_g and V_g. Since the on-time and i_v,ref are calculated by (10) and (9), the conditions to achieve DCM/CRM/CCM operations are summarized as:

$$\left\{\begin{array}{l}DCM:\hspace{0.33em}\hspace{0.33em}{T}_{\mathrm{on},\mathrm{DCM}}>T_{\mathrm{on},\mathrm{CRM}\&\mathrm{CCM}}\hspace{0.33em}\hspace{0.33em}\&\hspace{0.33em}\hspace{0.33em}{I}_{{}_{\mathrm{ref}}}{v}_g/V_g-I_{\mathrm{th}}<0\\ CRM:\hspace{0.33em}\hspace{0.33em}{T}_{\mathrm{on},\mathrm{DCM}}\le T_{\mathrm{on},\mathrm{CRM}\&\mathrm{CCM}}\hspace{0.33em}\hspace{0.33em}\&\hspace{0.33em}\hspace{0.33em}{I}_{{}_{\mathrm{ref}}}{v}_g/V_g-I_{\mathrm{th}}<0\\ CCM:\hspace{0.33em}\hspace{0.33em}{T}_{\mathrm{on},\mathrm{DCM}}\le T_{\mathrm{on},\mathrm{CRM}\&\mathrm{CCM}}\hspace{0.33em}\hspace{0.33em}\&\hspace{0.33em}\hspace{0.33em}{I}_{{}_{\mathrm{ref}}}{v}_g/V_g-I_{\mathrm{th}}\ge 0\end{array}\right..$$

(17)

Furthermore, to facilitate universal analysis, normalizing the conditions with F₁ and F₂:

$$\left\{\begin{array}{l}{F}_1=v_g/v_{\mathrm{out}}\\ F_2=\frac{2L{I}_{{}_{\mathrm{ref}}}}{V_{g}T}\end{array}\right..$$

(18)

where F₁ is the normalized line voltage and F₂ is the normalized ratio between I_ref and V_g. Substituting (2), (12), (16) and (18) into (17) gives:

$$\left\{\begin{array}{l}DCM:\hspace{0.33em}\hspace{0.33em}{F}_1<1-F_2\hspace{0.33em}\hspace{0.33em}\&\hspace{0.33em}\hspace{0.33em}{F}_1\le \sqrt{4/(27F_2)}\\ CRM:\hspace{0.33em}\hspace{0.33em}{F}_1\ge 1-F_2\hspace{0.33em}\hspace{0.33em}\&\hspace{0.33em}\hspace{0.33em}{F}_1\le \sqrt{4/(27F_2)}\\ CCM:\hspace{0.33em}\hspace{0.33em}{F}_1{}^2(1-F_1)\le 4/27\hspace{0.33em}\&\hspace{0.33em}{F}_1>\sqrt{4/(27F_2)}\end{array}\right..$$

(19)

For any positive variable x, maximum value of x²(1 − x) is exactly 4/27 (when x = 2/3). Therefore, $F_1^2\left(1-F_1\right)\le 4/27$ is consistently valid, while $F_1\le \sqrt{4/\left(27F_2\right)}$ is necessarily valid when $F_1<1-F_2$. Furthermore, (19) is simplified as:

$$\left\{\begin{array}{l}DCM:\hspace{0.33em}\hspace{0.33em}{F}_1<1-F_2\\ CRM:\hspace{0.33em}\hspace{0.33em}1-F_2\le F_1\le \sqrt{4/(27F_2)}\\ CCM:\hspace{0.33em}\hspace{0.33em}\hspace{0.33em}{F}_1>\sqrt{4/(27F_2)}\end{array}\right..$$

(20)

Based on (20), mapping of operation regions under TACC control is plotted in Figure 8.

The instant operation mode is directly determined by F₁ and F₂, as shown in Figure 8a. For F₂ = 2LI_ref/(V_gT), it is a constant value in each half-line cycle (both I_ref and V_g are updated every half-line cycle). Therefore, smooth transition among different modes is ensured, as long as F₁ = v_g/v_out changes smoothly without local oscillations. This can be easily guaranteed by the input filter and C_g.

In each half-line cycle, F₂ is constant, while F₁ changes between zero and F_1,max (i.e., V_g/v_out). Therefore, mode mixing in a half-line cycle is determined by F_1,max and F₂, as shown in Figure 8b. When F₂ < 1, it achieves single DCM, mixed DCM/CRM or mixed DCM/CRM/CCM operations in a half-line cycle. When F₂ > 1, it achieves single CRM or mixed CRM/CCM operations.

3.3. Comprehensive Evaluations for the Proposed TACC Control Strategy

Comprehensive evaluations for the proposed TACC control are given in aspects of the input power, on/off times, switching cycle and current stress. The TACC controller regulates magnitude of i_L,av as I_ref. Therefore, with F₁ and F₂ defined by (18), the instantaneous input power of boost stage is given by:

$$P_{\mathrm{in},\mathrm{inst}}=v_g{i}_{L,av}=\frac{v_g{}^2{I}_{\mathrm{ref}}}{V_g}=F_1{}^2{F}_2\frac{v_{\mathrm{out}}{}^{2}T}{2L}.$$

(21)

With unity power factor, the average input power is:

$$P_{\mathrm{in}}=\frac{V_g{I}_{{}_{\mathrm{ref}}}}{2}=\frac{F_{1,\max }{}^2{F}_2}{2}\frac{v_{\mathrm{out}}{}^{2}T}{2L}.$$

(22)

The final on-time T_on,MIX is determined by (2), (10) and (12), and the normalized value is given by:

$$T_{\mathrm{on},\mathrm{MIX}}=\left\{\begin{array}{l}\sqrt{(1-F_1)F_2}T,\hspace{0.33em}\mathrm{under}\hspace{0.33em}\mathrm{DCM}\\ \\ F_{2}T,\hspace{0.33em}\mathrm{under}\hspace{0.33em}\mathrm{CRM}\\ \sqrt{\frac{4F_2}{27}}\frac{1}{F_1}T,\hspace{0.33em}\mathrm{under}\hspace{0.33em}\mathrm{CCM}\end{array}\right..$$

(23)

The achieved switching cycle is either T or determined by the VCS module. Under DCM operation, the achieved switching cycle is nearly T, since rst_c (in Figure 5) becomes valid as soon as eRAMP reaches T. Under CRM and CCM operations, the achieved switching cycle is determined by i_v,ref and voltage-second balancing of inductor. As a result, the final switching cycle under TACC control is given by:

$$T_{\mathrm{MIX}}=\left\{\begin{array}{l}T,\hspace{0.33em}\mathrm{under}\hspace{0.33em}\mathrm{DCM}\\ \\ \frac{F_2}{1-F_1}T,\hspace{0.33em}\mathrm{under}\hspace{0.33em}\mathrm{CRM}\\ \sqrt{\frac{4}{27}\frac{F_2}{F_1{}^2{(1-F_1)}^2}}\hspace{0.33em}T,\hspace{0.33em}\mathrm{under}\hspace{0.33em}\mathrm{CCM}\end{array}\right..$$

(24)

In the aspect of current stress, based on T_on,MIX and i_v,ref, the achieved inductor current peak value is given by:

$$i_{L,\mathrm{pk}}=i_{v,\mathrm{ref}}+\frac{v_g{T}_{\mathrm{on},\mathrm{MIX}}}{L}=\left\{\begin{array}{l}{F}_1\sqrt{(1-F_1)F_2}\frac{v_{\mathrm{out}}T}{L}\hspace{0.33em}\hspace{0.33em}\mathrm{for}\hspace{0.33em}\mathrm{DCM}\hspace{0.33em}\mathrm{operatio}n\\ F_1{F}_2\frac{v_{\mathrm{out}}T}{L}\hspace{0.33em}\hspace{0.33em}\mathrm{for}\hspace{0.33em}\mathrm{CRM}\hspace{0.33em}\mathrm{operation}\\ (\sqrt{\frac{F_2}{27}}+\frac{F_1{F}_2}{2})\frac{v_{\mathrm{out}}T}{L}\hspace{0.33em}\mathrm{for}\hspace{0.33em}\mathrm{CCM}\hspace{0.33em}\mathrm{operation}\end{array}\right..$$

(25)

As a conclusion to Section 3, this part proposes a TACC control strategy that achieves mixed DCM/CRM/CCM operation. Detailed analyses are provided with respect to the control scheme, design rules, operation regions and performance evaluations. The mode mixing can extend the power range through reducing the current stress, variation of on/off times and switching cycle. These are verified by simulations and experiments in the following section.

4. Simulations

Simulations were carried out in Matlab to verify the effectiveness of the proposed TACC control strategy. the detailed simulations included the achieved current stress and practical operation region with different controls. The main specifications of the power stage were the same as those in Table 1 (in Section 5).

4.1. Current Stress with Different Controls

Compared with conventional CoT control in the achievement of CRM, the proposed TACC controller reduces the inductor current peak value through CCM operation. With different controls, the normalized i_L,pk values are plotted in Figure 9.

For VoT control in the achievement of DCM, the normalized i_L,pk is given by Figure 9a. Although the normalized current stress was low, the DCM boundary (F₁ < 1-F₂) strongly limited the power range. Reducing L could increase the power range, but this also increased the de-normalized i_L,pk. For CoT control in achieving CRM, the normalized i_L,pk was F₁F₂, which is plotted in Figure 9b. With the specifications presented in Table 1 (i.e., v_out = 400 V, T = 10 μs, L = 350 μH), the de-normalized i_L,pk was 7.2A when F₁F₂ = 0.63. Furthermore, considering current stress on power switches, the operation region was limited by F₁F₂ ≤ 0.63. For TACC control in the achievement of mixed-mode operation, the inductor current is given by (25). When $F_1>\sqrt{4/(27F_2)}$, it achieved CCM operation, which reduced the inductor current peak value. Therefore, the non-operational region (F₁F₂ > 0.63, i.e., i_L,pk > 7.2A) was smaller than that under CoT control.

4.2. Input Powers and Practical Operational Regions with Consideration of Current Stress and Minimum On-/Off-Times

The proposed TACC controller has a small current stress and reduced variation of on/off times. Therefore, compared with conventional CoT and VoT controls, it achieved a larger operational region. Practical operation regions with different controls are plotted in Figure 10. Considering power devices and non-linear effects, both the minimum on-/off-times were set as 0.05 (de-normalized as 0.05T = 0.5 μs) in the simulations. The maximum i_L,pk was set as 0.63 (normalized to v_outT/L) to reduce the current stress, which can be denormalized as i_L,pk = 0.63v_outT/L = 7.2 A.

For VoT control to achieve DCM, the operational region is mainly limited by the DCM boundary and the minimum on-time. For CoT control to achieve CRM, the operation region is limited by the minimum on-/off-times and the maximum i_L,pk. Moreover, the low power region is not operational owing to the minimum off-time. This leads to considerable zero-crossing distortion, since F₁ necessarily changes from zero to F_1,max in each half-line cycle. For the TACC controller to achieve mixed-mode operation, the operation region covers approximately ¾3/4 of the simulated area. Owing to the mixed-mode operation, the practical operation region is larger than the collection of the previous two controllers.

5. Experiments

An experimental prototype was built to verify effectiveness of the proposed TACC control strategy, as shown in Figure 11. To meet practical application requirements, the prototype was designed to adapt grid power supply instead of ideal AC source. The grid voltage has considerable noise, and can be affected by other grid connected devices. In this sense, an input filter is necessary to suppress exogenous noise and meet EMI requirements, which is specified in Appendix B. Furthermore, the control loop of the prototype was carefully designed for stability and dynamic response. The bode diagram of voltage control loop is provided in Appendix C.

The main specifications of the power stage are given in Table 1, and the detailed specifications of the prototype components are given in

Table 2. Detailed specifications of components.

ADC	LTC2314-14	Resolution 14 bit, noise 77.5 dB SNR, Throughput Rate 4.5 Msps
DAC	TLV5616	Resolution 12 bit, Settling Time 3 µs, INL 1.9 LSB, DNL 0.5 LSB
Inductor current sensor		40 mΩ sensing resistor
Analog comparator	TLV3501	Propagation delay 4.5 ns
FPGA control board	Cyclone IV	10 k LEs, 414 kb memory
Capacitor	450LXW180MEFR18X45	180 μF, Al electrolytic capacitor
Inductor	77083A7	350 μH, FeSiAl core
Power switch	GS66508T	VDS 650 V E-HEMT, RDS(ON) 50 mΩ, QG 6.1 nC, Speed > 10 MHz
Power diode	STPSC8H065	VRRM 650 V, VF 1.56 V, IR(MAX) 335 μA

. Two ADC modules (LTC2314-14 from ADI) were used for voltage samplings. The line voltage is divided by the resistor network, converted by ADC, and then sent to the FPGA for feedforward calculations. The valley current shaping relies on detection of the i_v,ref crossing, which is carried out by a DAC (TLV5616 from TI, Dallas, TX, USA), an inductor current sensor (40 mΩ sensing resistor, Shenzhen, China) and an analog comparator (TLV3501 from TI, Texas, USA). The DAC converts i_v,ref to analog value, and the comparator detects the i_v,ref crossing point to initiate a new switching cycle. All digital signals are processed by a FPGA board (Cyclone IV from ALTERA, San Jose, CA, USA). The power stage consists of an input filter, a full bridge and a boost converter. The boost converter adopts a 180 μF capacitor (450LXW180MEFR18X45) as the output capacitor. The core material of main inductor is FeSiAl (77083A7 from MAGNETICS, Phoenix, AZ, USA). The main power switch is GS66508T (650 V E-mode GaN HEMT) from GAN SYSTEMS, Ottawa, Canada and the power diode is STPSC8H065 (650V SiC Schottky diode) from ST Microelectronics, Geneva, Switzerland.

Table 1. Main specifications of the prototype.

Input voltage vin	85–265 VAC
Output voltage vout	400 VDC
Maximum power Pin	280 W @ 110 VAC, 680 W @ 220 VAC
Output capacitor C	180 μF
Boost inductor L	350 μH
Fundamental switching cycle T	10 μs
Input filter inductance Lf	100 μH
Input filter capacitance Cf	470 nF
Cg	1 μF

Table 1. Main specifications of the prototype.

Input voltage vin	85–265 VAC
Output voltage vout	400 VDC
Maximum power Pin	280 W @ 110 VAC, 680 W @ 220 VAC
Output capacitor C	180 μF
Boost inductor L	350 μH
Fundamental switching cycle T	10 μs
Input filter inductance Lf	100 μH
Input filter capacitance Cf	470 nF
Cg	1 μF

In the following, mode mixing is verified at different powers. Comparisons of different controls are given in the aspects of power range, current stress, power factor, THD and efficiency.

5.1. Mode Mixing with TACC Control at Full Power

With TACC control to achieve mixed-mode operation, the converter automatically switches among three operation modes in a half-line cycle. With 110 VAC/280 W and 220 VAC/680 W, the measured results are given by Figure 12a and Figure 12b, respectively.

According to (20), the mode mixing is dependent on F_1,max = V_g/v_out and F₂ = 2LI_ref/(V_gT) = 4LP_in/(V_g²T). With 110 VAC/280 W, they were calculated as F_1,max = 0.39 and F₂ = 1.62. With the calculated values, the converter was expected to achieve mixed CRM/CCM operation, as indicated by Figure 12b. The measured results matched the expectation: the inductor current was CRM when the line voltage is low, and became CCM when the line voltage was high. With 220 VAC/680 W, F_1,max and F₂ were given by F_1,max = 0.78 and F₂ = 0.98; thus, the converter would be expected to achieve mixed DCM/CRM/CCM operation. The measured result also matches with the expectation, where the inductor current switches among three modes in a half-line cycle. The PF and THD were measured as [PF = 99.11%, THD = 7.06%] under 110 VAC/280 W, and as [PF = 99.62%, THD = 5.18%] under 220 VAC/680 the.

It is noted that the input current waveforms in Figure 12 have some zero-crossing distortion (a.k.a. cusp distortion). For different control strategies, the distortion is conventionally caused by <1> erroneous CCM control law when the converter is forced to operate in DCM, <2> negative current effect near zero-crossing, <3> modulation error under narrow switching pulse, or <4> line capacitor and full-bridge. For TACC control, issues <1–3> are well-addressed, owing to the integration of DCM control law and the clamped frequency near zero-crossing. However, it still suffers from issue <4>, because it requires a relatively high line capacitor to provide smooth line voltage. This does not indicate that TACC is inferior to other control strategies in reducing zero-crossing distortion. For comparison: conventional CCM control (based on PWM) usually suffers from issue <1>, while conventional CRM control necessarily suffers from issues <2–4>, owing to the high current ripple and high switching frequency near zero-crossing, and conventional DCM control also suffers from issue <4>, owing to the high current ripple that increases the line capacitor.

5.2. Measured Waveforms with TACC Control at Different Voltages and Powers

With TACC control to regulate the inductor current average value, the waveforms were measured at different voltages and powers. Specifically, the operation points were set at typical low power (110 V/40 W & 220 V/80 W) and half power (110 V/140 W & 220 V/340 W). According to the analyses in Section 3.2, the mode mixing was determined by F_1,max and F₂.

At typical low power, the measured results are given by Figure 13. For 110 VAC/40 W, F_1,max and F₂ were calculated by 0.39 and 0.23, respectively. With 220 VAC/80 W, F_1,max and F₂ were calculated by 0.78 and 0.12, respectively. For both conditions, since F_1,max < 1-F₂, the TACC controller achieved single DCM operation, which matched with the results in Figure 13. However, the input current was a little distorted, as shown in Figure 13b. The reason for this was the delay (in VCS module) in resetting eRAMP. As a result, the PF and THD were measured as [PF = 98.76%, THD = 5.39%] and [PF = 95.58%, THD = 8.22%], respectively.

The measured results at half power are given by Figure 14. For 110 VAC/140 W, F_1,max and F₂ were calculated by 0.39 and 0.81, respectively. Since $1-F_2\le F_{1,\max }\le \sqrt{4/(27F_2)}$, the TACC controller achieved mixed DCM/CRM operation. For 220 VAC/340 W, F_1,max and F₂ were calculated by 0.78 and 0.49, respectively. Since $F_{1,\max }>\sqrt{4/(27F_2)}$ and F₂ < 1, the TACC controller achieved mixed DCM/CRM/CCM operation.

The results in Figure 14 matched with the expectation, where partial CCM occurred at 220 V/340 W. The DCM operation was located near the zero-crossing point of input voltage. This alleviated the zero-crossing distortion by reducing variations of on/off times and switching cycle. Finally, for these operation points, the PF and THD were measured as [PF = 99.58%, THD = 6.90%] and [PF = 99.61%, THD = 4.49%], respectively.

5.3. Dynamic Response and Harmonic Analysis

With TACC control to regulate the inductor current average value, the dynamic responses were measured and are presented in Figure 15. During the positive load step (200 W to 400 W), the output voltage changed with an undershoot of 10.1% and recovered in 60 ms. During the negative load step (400 W to 200 W), an overshoot of 10.6% occurred and the recovery time was 100 ms.

To determine whether the converter with TACC control complied with the standard harmonic specifications, Figure 16 provides the harmonic comparisons with the IEC 61000-3-2 standard over a wide operating range (40–280 W under 110 V, 80–680 W under 220 V). All harmonic components of the input current were well below IEC 61000-3-2 standard, which indicates that the TACC control can adapt a wide operating range.

5.4. Comprehensive Comparisons with Other Controls

Comprehensive comparisons with other controls were carried out in the aspects of current stress, power factor, THD and efficiency.

5.4.1. Current Stress

Compared with the single CRM operation, the mixed-mode control effectively reduced the maximum current stress by driving PFC converter into CCM at high line voltage and heavy load. The maximum i_L,pk in a half-line cycle is measured in Figure 17. With CoT in the achievement of CRM, the maximum i_L,pk changed heavily with the input power. With TACC control, variation of the maximum i_L,pk was reduced. This matched with the previous analysis (Section 3.3) and simulations (Section 4.1). The reduced current stress allowed the converter to deliver higher power. Compared with CoT control, the TACC controller enlarged the maximum power with identical current stress. It enlarged the maximum power from 240 W to 280 W under 110VAC, and enlarged the power from 500 W to 680 W under 220 VAC.

5.4.2. PF and THD

With different input voltage and power levels, the measured PF and THD are summarized in Figure 18 and Figure 19.

For CoT to achieve CRM operation, the achieved PF and THD were degraded at both light and heavy loads. The degradation was evident when P_in was low, which was mainly caused by zero-crossing distortion. When P_in was high, the controller had enlarged switching cycle and current ripple, which also distorted the input current. For VoT to achieve DCM, the maximum input power was limited by the DCM boundary. For TACC control to achieve mixed-mode operation, it not only enlarged the power range, but also improved the PF and THD in the whole power range. When P_in changed from 20% to 100% of the maximum power, the achieved PF was always higher than 99.11% with 110 VAC, and higher than 98.02% with 220 VAC. In the range, the average PF was 99.45% with 110 VAC and 99.50% with 220 VAC. When P_in changed from 20% to 100% of the maximum power, the average THD was 6.5% with 110 VAC and 4.9% with 220 VAC.

5.4.3. Efficiency

The measured efficiencies with different controls are plotted in Figure 20. When the power level was low, the TACC controller had the highest efficiency. Compared with VoT in achieving DCM, it achieved valley switching, which reduced the switching losses of power switch and diode. Compared with CoT in achieving CRM, it reduced the switching frequency, which also reduced the switching loss. When the power level was high, the efficiency with CoT fell faster than that with TACC control. The reason mainly lay in the high current ripple and current stress, which greatly increased the conduction loss at high power.

With 220 VAC input, the loss breakdowns with different controls were carried out under 80 W and 500 W, respectively. Equations for the loss breakdown are provided in Appendix A. As shown in Figure 21, the TACC control had the lowest total loss under 80 W, since it effectively reduced the GaN HEMT switching loss and the diode loss. Under 500 W, the TACC also reduced the total loss, since it lowered the inductor and rectifier bridge losses. This was achieved by partial CCM operation, which reduced the current ripple and current stress.

Finally,

Table 3. Comparisons with other controls.

Header		This paper	[29], 2022	[27], 2016	[26], 2014
Output voltage (V)		400	400	250, 450	390
Switching frequency (kHz)		40–100	65	125~1000	130
Input voltage (VAC)		85–265	90~135	85–265	120
Operation mode		Mixed DCM/CRM/CCM	Mixed DCM/CCM	Mixed DCM/CCM	Mixed DCM/CCM
Power range (W) & Cover rate under 110 VAC	Efficiency > 95%	50–280, 82.1%	100–850, 88.2%	not achieved, 0%	Na
	PF > 97%	25–280, 91.1%	250–850, 70.6%	25–150, 83.3%	250–650, 61.5%
	THD < 10%	20–280, 92.9%	140–850, 83.5%	20–150, 86.7%	75–650, 88.5%
Power range (W) & Cover rate under 220 VAC	Efficiency > 95%	40–680, 94.1%	Na	not achieved, 0%	Na
	PF > 97%	100–680, 85.3%	Na	70–150, 53.3%	Na
	THD < 10%	80–680, 88.2%	Na	35–150, 76.7%	Na
Realization		FPGA	DSP	FPGA	DSP
Features		ACM control, valley current shaping, valley switching	ACM control, duty cycle calculation, PWM	PCM control, frequency mode selection based on FSM	Linear compensation, DCM detection

compares the performance of the proposed TACC control with other literature. Through mixed DCM/CRM/CCM operation and valley switching, the proposed TACC controller extended the preferable power range (efficiency > 95%, PF > 97%, THD < 10%). It suits PFC applications with wide input voltage and power ranges.

Since multi-mode is universal for switching power converters, the proposed method has the potential to be extended to other topologies, such as half-bridge doubler boost [33], to broaden the operating range and improve the comprehensive performance.

6. Conclusions

This paper proposes a TACC control strategy to achieve mixed DCM/CRM/CCM operation for a boost PFC converter. The mixed-mode operation effectively extends the power range, since it reduces the current stress and variations of on/off times with input power. The proposed strategy accordingly incorporates DCM/CRM/CCM control algorithms to regulate the inductor current average value, which is realized with simple comparisons and valley current shaping. To make the algorithms compatible, design rules and normalized analyses are provided with respect to the operation regions and DCM/CRM/CCM boundaries. According to the simulation and experimental results, the inductor current peak value with TACC control is greatly reduced, which enables a higher operation range. Furthermore, owing to the reduced variations of on/off times and switching cycle, it improves the PF and THD within the whole power range.