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Article

Design of Nonlinear Backstepping Double-Integral Sliding Mode Controllers to Stabilize the DC-Bus Voltage for DC–DC Converters Feeding CPLs

by
Subarto Kumar Ghosh
1,
Tushar Kanti Roy
2,*,
Md. Abu Hanif Pramanik
3 and
Md. Apel Mahmud
4
1
Department of Electrical & Electronic Engineering, Rajshahi University of Engineering & Technology, Rajshahi 6204, Bangladesh
2
Department of Electronics & Telecommunication Engineering, Rajshahi University of Engineering & Technology, Rajshahi 6204, Bangladesh
3
Department of Electrical & Computer Engineering, Rajshahi University of Engineering & Technology, Rajshahi 6204, Bangladesh
4
School of Engineering, Deakin University, Geelong, VIC 3216, Australia
*
Author to whom correspondence should be addressed.
Energies 2021, 14(20), 6753; https://doi.org/10.3390/en14206753
Submission received: 24 September 2021 / Revised: 12 October 2021 / Accepted: 14 October 2021 / Published: 17 October 2021

Abstract

:
This paper proposes a composite nonlinear controller combining backstepping and double-integral sliding mode controllers for DC–DC boost converter (DDBC) feeding by constant power loads (CPLs) to improve the DC-bus voltage stability under large disturbances in DC distribution systems. In this regard, an exact feedback linearization approach is first used to transform the nonlinear dynamical model into a simplified linear system with canonical form so that it becomes suitable for designing the proposed controller. Another important feature of applying the exact feedback linearization approach in this work is to utilize its capability to cancel nonlinearities appearing due to the incremental negative-impedance of CPLs and the non-minimum phase problem related to the DDBC. Second, the proposed backstepping double integral-sliding mode controller (BDI-SMC) is employed on the feedback linearized system to determine the control law. Afterwards, the Lyapunov stability theory is used to analyze the closed-loop stability of the overall system. Finally, a simulation study is conducted under various operating conditions of the system to validate the theoretical analysis of the proposed controller. The simulation results are also compared with existing sliding mode controller (ESMC) and proportional-integral (PI) control schemes to demonstrate the superiority of the proposed BDI-SMC.

1. Introduction

Over the past few decades, the power electronic converters (PECs) have been widely used in vehicular power systems (VPSs) (e.g., space vehicles, sea, land, etc.) and in renewable energy source (RES)-based systems (e.g., DC and AC microgrids) due to their voltage step-up, step-down, or conversion capabilities [1,2,3,4,5]. Recently, the power electronic-based DC distribution networks (DCDNs) are becoming more popular owing to their distinct advantages in terms of efficiency, controllability, flexibility, etc. [6,7]. However, two major challenges need to be addressed for a stable and reliable operation of power electronic-based DCDNs in conjunction of RESs, where the first challenge is the low terminal voltage of RESs while important to maintain a relatively high and stable terminal voltage of the DC-bus as all loads and RESs are either directly or indirectly connected to this bus [8,9,10]. As a results, DC–DC boost converters (DDBCs) are usually used in DCDNs as the interface between the DC-bus and RESs, which need to be appropriately controlled to achieve the desired DC-bus voltage [11,12]. On the other hand, the maintenance of stable and reliable operations becomes even more challenging when a large number of DC–DC converters are used to interface loads and RESs [13,14,15]. The second challenge is the instability issue caused by constant power loads (CPLs) in DCDNs with tightly coupled power electronic converters [16,17,18]. It is well-known that the constant power is drawn by CPLs, and consequently, it exhibits negative-impedance characteristics that destabilize as well as even cause blackouts [18,19]. Thus, it is essential to design an advance controller that not only deals with the destabilization but also provides quick dynamic response while guaranteeing the stability of the system.
Several control strategies have been proposed to resolve the instability issue of DDBCs caused by CPLs. Passive damping methods are proposed in [18,20] to neutralize the destabilization effect by increasing the damping into a system. However, these methods have limited applications due to their high costs and large sizes of passive elements such as capacitors and inductors. To alleviate these drawbacks, active damping methods such as virtual impedance [21], virtual resistance [22], and virtual capacitor [23] are proposed for stabilizing the system by adding extra control loops to reshape impedances. In these methods, the destructive effects of CPLs are mitigated by enforcing the unstable poles into the stable region through the modification in control loops. However, the satisfactory performance of these damping methods is highly dependent on the switching frequency. Thus, a voltage–current (V–I) droop-based dual-loop control scheme is proposed in [24] to stabilize the system by injecting sufficient damping torque into networks that overcomes the aforementioned drawbacks. However, a small variation in the droop gain leads to an inaccurate power sharing in networks [24]. To overcome this issue, an adaptive V–I droop control approach is proposed in [25] in which the virtual resistance is emulated at the output terminal of converters. However, these control approaches so far discussed here can only ensure the stability of the system near nominal operating points as these control schemes are developed by considering small disturbances around actual operating regions. Therefore, the system will be unstable when large disturbances due to variations in RESs and loads appear in the system.
A model predictive controller (MPC) is proposed in [26] to improve the stability of the system and extends the operating point. Though the MPC can handle the operating point issue, it cannot ensure better transient behaviors in the presence of large disturbances as it is designed without considering model uncertainties. This limitation is addressed in [27,28] by designing a hybrid MPC using the Takagi–Sugeno fuzzy-based scheme in conjunction with a traditional MPC. However, an accurate dynamical model is required to achieve the desired performance, which is always practically obstructed due to the presence of external disturbances and model uncertainties. Furthermore, the online computational complexity of MPCs limited their practical application in real-time platforms.
Nonlinear control schemes can be used to stabilize the system by considering the nonlinearity issue of CPLs and non-minimum phase problem of DDBCs. In [29], a passivity-based nonlinear controller is designed to resolve the instability issue due to CPLs while improving the transient and dynamic behaviors of the DC-bus voltage. However, the damping performance is severely affected with variations in the system parameters, which is overcome in [30] by proposing an adaptive passivity-based approach. However, the major drawback of these approaches is that the non-minimum phase problem of DDBCs cannot be avoided and further deteriorates the overall stability margin under large disturbances. Moreover, a time-scale model is required to design these controllers, which are quite hard to deal with in realistic applications.
Nonlinear feedback linearizing controllers (FBLCs) have an uncertainty/noise decoupling capability as discussed in [31,32,33,34], and these controllers are used in [35,36] for stabilizing the DC-bus voltage by overwhelming the non-minimum phase problem associated with DDBCs and the instability issue caused by CPLs. Though the approaches in [35,36] tackle the instability issue due to CPLs, the elimination of non-minimum phase problems is not completely achieved. Another FBLC is proposed in [37], where the non-minimum phase problem associated arising from DDBCs is avoided by considering the inductor current as an output function. However, the zero-dynamic stability is not presented in [37] though it is important and the control law in [37] is derived only for resistive loads though nonlinear dynamics of CPLs lead to unstable operation. Moreover, the performance of FBLC schemes so far discussed here highly rely on the precise parametric information of the system, which is quite impossible as these parameters change due to changes in operating points. On the other hand, the nonlinear sliding mode controller (SMC) is an effective approach for dealing with robustness against parameter uncertainties and external disturbances in both nonlinear and linear systems [38,39]. Hence, the parameter sensitivity problem of a FBLC can be resolved using SMC schemes and a robust pulse width modulation (PWM)-based SMC is used in [40] to achieve the desired transient and steady-state performance of DC microgrids where DDBCs feed CPLs. Similar approaches are presented in [41,42] to achieve the same control objective as that of [40]. Though SMCs effectively handle the effects of parameter variations, the utilization of a discontinuous function and fixed gain for the sliding surface results in unwanted chattering in control laws, which can even damage power electronic converters in practical applications.
The shortcomings of SMCs are overcome in [43,44,45,46] by proposing a nonlinear backstepping controller (BSC), and these controllers are explored in [47] for stabilizing DC-bus voltage in the DDBC feeding CPLs. However, the implementation of the BSC still requires knowing the accurate parameters of the system as neither parametric uncertainties nor external disturbances are incorporated during the design. The issues related to parametric uncertainties and external disturbances are alleviated in [48] using an adaptive BSC for ensuring the large signal stability of the DCDN with CPLs. However, an observer is used to estimate external disturbances, which is quite an expensive approach. Moreover, the non-minimum phase problem associated with DDBCs is not dealt with in this work. To avoid this drawback, a composite controller that is a combination of FBLC and adaptive BSC schemes is proposed in [49,50], where the non-minimum phases problem and impacts of the negative-impedance due to CPLs are canceled by transforming the nonlinear model into a linear canonical form. However, these controllers do not ensure better transient response when the system parameters change due to wide variations of operating points. Apart from this, the zero dynamic stability for the remaining state variables that are not transformed through the feedback linearization process is not discussed in these papers. To address the aforementioned problems, an SMC and adaptive BSC are combined in [51]. However, a conventional sliding surface is used in this controller, which leads to the chattering phenomena in the control effort and makes it impossible to ensure the desired control performance.
Motivated from the limitations of existing literature, a composite scheme based on the backstepping double integral-sliding mode controller (BDI-SMC) is proposed in this work to enhance the stability of DDBC feeding CPLs in DCDNs. In this work, the issues related to the non-minimum phase arising from DDBCs and negative-impedance behaviors of CPLs are tackled by canceling nonlinearities and transforming the nonlinear dynamical model into a feedback linearized model using the exact feedback linearization approach. A double integral-sliding surface is then considered to derive the control law that can enhance the steady-state tracking performance while eliminating unwanted chattering effects. Afterwards, the actual control law is determined following design steps in both BSC and SMC. Finally, the feasibility of the actual control input in terms of maintaining the stability is analyzed using the Lyapunov function. A simulation study is conducted considering different operating scenarios of the system to verify its effectiveness. Additionally, its superiority is demonstrated by comparing the results with those of traditional nonlinear SMC and PI controllers.

2. System Description and Its Dynamical Model

The overall structure of a DCDN is depicted in Figure 1. It is well-known that the DC source generally consists of renewable energy-based distributed generation systems (DGS) such as solar photovoltaic (PV) system, rectifier in conjunction wind power generation systems, etc., which works as the main power supply. The DDBCs are commonly used for interfacing the DC source with the main DC-bus so that the voltage requirement of various loads can easily be met. Among these loads, some tightly regulated loads draw constant power from the DC-bus, which are also known as CPLs and exhibit negative-impedance characteristics. The electrical characteristic of CPLs can be described using the following voltage–current relation:
i C P L = P C P L v b u s
where i C P L denotes the current of a CPL, P C P L represents the power of a CPL, and v b u s is the DC-bus voltage. The concept of the small disturbance analysis can be applied around an equilibrium point of Equation (1). Based on this analysis, the equivalent impedance of a CPL can be expressed as follows:
R C P L = v b u s i C P L = P C P L I C P L 2
where I C P L is the CPL steady-state value of the current. From Equation (2), it is obvious that the negative-impedance behavior of a CPL creates a negative impact on the performance, i.e., it decreases the damping of the system, which further destabilizes the system, especially when it is connected with a converter. Since the nonlinearity introduced into system is due to CPLs, traditional linear controllers cannot guarantee the stability against large disturbances. Hence, the employment of a nonlinear controller is essential to neutralize the nonlinear effect of CPLs. However, to achieve such an objective from a controller, it is necessary to have an appropriate dynamical model. Hence, a dynamical model for DDBCs feeding a CPL is developed in the following to meet the controller design requirement.
The simplified structure of a DDBC feeding a CPL in DCDNs is shown in Figure 2. In this configuration, a current controlled source is used to represent a lumped CPL whereas the lumped resistive load is represented by R L o a d . It is worth mentioning that the input DC voltage source of the DDBC will be obtained from RESs or another DC–DC converter. Now, according to the simplified structure as shown in Figure 2, the expression of its model while on ( T o n ) and off ( T o f f ) can be obtained as follows:
x ˙ = ( A o n x + b o n ) u + ( A o f f x + b o f f ) ( 1 u )
with
A o n = r b L b 0 0 P C P L v b u s , b o n = V i n L b 0 , A o f f = r b L b 1 L b 1 C b u s P C P L v b u s , b o f f = V i n L b 0 , a n d x = i b v b u s
where i b represents the inductor current, V i n is the input voltage of the converter, v b u s is the main DC-bus voltage, L is the inductor, r b is the parasitic resistance of an inductor, u is the duty cycle, and C b u s is the DC-bus capacitance. It worth noting that the inductor current, i b , and the main DC-bus voltage, v b u s , are considered state variables. It is well-known that a discontinuous converter model can be approximated by a continuous model by selecting the converter switching frequency as being higher than the natural frequency. Hence, for continuous conduction mode (CCM) operations, the discontinuous control input u can be replaced by the duty ratio μ , which is a continuous function in the subinterval [0, 1]. Therefore, by considering the CCM operation, the model as represented by Equation (4) can be expressed as follows:
d i b d t = r b L b i b + V i n v b u s L b + v b u s L b μ d v b u s d t = 1 C b u s ( i b v b u s R L o a d P C P L v b u s ) i b C b u s μ
The proposed BDI-SMC is designed based on the model as described by Equation (4) which is discussed in the next section.

3. Proposed Controller Design Approach

In this section, the proposed BDI-SMC is designed for DDBCs feeding CPLs. The key control objective is to achieve fast transient and desired steady-state tracking errors of the DC-bus voltage. However, the dynamical model represented by Equation (4) is not suitable for designing the BDI-SMC in its current form. Hence, the following steps need to be followed to make the model suitable for the controller design:
  • Transformation of the model into an exactly linearized system using an exact feedback linearization approach and making it suitable to apply the backstepping control approach;
  • Elimination of the non-minimum phase problem of DDBCs by considering the total stored energy and its rate of change as two new state variables;
  • Derivation of the control law using the proposed scheme that satisfies the desired tracking performance to track the DC-bus voltage; and
  • Stability analysis of the whole system with the newly derived control input performed using the Lyapunov stability theory.
All these steps are discussed in detail through the following subsections.

3.1. Transformation of the Model into an Exactly Linearized System Using the Exact Feedback Linearization

The transformation of the nonlinear model of the DDBC with a CPL in Equation (4) can be represented as the following generalized form:
x ˙ = f ( x ) + g ( x ) u y = h ( x )
where x = [ x 1 , x 2 , , x n ] T is the state of the system, u is the input, y is the output of the system, and f ( x ) and g ( x ) are nonlinear functions of states and parameters with g ( x ) 0 . Fitting Equations (4) into (5), it can be written as follows:
f ( x ) = r b L b x 1 + ( V i n x 2 L b ) 1 C b u s ( x 1 x 2 R L o a d P C P L x 2 ) , a n d g ( x ) = x 2 L b x 1 C b u s T
where x = [ i b v b u s ] T and u = μ . The following steps are necessary to transform the nonlinear system into an exactly linearized system using the exact feedback linearization scheme.
Step 1: Selection of the output function
The feedback linearizability depends on the output of the system, which can be selected in a different way. For the DDBC with a CPL, the output function can be chosen as any of the states (i.e., the capacitor voltage or inductor current) and the combination of these states in the form of the total energy of the system. The system becomes partially linearized when the capacitor voltage is selected as the output. Hence, the system will be a non-minimum phase one as the internal dynamic stability cannot satisfy the stability criterion. This issue can be tackled by selecting the inductor current as the output, which also makes the system partially linearized but with the stable internal dynamic. However, the regulation of the output voltage by indirectly controlling the inductor current results in excessive overshoot and slower response. Under this situation, the output needs to be chosen in such a way that satisfies the requirement of the exact linearization approach, i.e., the system is exactly linearized for which the relative degree of the exactly linearized system is equal to the order of the system. Based on this discussion, the total stored energy is considered an output function that can be expressed as follows:
y = h ( x ) = 1 2 L b i b 2 + 1 2 C b u s v b u s 2
Step 2: Relative degree calculation
In this step, the relative degree for the nonlinear system as presented by Equation (5) is calculated using the Lie derivative while considering the output function in Equation (6). To calculate the relative degree, the following condition should be satisfied:
L g L f r 1 h ( x ) 0
In Equation (7), r is the relative degree while L represents the Lie derivative along the vector field denoted by the subscript. To satisfy the condition for the exact linearization approach, the relative degree of the n th order system will be r = n , which satisfies the following expressions:
L g L f 1 1 h ( x ) = L g L f 2 1 h ( x ) = = L g L f n 2 h ( x ) = 0 L g L f n 1 h ( x ) 0
Based on the model and output function, the following expressions are obtained:
r = n = 2 L g L f 1 1 h ( x ) = 0
and
L g L f n 1 h ( x ) 0
Hence, the system is exactly linearized.
Step 3: Nonlinear coordinate transformation and exact linearization
In this step, the coordinate transformation technique is adopted to convert the original x state variables into new z state variables, which can be discussed as follows:
z 1 = h ( x ) = L f 1 1 h ( x ) = 1 2 L b i b 2 + 1 2 C b u s v b u s 2
in which the dynamic can be written as
z 1 ˙ = h ( x ) x x ˙
Using Equation (5), Equation (10) can be written as follows:
z 1 ˙ = h ( x ) x f ( x ) + h ( x ) x g ( x ) u = L f h ( x ) + L g L f 1 1 h ( x ) u
Since L g L f 1 1 h ( x ) = 0 , Equation (11) can be written as follows:
z 1 ˙ = z 2 = L f h ( x ) = V i n x 1 x 2 2 R L o a d P C P L r b x 1 2
Equation (12) can be written as follows:
z 2 ˙ = L f 2 h ( x ) + L g L f 2 1 h ( x ) u = ν
Since L g L f 2 1 h ( x ) 0 , the original nonlinear system can be represented as the following exactly linearized form:
z 1 ˙ = z 2 z 2 ˙ = ν
where z 1 and z 2 are the state variables of the exactly linearized system and ν is the control variable of the transformed linear systems. The model in Equation (14) can be rewritten as follows:
z 1 ˙ = z 2 z 2 ˙ = ν = a ( x ) + b ( x ) μ
where
a ( x ) = L f 2 h ( x ) = ( V i n 2 x 1 r b ) ( V i n x 2 r b x 1 ) L b 2 x 2 R L o a d C b u s ( x 1 x 2 R L o a d P C P L x 2 ) b ( x ) = L g L f h ( x ) = ( V i n 2 x 1 r b ) x 2 L b + 2 x 1 x 2 R L o a d C b u s
The proposed controller is designed based on this model, which is discussed in the following subsection.

3.2. Controller Design

In this subsection, the control law is determined using the combination of backstepping and double integral-sliding mode control schemes. Here, the main objectives are to track z 1 and z 2 , which ultimately ensures the desired tracking of the DC-bus voltage under large disturbances. The following steps describe the design process for the proposed BDI-SMC.
Step 1: For fulfilling the design objective, the first tracking error ( e 1 ) can be defined as follows:
e 1 = z 1 z 1 ( r e f )
where z 1 ( r e f ) is the reference value of the state z 1 , which can be calculated as follows:
z 1 ( r e f ) = 1 2 L b i b ( r e f ) 2 + 1 2 C b u s v b u s ( r e f ) 2
where i b ( r e f ) = P C P L V i n is the reference value of the inductor current and v d c ( r e f ) is the reference value of the DC-bus voltage. Now, the dynamic of e 1 using Equation (16) can be obtained as follows:
e 1 ˙ = z 2 z 1 ˙ ( r e f )
As the actual control input does not appear in Equation (18), z 2 is assumed to be the virtual control input and γ is assumed to be the corresponding stabilizing function or virtual control law. Hence, the final error ( e 2 ) can be defined as follows:
e 2 = z 2 γ
Using Equation (19), Equation (18) can be rewritten as follows:
e 1 ˙ = e 2 + γ z 1 ˙ ( r e f )
At this stage, it is required to check the stability of the tracking error dynamic e ˙ 1 , and to do this, the following Lyapunov function (LF) is considered:
W 1 = 1 2 e 1 2
in which the time derivative using Equation (20) can be written as follows:
W 1 ˙ = e 1 [ e 2 + γ z 1 ˙ ( r e f ) ]
From Equation (22), γ can be selected as follows:
γ = k 1 e 1 + z 1 ˙ ( r e f )
where k 1 is a positive constant. Substituting Equations (23) into (22) yields the following:
W 1 ˙ = k 1 e 1 2 + e 1 e 2
From Equation (24), it can be seen that, if e 2 = 0 , then W ˙ 1 0 . To achieve this, the next step is essential.
Step 2: The dynamic of e 2 can be written as follows:
e 2 ˙ = z 2 ˙ γ ˙
Using Equation (15), the dynamic of e 2 can be expressed as follows:
e 2 ˙ = a ( x ) + b ( x ) μ γ ˙
At this instant, a double-integral sliding surface in term of e 2 can be selected as follows:
S = e 2 + α 1 e 2 d t + α 2 e 2 d t d t
where α 1 and α 2 are constant parameters of the sliding surface. The dynamic of Equation (27), using the value of e ˙ 2 , can be expressed as follows:
S ˙ = a ( x ) + b ( x ) μ γ ˙ + α 1 e 2 + α 2 e 2 d t
It is well-known that appropriately selecting a reaching law is very important to mitigate the chattering while improving the convergence time. Hence, a reaching law is selected as follows to meet the above objective:
S ˙ = β 1 s g n ( S ) β 2 S
where β 1 and β 2 are positive constants and the chattering effect depends on these values. Combining Equations (28) and (29), it can be written as follows:
a ( x ) + b ( x ) μ γ ˙ + α 1 e 2 + α 2 e 2 d t = β 1 s g n ( S ) β 2 S
From Equation (30), the actual control law can be determined as follows:
μ = 1 b ( x ) [ a ( x ) γ ˙ + α 1 e 2 + α 2 e 2 d t + 1 S e 1 e 2 + β 1 s g n ( S ) + β 2 S ]
Substituting Equation (31) into Equation (28) yields
S ˙ = β 1 s g n ( S ) β 2 S 1 S e 1 e 2
The following Lyapunov function is selected to ensure overall stability with the derived control law:
W ˙ 2 = W 1 + 1 2 S 2
Using Equations (24) and (32), W ˙ 2 can be written as follows:
W ˙ 2 = k 1 e 1 2 β 1 | S | β 2 S 2
Since k 1 > 0 , β 1 > 0 , and β 2 > 0 , W ˙ 2 0 . Thus, the overall stability of the system is guaranteed with the designed control law as represented by Equation (31). The effectiveness of the designed BDI-SMC is demonstrated in the next section.

4. Simulation Results

To verify the effectiveness of the designed composite BDI-SMC strategy, a similar simulation model as that shown in Figure 2 is built on the MATLAB/Simulink platform. The nominal voltage of the main-DC bus of the distribution network is considered as 110 V while the rated power of DC loads is considered as 2 kW. In order to capture the highest destabilization effect of the DC load on the DC distribution network, a pure CPL is considered the DC power demand rather than taking into account the composite load demand. The frequency of the power electronic interface boost converter is set as 5 kHz with a sampling frequency of 100 kHz to evaluate the performance of the designed BDI-SMC. It is well-known that, during the implementation of controllers, it is essential to know the system parameters. Hence, the system parameters used for the simulation study are listed in Table 1. The gain parameters of the designed nonlinear controller are listed as follows: k 1 = 1000 , α 1 = 70 , α 2 = 0.45 , β 1 = 100 , and β 2 = 0.01 . It is worth mentioning that the gain parameters are selected based on the trial and error method to meet the desired control objective.
The performance of the BDI-SMC is verified by widely varying the operating region by considering the variations in the reference power of CPLs, main DC-bus reference voltage, and input power in terms of the input source voltage. Therefore, the following three case studies are considered to demonstrate the performance of the designed controller:
  • Case I: Controller performance investigation with variations in the reference power of the CPL;
  • Case II: Controller performance investigation with variations in the reference voltage of the DC-bus; and
  • Case III: Controller performance investigation with variations in the input voltage.
To show the merits of the designed BDI-SMC, the performance is also compared with the existing SMC (ESMC), as proposed in [40], and with a conventional proportional-integral (PI) controller.
Case I: Controller performance investigation with variations in the reference power of the CPL
In this scenario, the variation in the reference power of CPLs is taken into consideration to evaluate the performance of the designed controller and existing controllers. At the beginning of the simulation, the rated power of the CPL is considered as 2 kW whereas it is increased to 4 kW at t = 1 s. On the other hand, other parameters are kept unchanged. Due to the transient power of CPLs, as shown in Figure 3a, the post-disturbance dynamic response of the main DC-bus and inductor current are affected, which can be seen in Figure 3b,c, respectively. From these responses, it can be observed that all three controllers can ensure stability. However, the designed BDI-SMC can provide faster dynamic responses along with less undershoot compared with the ESMC and PI. Again at t = 2 s, the CPL power is decreased from 4 kW to 500 W, which is considered a large disturbance in the system. Due to this large disturbance, the conventional PI controller is unable to provide sufficient damping torque into the networks, consequently leading to instability in both the main DC-bus voltage and inductor current, which can be clearly seen from Figure 3b,c. Meanwhile, both the designed BDI-SMC and the ESMC can ensure stability, which can be clearly seen from Figure 3b,c, respectively. However, though both controllers can maintain zero output voltage tracking errors, the designed BDI-SMC ensures a faster settling time and less overshoot. The corresponding control signal for all three controllers is depicted in Figure 3d,e, where it is obvious that the designed control signal is more stable compared with the PI and ESMC controllers. Furthermore, it can be observed that the designed controller can effectively eliminate the chattering effect on the PWM whereas the ESMC cannot attenuate the chattering effect.
Case II: Controller performance investigation with the variations in the reference voltage of the DC-bus
In this case study, the main DC-bus voltage increases from its equilibrium state 110 V to 160 V at t = 1.2 s and again increases from 160 V to 220 V at t = 2.2 s, whereas the CPL is set as 2 kW. The corresponding system responses are illustrated in Figure 4. From Figure 4a, it can be observed that the PI and ESMC cannot ensure a main DC-bus voltage tracking performance with a faster settling time and less overshoot/undershoot whilst the BDI-SMC can quickly track the new reference main DC-bus voltage as the settling time overshoot/undershoot are close to zero. Similarly, from Figure 4b, it can be observed that the designed BDI-SMC can provide a faster dynamic performance compared with the ESMC and PI. However, although the overshoot/undershoot in the inductor current is less with the ESMC, the control signal contains higher chattering, as illustrated in Figure 4d. As a result, the switching losses are higher, which reduces the overall system performance. On the other hand, the designed BDI-SMC is able to provide an oscillation-free control signal to the PWM compared with the ESMC, which can be clearly seen from Figure 4d,e. Throughout this simulation study, the load power is constant due to the electrical characteristics of the CPL, which is shown in Figure 4c.
Case III: Controller performance investigation with the variations in the input voltage
Practically, the output power of RESs is continuously changeable due to their intermittent characteristics. To show that impact on the distribution network, in this case study, the variation in the input power is considered. For this purpose, the input voltage of the DC voltage increases from 55 V to 70 V and decreases from 70 V to 40 V at t = 1.4 s and t = 2.4 s, respectively. Figure 5 shows the corresponding dynamic responses of the system. From Figure 5b,c, it can be observed that all three controllers can accurately track the main DC-bus voltage and inductor current when input voltage variation occurs. However, the designed BDI-SMC has a faster dynamic response and a smaller overshoot compared with the ESMC and conventional PI control methods. Moreover, it can be seen that the CPL remained unchanged at the equilibrium state 2 kW, which is illustrated in Figure 5d.
From the above simulation results, it can be concluded that the designed BDI-SMC can provide fast dynamic convergence speed, accurate tracking of the DC-bus voltage, and good large disturbances stability for a DC–DC boost converter feeding a CPL. Moreover, it is obvious that the stability of the DC-bus voltage is not destroyed even after the large variations in the CPL power. Hence, the simulation result is consistent with the theoretical analysis.

5. Conclusions

A composite nonlinear controller combining the backstepping control theory and double integral-sliding mode control theory is proposed for a DC–DC boost converter feeding a CPL with distribution networks. In order to design the proposed controller, a canonical form is developed using the exact feedback linearization approach by considering the total stored energy as the output function. Based on the canonical form of the model, a composite nonlinear controller is designed to guarantee DC-bus voltage stability under large disturbances of a DC–DC boost converter feeding CPLs with negligible steady-state tracking error and fast transient responses. The effectiveness and theoretical analysis of the designed controller are verified through simulation results. In the future, a robust adaptive nonlinear composite controller will be designed by considering both parametric uncertainty and external disturbances.

Author Contributions

Conceptualization, S.K.G., T.K.R. and M.A.M.; methodology, S.K.G. and T.K.R.; software, S.K.G. and M.A.H.P.; validation, S.K.G. and T.K.R.; formal analysis, S.K.G., T.K.R. and M.A.H.P.; investigation, S.K.G. and T.K.R.; writing—original draft preparation, S.K.G. and T.K.R.; writing—review and editing, T.K.R. and M.A.M.; supervision, T.K.R. and M.A.M.; project administration, T.K.R. and M.A.M. All authors have read and agreed to the current version of the manuscript.

Funding

This research received no external funding.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

Abbreviations

The following abbreviations are used in this manuscript:
BDI-SMCNonlinear Backstepping Double Integral-Sliding Mode Controller
BSCNonlinear Backstepping Controller
CPLConstant Power Load
CCMContinuous Conduction Mode
DGSsDistributed Generation Systems
DDBCDC–DC Boost Converter
DCDNsDC Distribution Networks
ESMCExisting Sliding Mode Controller
FBLCsNonlinear Feedback Linearizing Controllers
MPCModel Predictive Controller
PVSolar Photovoltaic
PECsPower Electronic Converters
PIProportional-Integral Controller
PWMPulse Width Modulation
RESsRenewable Energy Sources
SMCSliding Mode Controller
VPSsVehicular Power Systems

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Figure 1. Typical layout of a DCDN.
Figure 1. Typical layout of a DCDN.
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Figure 2. The simplified structure of a DDBC feeding a CPL.
Figure 2. The simplified structure of a DDBC feeding a CPL.
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Figure 3. Dynamic response of the system with the variations in the CPL reference power.
Figure 3. Dynamic response of the system with the variations in the CPL reference power.
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Figure 4. Dynamic response of the system with the variations of the main DC-bus reference voltage.
Figure 4. Dynamic response of the system with the variations of the main DC-bus reference voltage.
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Figure 5. Dynamic response of the system with the variations in the input voltage.
Figure 5. Dynamic response of the system with the variations in the input voltage.
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Table 1. Nominal system parameters of the system.
Table 1. Nominal system parameters of the system.
ParametersDescriptionValue
V i n Supply voltage55 V
V b u s Main DC-bus voltage110 V
P C P L Nominal power in constant power load2 kW
r b Parasitic resistance of an inductor2 m Ω
L b Inductance of the converter5 mH
C b u s Capacitance of the main DC-bus6 mF
R L o a d Resistive Load
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MDPI and ACS Style

Ghosh, S.K.; Roy, T.K.; Pramanik, M.A.H.; Mahmud, M.A. Design of Nonlinear Backstepping Double-Integral Sliding Mode Controllers to Stabilize the DC-Bus Voltage for DC–DC Converters Feeding CPLs. Energies 2021, 14, 6753. https://doi.org/10.3390/en14206753

AMA Style

Ghosh SK, Roy TK, Pramanik MAH, Mahmud MA. Design of Nonlinear Backstepping Double-Integral Sliding Mode Controllers to Stabilize the DC-Bus Voltage for DC–DC Converters Feeding CPLs. Energies. 2021; 14(20):6753. https://doi.org/10.3390/en14206753

Chicago/Turabian Style

Ghosh, Subarto Kumar, Tushar Kanti Roy, Md. Abu Hanif Pramanik, and Md. Apel Mahmud. 2021. "Design of Nonlinear Backstepping Double-Integral Sliding Mode Controllers to Stabilize the DC-Bus Voltage for DC–DC Converters Feeding CPLs" Energies 14, no. 20: 6753. https://doi.org/10.3390/en14206753

APA Style

Ghosh, S. K., Roy, T. K., Pramanik, M. A. H., & Mahmud, M. A. (2021). Design of Nonlinear Backstepping Double-Integral Sliding Mode Controllers to Stabilize the DC-Bus Voltage for DC–DC Converters Feeding CPLs. Energies, 14(20), 6753. https://doi.org/10.3390/en14206753

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