Design and Analysis of Non-Isolated Three-Port SEPIC Converter for Integrating Renewable Energy Sources

Abstract

An efficient way of synthesizing a three port non-isolated converter from a single-ended primary inductor converter (SEPIC) is proposed in this paper. The primary SEPIC converter is split into a source cell and a load cell. Two such source cells are integrated through direct current (DC) link capacitors with a common load cell to generate a three-port SEPIC converter. The derived converter features single-stage power conversion with reduced structural complexity and bidirectional power flow capability. For bidirectional power flow, it incorporates a battery along with an auxiliary photovoltaic source. Mathematical analyses were carried out to describe the operating principles and design considerations. Experiments were performed on an in-house-built prototype three-port unidirectional converter, and the results are presented to validate the feasibility of the designed converter.

1. Introduction

Renewable energy resources are of potential interest nowadays due to environmental problems, high oil prices, global warming, and the depletion of fossil fuels. Though these renewable energy resources are abundant and cause zero emissions, they are intermittent in nature. When integrating, these power generators provide low voltage and require high-gain converters to meet the load demand. Thus, power electronic technology plays a significant role in interfacing hybrid renewable power systems, electric traction, and uninterrupted power supplies [1,2]. To overcome the intermittent nature of energy resources, future power systems will also require the interfacing of various energy sources using multisource technology. To enable multi-source technology, a multi-input power converter (MIPC) that can accommodate a variety of sources, as shown in Figure 1, seems to be essential. A few limitations in this structure are as follows:

• MIPCs utilize separate direct current (DC)–DC power converters to integrate diversified energy sources to a common DC bus, which results in a higher implementation cost.
• In the case of alternating current (AC) loads, the system needs an extra inverter, and as a result the efficiency is reduced.

Due to the above disadvantages, the implementation of a MIPC is complicated.

To overcome the drawbacks of MIPCs, such as structure complications, multi-port converters (MPC) have been proposed. In MPCs, various sources are fed to the load through a single power electronic converter, as shown in Figure 2. MPCs reduce the structural complexity and the control technique.

These power electronic converters can be classified based on:

• Topology (in series and parallel)
• Coupling (isolated and non-isolated)
• Port placement (single input–single output, multi-input–single output, multi-input–multi-output, and single input–multi-output)
• Conversion process (unidirectional and bidirectional)

Two input circuits with a current source connected in series to realize a high-efficiency, zero voltage switching dual-input converter are investigated in Reference [3]. In such series circuits, the weakest current source connected in series limits the current of the entire string. Thus, parallel-connected topologies are traditionally popular. Isolated converters use a transformer to achieve a high voltage gain, which increases the bulkiness of the system and leads to core-saturation problems. To achieve a wide output voltage, an interleaved LLC converter with voltage doublers is proposed in Reference [4]. A coupled-inductor-based bidirectional converter, as investigated in Reference [5], provides a high voltage gain and efficiency by employing soft switching and voltage clamping techniques to reduce the switching loss and achieve a high voltage gain. However, the shortcoming of this converter is that current ripples are introduced, due to an increase in the ratio of the coupled inductor. It therefore requires a filter arrangement, which in turn increases the structural complexity and the cost. To overcome the need for a filter requirement, a (non-isolated) converter without galvanic isolation is a good candidate to provide a large voltage gain with reduced size and cost. Such a single-stage Zeta single-ended primary inductor converter (SEPIC) converter is presented in Reference [6]. A high-gain, non-isolated DC–DC converter is analyzed in Reference [7]. A step-up converter combining the features of a KY converter and a buck–boost converter with a high voltage conversion ratio is presented in Reference [8]. A non-isolated, bidirectional DC–DC converter that uses four active switches is addressed in Reference [9]. A SEPIC-integrated boost converter with isolation, proposed in Reference [10], has one active switch, two inductors, and three capacitors. The above-mentioned converters are unidirectional, with a single input–single output (SISO) configuration. A systematic way of deriving MPCs using full bridge (FB) and bidirectional DC–DC converters (BDCs) is explained in Reference [11]. Various configurations of multiport converters using a DC link inductor are well-described in Reference [12]. A new multi-input DC–DC converter topology that is capable of integrating diversified energy resources of different voltage–current characteristics is proposed in Reference [13]. The setback for this converter is that only one input is allowed to transfer energy into the load at a time in boost mode. The concept of extracting pulsating source cells from basic converters like buck, boost, buck–boost, Zeta, Cuk, and SEPIC is reported in Reference [14].

A dual-input boost–buck converter with a coupled inductor is analyzed in Reference [15]. Though the presence of the coupled inductor causes current ripples, the interleaving mode operation of the converter reduces the ripples and makes the converter suitable for thermoelectric generator application. Integrated two input converters using buck and SEPIC topology are addressed in Reference [16]. A generic structure of a single-ended primary-inductor converter (SEPIC)-based multi (m)-input DC–DC converter is investigated in Reference [17]. This converter utilizes (m-2) +3 switches to interface ‘m’ input resources. For example, four active switches are required for realization of a three input structure of this converter. A single input–multi-output structure converter with the ability of generating buck, boost, and inverted output simultaneously is presented in Reference [18]. The drawback of this converter is that it is a single input–multi-output (SIMO) model, capable of interfacing only one input. The unified energy management scheme dealt with in Reference [19] employs different current control structures for various components of micro-grids, such as super capacitors, battery, renewable energy resources (RES), and voltage source converters (VSC). A power flow management control strategy based on sensing the battery voltage to select the operating modes of a bidirectional converter is presented in Reference [20]. A multiport power electronic interface as energy router with inductively coupled power transfer, ultra-capacitor and battery to solve the pulse charging is investigated in Reference [21]. Power budgeting using DC link voltage and current control methods have been analyzed in Reference [22].

To overcome drawbacks such as the size and control complexity due to the isolated transformer and a greater number of components, and to have a flexible integration of the diversified energy resources of different characteristics, a compact, high-profile power electronic interface is required. Most of the multi-input converter (MIC) topologies in the literature are derived from basic buck–boost topologies, and they leave scope for the further development of topological structures by using special converters. Therefore, this paper proposes a modular, non-isolated converter that is derived from basic SEPIC topology for accommodating arbitrary input sources and output loads. Due to special features, such as a better power factor from a continuous input current, non-inverting output, gracious response, and true shut down during short circuits, this SEPIC converter has wide applications in connecting flexible input voltages with stable outputs, battery-operated equipment, and lighting applications.

2. Three-Port SEPIC Converter

2.1. Synthesis of the Three-Port SEPIC Converter

A generalized structure of the proposed circuit is shown in Figure 3. It indicates that the number of ports can be further increased/decreased by connecting/disconnecting the additional pulsating voltage cells (PVC), depending on the availability of the sources.

In this paper, three-port (two inputs and one output) unidirectional and bidirectional SEPIC converters are proposed, as shown in Figure 4 and Figure 9. The proposed structures are a combination of PVC. PVCs can be categorized into two types; pulsating voltage source cells (PVSC) for the input side, and pulsating voltage load cell (PVLC) for the output side. Each PVSC connects with a common PVLC (as it is a MISO structure) through a coupling capacitor, and this forms a complete SEPIC structure.

2.1.1. Steady State Analysis of a Three-Port Unidirectional SEPIC Converter (Topology-1)

In topology-1, if both sources are renewable DC sources; for example, if V₁ is a solar photovoltaic system and if V₂ is a fuel cell, then the converter works as a unidirectional converter, as the energy flows only from the source to the load. If both sources have an equal voltage magnitude, then the switches S₁ and S₂ operate with the same duty cycle simultaneously. If the primary source is a solar photovoltaic system and the secondary source is an energy storage device, then it works as a partially bidirectional converter. The reason for partial bidirectional is that the battery will charge from the primary source if the battery nominal voltage is less than the primary source voltage. To charge the battery, the switch in the corresponding PVSC has to be permanently turned off, and only the switches of other PVSCs will operate. Figure 4 shows the circuit diagram of a three-port unidirectional SEPIC converter.

If two DC voltage sources with different magnitudes, V₁ and V₂, are considered, then in order to use the sources effectively, the two sources must operate at different duty cycles. The source with a higher magnitude operates for the lower duty cycles, and the source with the lower magnitude operates for a higher duty cycle.

Assuming that V₁ > V₂, then D₁ < D₂. D₁ and D₂ are the respective duty cycles for PVSC1 and PVSC2. The operation of the three-port unidirectional SEPIC converter (Topology-1) is categorized into three modes, as shown in Figure 5.

Where D_eff is the effective duty of PVSC2, D_eff = D₂ − D₁, and D_D is the duty for which the diode conducts; D_D = 1 − D₂.

■

Mode-1 (S₁ and S₂ ON, only S₁ conducts): The equivalent circuit of Mode-1 is shown in Figure 6. Switches S₁ and S₂ are on during this mode. In a steady-state condition, the voltages on the input capacitors C₁ and C₂ are the source voltages V₁ and V₂, respectively. Since V₁ is considered to be greater than V₂, S₂ blocks the possibility of a reverse current through the input leg of PVSC2. This mode makes S₁ conduct the current, while S₂ is reverse-biased. Since D is reverse-biased, it does not conduct, and meanwhile, the load side current is maintained by the output capacitor C.

$${\mathrm{L}}_1\frac{{\mathrm{di}}_{\mathrm{L}1}}{\mathrm{dt}}={\mathrm{V}}_1$$

(1)

$${\mathrm{L}}_2\frac{{\mathrm{di}}_{\mathrm{L}2}}{\mathrm{dt}}={\mathrm{V}}_2-{\mathrm{V}}_{\mathrm{C}2}+{\mathrm{V}}_{\mathrm{C}1}$$

(2)

$$\mathrm{L}\frac{{\mathrm{di}}_{\mathrm{L}}}{\mathrm{dt}}={\mathrm{V}}_{\mathrm{C}1}$$

(3)

$${\mathrm{C}}_1\frac{{\mathrm{dV}}_{\mathrm{C}1}}{\mathrm{dt}}=-\left({\mathrm{i}}_{\mathrm{L}}+{\mathrm{i}}_{\mathrm{L}2}\right)$$

(4)

$${\mathrm{C}}_2\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}2}}{\mathrm{dt}}={\mathrm{i}}_{\mathrm{L}2}$$

(5)

$$\mathrm{C}\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}}}{\mathrm{dt}}=-\frac{{\mathrm{V}}_{\mathrm{C}}}{\mathrm{R}}$$

(6)

■

Mode-2 (S₁ OFF and S₂ ON): The equivalent circuit of Mode-2 is shown in Figure 7. Once the switch S₁ is off, the switch S₂ becomes forward-biased and starts conducting, since the duty cycle of S₂ is greater than S₁. Since the diode D is still in a reverse-biased condition, the load current is again maintained by the output capacitor C.

$${\mathrm{L}}_1\frac{{\mathrm{di}}_{\mathrm{L}1}}{\mathrm{dt}}={\mathrm{V}}_1-{\mathrm{V}}_{\mathrm{C}1}+{\mathrm{V}}_{\mathrm{C}2}$$

(7)

$${\mathrm{L}}_2\frac{{\mathrm{di}}_{\mathrm{L}2}}{\mathrm{dt}}={\mathrm{V}}_2$$

(8)

$$\mathrm{L}\frac{{\mathrm{di}}_{\mathrm{L}}}{\mathrm{dt}}={\mathrm{V}}_{\mathrm{C}2}$$

(9)

$${\mathrm{C}}_1\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}1}}{\mathrm{dt}}={\mathrm{i}}_{\mathrm{L}1}$$

(10)

$${\mathrm{C}}_2\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}2}}{\mathrm{dt}}=-\left({\mathrm{i}}_{\mathrm{L}1}+{\mathrm{i}}_{\mathrm{L}}\right)$$

(11)

$$\mathrm{C}\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}}}{\mathrm{dt}}=-\frac{{\mathrm{V}}_{\mathrm{C}}}{\mathrm{R}}$$

(12)

■

Mode-3 (S₁ and S₂ OFF, D conducts): The equivalent circuit of Mode-3 is shown in Figure 8. Both the switches S₁ and S₂ are in the off-state. The inductor L₁ and L₂ starts discharging, and the capacitors C₁ and C₂ start charging from the sources V₁ and V₂. The diode D becomes forward-biased. The load current is now supplied by the sources V₁ and V₂, through L₁, C₁, and L₂, C₂, respectively.

$${\mathrm{L}}_1\frac{{\mathrm{di}}_{\mathrm{L}1}}{\mathrm{dt}}={\mathrm{V}}_1-{\mathrm{V}}_{\mathrm{C}1}-{\mathrm{V}}_{\mathrm{C}}$$

(13)

$${\mathrm{L}}_2\frac{{\mathrm{di}}_{\mathrm{L}2}}{\mathrm{dt}}={\mathrm{V}}_2-{\mathrm{V}}_{\mathrm{C}2}-{\mathrm{V}}_{\mathrm{C}}$$

(14)

$$\mathrm{L}\frac{{\mathrm{di}}_{\mathrm{L}}}{\mathrm{dt}}=-{\mathrm{V}}_{\mathrm{C}2}$$

(15)

$${\mathrm{C}}_1\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}1}}{\mathrm{dt}}={\mathrm{i}}_{\mathrm{L}1}$$

(16)

$${\mathrm{C}}_2\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}2}}{\mathrm{dt}}={\mathrm{i}}_{\mathrm{L}2}$$

(17)

$$\mathrm{C}\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}}}{\mathrm{dt}}=\left({\mathrm{i}}_{\mathrm{L}1}+{\mathrm{i}}_{\mathrm{L}2}+{\mathrm{i}}_{\mathrm{L}}\right)-\frac{{\mathrm{V}}_{\mathrm{C}}}{\mathrm{R}}$$

(18)

Combining the equations from (1) to (18) with their respective operating periods, the steady-state equations of the proposed unidirectional converter can be deduced as follows:

$${\mathrm{L}}_1\frac{{\mathrm{di}}_{\mathrm{L}1}}{\mathrm{dt}}={\mathrm{V}}_1-{\mathrm{D}}_{\mathrm{eff}}\left({\mathrm{V}}_{\mathrm{C}1}-{\mathrm{V}}_{\mathrm{C}2}\right)-{\mathrm{D}}_{\mathrm{D}}\left({\mathrm{V}}_{\mathrm{C}1}+{\mathrm{V}}_{\mathrm{C}2}\right)$$

(19)

$${\mathrm{L}}_2\frac{{\mathrm{di}}_{\mathrm{L}2}}{\mathrm{dt}}={\mathrm{V}}_2-{\mathrm{D}}_1\left({\mathrm{V}}_{\mathrm{C}2}-{\mathrm{V}}_{\mathrm{C}1}\right)-{\mathrm{D}}_{\mathrm{D}}\left({\mathrm{V}}_{\mathrm{C}2}+{\mathrm{V}}_{\mathrm{C}}\right)$$

(20)

$$\mathrm{L}\frac{{\mathrm{di}}_{\mathrm{L}}}{\mathrm{dt}}={\mathrm{D}}_1{\mathrm{V}}_{\mathrm{C}1}+{\mathrm{D}}_{\mathrm{eff}}{\mathrm{V}}_{\mathrm{C}2}-{\mathrm{D}}_{\mathrm{D}}{\mathrm{V}}_{\mathrm{C}}$$

(21)

$${\mathrm{C}}_1\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}1}}{\mathrm{dt}}=-{\mathrm{D}}_1\left({\mathrm{i}}_{\mathrm{L}}+{\mathrm{i}}_{\mathrm{L}2}\right)+\left(1-{\mathrm{D}}_1\right){\mathrm{i}}_{\mathrm{L}1}$$

(22)

$${\mathrm{C}}_2\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}2}}{\mathrm{dt}}=\left(1-{\mathrm{D}}_{\mathrm{eff}}\right){\mathrm{i}}_{\mathrm{L}2}-{\mathrm{D}}_{\mathrm{eff}}\left({\mathrm{i}}_{\mathrm{L}1}+{\mathrm{i}}_{\mathrm{L}}\right)$$

(23)

$$\mathrm{C}\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}}}{\mathrm{dt}}={\mathrm{D}}_{\mathrm{D}}\left({\mathrm{i}}_{\mathrm{L}1}+{\mathrm{i}}_{\mathrm{L}2}+{\mathrm{i}}_{\mathrm{L}}\right)-\frac{{\mathrm{V}}_{\mathrm{C}}}{\mathrm{R}}$$

(24)

Assuming that the converter is operated in CCM, and neglecting the ripple voltage and ripple current, in a steady state average condition, V_C1 = V_1, V_C2 = V₂, and V_C = V_O. So, from Equation (21), we have:

$$0={\mathrm{D}}_1{\mathrm{V}}_1+{\mathrm{D}}_{\mathrm{eff}}{\mathrm{V}}_2-{\mathrm{D}}_{\mathrm{D}}{\mathrm{V}}_{\mathrm{O}}$$

$${\mathrm{V}}_{\mathrm{O}}=\frac{{\mathrm{D}}_1{\mathrm{V}}_1+{\mathrm{D}}_{\mathrm{eff}}{\mathrm{V}}_2}{1-{\mathrm{D}}_2}\mathrm{If}({\mathrm{V}}_1>{\mathrm{V}}_2)$$

(25)

$${\mathrm{V}}_{\mathrm{O}}=\frac{{\mathrm{D}}_2{\mathrm{V}}_2+{\mathrm{D}}_{\mathrm{eff}}{\mathrm{V}}_1}{1-{\mathrm{D}}_1}\mathrm{If}({\mathrm{V}}_2>{\mathrm{V}}_1)$$

(26)

The above Equation (25) represents the output voltage expression of topology-1. On solving the steady state Equations (19)–(24) by taking the left hand side as zero, the six state variables can be derived (i_L1, i_L2, i_L, V_C1, V_C2, and V_C):

$${\mathrm{i}}_{\mathrm{L}1}=\frac{{\mathrm{D}}_1{\mathrm{V}}_{\mathrm{O}}}{\left(1-{\mathrm{D}}_2\right)\mathrm{R}}={\mathrm{I}}_1$$

(27)

$${\mathrm{i}}_{\mathrm{L}2}=\frac{{\mathrm{D}}_{\mathrm{eff}}{\mathrm{V}}_{\mathrm{O}}}{\left(1-{\mathrm{D}}_2\right)\mathrm{R}}={\mathrm{I}}_2$$

(28)

$${\mathrm{i}}_{\mathrm{L}}=\frac{{\mathrm{V}}_{\mathrm{O}}}{\mathrm{R}}$$

(29)

$${\mathrm{V}}_{\mathrm{C}1}={\mathrm{V}}_1$$

(30)

$${\mathrm{V}}_{\mathrm{C}2}={\mathrm{V}}_2$$

(31)

$${\mathrm{V}}_{\mathrm{C}}={\mathrm{V}}_{\mathrm{O}}$$

(32)

2.1.2. Steady State Analysis of a Three-Port Bidirectional SEPIC Converter (Topology-2)

Topology-2 is designed to be a bidirectional converter with a solar photovoltaic system as a primary source, and a battery as an energy storage device. Figure 9 shows the circuit diagram of a three-port, bidirectional SEPIC converter. The converter possesses bidirectional power flow capability, as the battery can be charged both from the primary source and the regenerative energy, if it is available from the load side.

For bidirectional power flow with a solar photovoltaic system (V) and a battery (E), the converter operates with two possible conditions.

Case-1 (V < E, battery discharging): Switches S₁ and S₂ operate with duty cycles D₁ and D₂ (where D₁ > D₂) and S₃ will remain in the OFF condition. In this case, the converter operates as a unidirectional converter, i.e., in a similar fashion to that of topology-1. Figure 10 shows the modes of operation of topology-2 under this condition.

Since the converter operates in a similar fashion as that of topology-1 in this case, the output voltage expression will remain the same as topology-1:

$${\mathrm{V}}_{\mathrm{O}}=\frac{{\mathrm{D}}_2\mathrm{E}+{\mathrm{D}}_{\mathrm{eff}}\mathrm{V}}{1-{\mathrm{D}}_1}$$

(33)

where D_eff = D₁ − D₂, V = primary source voltage, E = battery nominal voltage.

Case-2 (V > E, battery charging): Switch S₂ will remain OFF; S₁ only will operate at duty cycle D. Two modes of operation are possible in this case, as shown in Figure 11.

■

Mode 1 (S₁ ON, S₂ and S₃ OFF): In this mode of operation, S₂ and S₃ remain in an off state and S₁ is on for the duty cycle D. C₁ discharges energy through the short path of S₁, and it flows through L and also through the anti-parallel diode of S₂, and charges C₂. The stored energy of L₂ freewheels through the battery, and the short path makes the battery charge up. L₁ charges from the source V. Meanwhile, the load is fed by the capacitor C, as the diode is reverse-biased. The equivalent circuit of this mode shown in Figure 12.

$${\mathrm{L}}_1\frac{{\mathrm{di}}_{\mathrm{L}1}}{\mathrm{dt}}=\mathrm{V}$$

(34)

$${\mathrm{L}}_2\frac{{\mathrm{di}}_{\mathrm{L}2}}{\mathrm{dt}}=-\mathrm{E}$$

(35)

$$\mathrm{L}\frac{{\mathrm{di}}_{\mathrm{L}}}{\mathrm{dt}}={\mathrm{V}}_{\mathrm{C}1}$$

(36)

$${\mathrm{C}}_1\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}1}}{\mathrm{dt}}={\mathrm{C}}_2\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}2}}{\mathrm{dt}}+{\mathrm{i}}_{\mathrm{L}}$$

(37)

$$\mathrm{C}\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}}}{\mathrm{dt}}=-\frac{{\mathrm{V}}_{\mathrm{C}}}{\mathrm{R}}$$

(38)

■

Mode-2 (S₁ OFF, S₂ OFF): In this mode of operation, S₂ and S₃ remain in the off state, and S₁ is also in the off state for 1-D. The capacitor C₁ charges from the voltage source V, and C₂ discharges through the inductor L₂ and the battery. This mode makes L₂ store energy, and the battery charge. L₁ releases stored energy through C₁. The anti-parallel diode of S₃ becomes forward-biased, and the load is powered up by the source and output inductor L. The equivalent circuit of this mode is shown in Figure 13.

$${\mathrm{L}}_1\frac{{\mathrm{di}}_{\mathrm{L}1}}{\mathrm{dt}}=\mathrm{V}-{\mathrm{V}}_{\mathrm{C}1}-{\mathrm{V}}_{\mathrm{C}}$$

(39)

$${\mathrm{L}}_2\frac{{\mathrm{di}}_{\mathrm{L}2}}{\mathrm{dt}}={\mathrm{V}}_{\mathrm{C}2}-\mathrm{E}-{\mathrm{V}}_{\mathrm{C}}$$

(40)

$$\mathrm{L}\frac{{\mathrm{di}}_{\mathrm{L}}}{\mathrm{dt}}={\mathrm{V}}_{\mathrm{C}2}-\mathrm{E}-{\mathrm{V}}_{\mathrm{C}}$$

(41)

$${\mathrm{C}}_1\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}1}}{\mathrm{dt}}={\mathrm{i}}_{\mathrm{L}2}$$

(42)

$$\mathrm{C}\frac{\mathrm{d}{\mathrm{V}}_{\mathrm{C}}}{\mathrm{dt}}={\mathrm{i}}_{\mathrm{L}}+\left({\mathrm{i}}_{\mathrm{L}1}-{\mathrm{i}}_{\mathrm{L}2}\right)-\frac{{\mathrm{V}}_{\mathrm{C}}}{\mathrm{R}}$$

(43)

Combining the equations from (34) to (43) with their respective operating periods, the steady-state equations of the proposed bidirectional converter (case-2) can be deduced as follows:

$${\mathrm{L}}_1\frac{{\mathrm{di}}_{\mathrm{L}1}}{\mathrm{dt}}=\mathrm{D}\mathrm{V}+\left(1-\mathrm{D}\right)\left(\mathrm{V}-{\mathrm{V}}_{\mathrm{C}1}-{\mathrm{V}}_{\mathrm{C}}\right)$$

(44)

$${\mathrm{L}}_2\frac{{\mathrm{di}}_{\mathrm{L}2}}{\mathrm{dt}}=-\mathrm{D}\mathrm{E}+\left(1-\mathrm{D}\right)\left({\mathrm{V}}_{\mathrm{C}2}-\mathrm{E}-{\mathrm{V}}_{\mathrm{C}}\right)$$

(45)

$$\mathrm{L}\frac{{\mathrm{di}}_{\mathrm{L}}}{\mathrm{dt}}=\mathrm{D}{\mathrm{V}}_{\mathrm{C}1}+\left(1-\mathrm{D}\right)\left({\mathrm{V}}_{\mathrm{C}2}-\mathrm{E}-{\mathrm{V}}_{\mathrm{C}}\right)$$

(46)

Assuming that the converter is operated in CCM, and neglecting the ripple voltage and ripple current, in a steady-state average condition, V_C1 = V, V_C2 = V, and V_C = V_O. So, from Equation (46), we have:

$$0=\mathrm{D}\mathrm{V}+\left(1-\mathrm{D}\right)\left(\mathrm{V}-\mathrm{E}-{\mathrm{V}}_{\mathrm{O}}\right)$$

$${\mathrm{V}}_{\mathrm{O}}=\frac{\mathrm{D}\mathrm{V}+\left(1-\mathrm{D}\right)\left(\mathrm{V}-\mathrm{E}\right)}{1-\mathrm{D}}$$

(47)

The above expression (47) represents the output voltage of topology-2 while charging.

During reverse power flow, if any, the switches S₁ and S₂ will remain off, and only S₃ will operate. If S₃ is on, the current will flow from the load side to the battery (E) through D₂ and L₂, and the inductor L₂ will store energy. If S₃ is off, the inductor L₂ discharges energy to the battery (E) through the anti-parallel diode of S₂. This means the battery is charged from the regenerative energy, if it is available from the load side.

2.1.3. Small Ripple Approximation of a Three-Port SEPIC Converter

The methods of operation for topology-1 and topology-2 (case-1) are similar. The parameters used for topology-1 can also be used for topology-2. In this section, the expressions for all of the circuit parameters are described. Following the individual modes, the expressions for L₁, L₂, L, C₁, C₂, and C concerning the current and voltage ripples are described below.

Consider the three modes, (i.e., D₁, D_eff, and D_D) operating for t₁, t₂, and t₃ periods respectively.

In mode-1 and mode-2, the inductor current increases from a low level to high level, say, I_L11 to I_L12, and in mode-3, the current falls from I_L12 to I_L11. Therefore, the current ripple is considered to be ΔI_L1 = I_L12 – I_L11. Thus:

$${\mathrm{L}}_1\frac{{\mathrm{di}}_{\mathrm{L}1}}{\mathrm{dt}}={\mathrm{V}}_1$$

$${\mathrm{L}}_1\frac{\Delta {\mathrm{I}}_{\mathrm{L}1}}{{\mathrm{t}}_1+{\mathrm{t}}_2}={\mathrm{V}}_1$$

If ‘T’ is the total period, then t₁, t₂, and t₃ can be represented as D₁T, D_effT, and D_DT, respectively. Thus:

$$\Delta {\mathrm{I}}_{\mathrm{L}1}=\frac{{\mathrm{V}}_1{\mathrm{D}}_2}{\mathrm{f}{\mathrm{L}}_1}$$

(48)

where f = 1/T, assuming that the inductor L₂ charges linearly during the periods t₁ and t₂ from I_L21 to I_L22. Thus, the current ripple is ΔI_L2 = I_L22 − I_L21.

$${\mathrm{L}}_2\frac{{\mathrm{di}}_{\mathrm{L}2}}{\mathrm{dt}}={\mathrm{V}}_2$$

$${\mathrm{L}}_2\frac{\Delta {\mathrm{I}}_{\mathrm{L}2}}{{\mathrm{t}}_1+{\mathrm{t}}_2}={\mathrm{V}}_2$$

$$\Delta {\mathrm{I}}_{\mathrm{L}2}=\frac{{\mathrm{V}}_2{\mathrm{D}}_2}{\mathrm{f}{\mathrm{L}}_2}$$

(49)

The output side inductor L discharges from a high value to low value, say I_L2 to I_L1, only within period t₃. Hence the ripple is ΔI_L = I_L2 − I_L1.

$$\mathrm{L}\frac{{\mathrm{di}}_{\mathrm{L}}}{\mathrm{dt}}=-{\mathrm{V}}_{\mathrm{C}}$$

$$-\mathrm{L}\frac{\Delta {\mathrm{I}}_{\mathrm{L}}}{{\mathrm{t}}_3}=-{\mathrm{V}}_{\mathrm{C}}$$

Here V_C = V_O, so:

$$\Delta {\mathrm{I}}_{\mathrm{L}}=\frac{{\mathrm{D}}_1{\mathrm{V}}_1+{\mathrm{D}}_{\mathrm{eff}}{\mathrm{V}}_2}{\mathrm{f}\mathrm{L}}$$

(50)

Similarly, the voltage ripples can be calculated from the steady-state equations. The voltage across C₁ rises (assuming linearly) from a low value to a high value, say V_C11 to V_C12, during the time periods t₂ and t₃. This flow gives a voltage ripple ΔV_C1 = V_C12 − V_C11. In this period, the capacitor is charging by the source current of V₁, i.e., I₁ = i_L1.

$$\Delta {\mathrm{V}}_{\mathrm{C}1}=\frac{1}{{\mathrm{C}}_1}{\displaystyle \underset{0}{\overset{{\mathrm{t}}_2+{\mathrm{t}}_3}{\int }}{\mathrm{i}}_{\mathrm{L}1}\mathrm{d}\mathrm{t}}=\frac{1}{{\mathrm{C}}_1}{\displaystyle \underset{0}{\overset{{\mathrm{t}}_2+{\mathrm{t}}_3}{\int }}{\mathrm{I}}_1\mathrm{d}\mathrm{t}}$$

$$\Delta {\mathrm{V}}_{\mathrm{C}1}=\frac{{\mathrm{I}}_1}{\mathrm{f}{\mathrm{C}}_1}\left({\mathrm{D}}_{\mathrm{eff}}+{\mathrm{D}}_{\mathrm{D}}\right)$$

$$\Delta {\mathrm{V}}_{\mathrm{C}1}=\frac{{\mathrm{I}}_1}{\mathrm{f}{\mathrm{C}}_1}\left(1-{\mathrm{D}}_1\right)$$

(51)

The capacitor C₂ is charging during period t₃ and t₁ from the source current V₂, i.e., I₂ = i_L2. Therefore, a voltage ripple of ΔV_C2 = V_C22 − V_C21 appears across capacitor C₂.

$$\Delta {\mathrm{V}}_{\mathrm{C}2}=\frac{1}{{\mathrm{C}}_2}{\displaystyle \underset{0}{\overset{{\mathrm{t}}_3+{\mathrm{t}}_1}{\int }}{\mathrm{i}}_{\mathrm{L}2}\mathrm{d}\mathrm{t}}=\frac{1}{{\mathrm{C}}_2}{\displaystyle \underset{0}{\overset{{\mathrm{t}}_3+{\mathrm{t}}_1}{\int }}{\mathrm{I}}_2\mathrm{d}\mathrm{t}}$$

$$\Delta {\mathrm{V}}_{\mathrm{C}2}=\frac{{\mathrm{I}}_2}{\mathrm{f}{\mathrm{C}}_2}\left({\mathrm{D}}_{\mathrm{D}}+{\mathrm{D}}_1\right)$$

$$\Delta {\mathrm{V}}_{\mathrm{C}2}=\frac{{\mathrm{I}}_2}{\mathrm{f}{\mathrm{C}}_2}\left(1-{\mathrm{D}}_{\mathrm{eff}}\right)$$

(52)

The capacitor C discharges during periods t₁ and t₂, providing the load current. The voltage ripple is defined as ΔV_C = V_C2 − V_C1.

$$-\Delta {\mathrm{V}}_{\mathrm{C}}=-\frac{1}{\mathrm{C}}{\displaystyle \underset{0}{\overset{{\mathrm{t}}_1}{\int }}\frac{{\mathrm{V}}_{\mathrm{C}}}{\mathrm{R}}\mathrm{d}\mathrm{t}}-\frac{1}{\mathrm{C}}{\displaystyle \underset{0}{\overset{{\mathrm{t}}_2}{\int }}\frac{{\mathrm{V}}_{\mathrm{C}}}{\mathrm{R}}\mathrm{d}\mathrm{t}}$$

$$\Delta {\mathrm{V}}_{\mathrm{C}}=\frac{{\mathrm{V}}_{\mathrm{C}}}{\mathrm{R}\mathrm{C}}\left({\mathrm{D}}_1+{\mathrm{D}}_{\mathrm{eff}}\right)$$

$$\Delta {\mathrm{V}}_{\mathrm{C}}=\frac{{\mathrm{D}}_1{\mathrm{V}}_1+{\mathrm{D}}_{\mathrm{eff}}{\mathrm{V}}_2}{\mathrm{f}\mathrm{R}\mathrm{C}}\left({\mathrm{D}}_1+{\mathrm{D}}_{\mathrm{eff}}\right)$$

(53)

Thus, the circuit parameters can be obtained from Equations (48) to (53):

$${\mathrm{L}}_1=\frac{{\mathrm{V}}_1{\mathrm{D}}_2}{\mathrm{f}\Delta {\mathrm{I}}_{\mathrm{L}1}}$$

(54)

$${\mathrm{L}}_2=\frac{{\mathrm{V}}_2{\mathrm{D}}_2}{\mathrm{f}\Delta {\mathrm{I}}_{\mathrm{L}2}}$$

(55)

$$\mathrm{L}=\frac{{\mathrm{D}}_1{\mathrm{V}}_1+{\mathrm{D}}_{\mathrm{eff}}{\mathrm{V}}_2}{\mathrm{f}\Delta {\mathrm{I}}_{\mathrm{L}}}$$

(56)

$${\mathrm{C}}_1=\frac{{\mathrm{I}}_1}{\mathrm{f}\Delta {\mathrm{V}}_{\mathrm{C}1}}\left(1-{\mathrm{D}}_1\right)$$

(57)

$${\mathrm{C}}_2=\frac{{\mathrm{I}}_2}{\mathrm{f}\Delta {\mathrm{V}}_{\mathrm{C}2}}\left(1-{\mathrm{D}}_{\mathrm{eff}}\right)$$

(58)

$$\mathrm{C}=\frac{{\mathrm{D}}_1{\mathrm{V}}_1+{\mathrm{D}}_{\mathrm{eff}}{\mathrm{V}}_2}{\mathrm{f}\mathrm{R}\Delta {\mathrm{V}}_{\mathrm{C}}}\left({\mathrm{D}}_1+{\mathrm{D}}_{\mathrm{eff}}\right)$$

(59)

3. Results Analysis

The analysis of the proposed converter is further discussed and verified in this section, through simulations for both topologies, using MATLAB/Simulink software.

Table 1. Simulation parameters.

Parameters	Estimated Values	Simulation Values	Unit
L1, L2	14.74	15	mH
C1, C2	0.462	0.54	mF
L	14.74	15	mH
C	0.299	0.54	mF
R	60	60	Ohm
V1	42	42	V
V2	42	42	V
D1	67	67	%
D2	50	50	%
f (switching freq.)	10,000	10,000	Hz

indicates the parameters used in the simulation of topology-1.

The permissible value of the current and voltage ripples are assumed to be ΔI_L1 = ΔI_L2 = ΔI_L = 0.5 A, and ΔV_C1= ΔV_C2 = ΔV_C = 0.5 V. The input voltages (V₁, V₂), duty cycles (D₁, D₂), and the corresponding values of L₁, L₂, L, C₁, C₂, and C are estimated by using Equations (54)–(59), as shown in Table 1.

Figure 14 shows the waveforms of the current and voltage through and across the inductors and capacitors, respectively. The output voltage and current of the proposed converter (topology-1) shown in Figure 15 was found to be V_O = 79 V and I_O = 1.3 A. The actual current and voltage ripples estimated from the simulation were approximately equal, and within the allowed value range of the ripples. The actual values of the ripples from the simulation were ΔI_L1 = 0.3 A, ΔV_C1 = 0.13 mV, ΔI_L2 = 0.35 A, ΔV_C2 = 0.4 mV, ΔI_L = 0.4 A, and ΔV_C = 0.4 mV.

The comparisons of the simulated output voltage (from the Simulink model) and the estimated output voltage from Equations (25) and (26) for the different sets of input voltages (V₁, V₂) and duty cycles (D₁, D₂) are shown in

Table 2. Comparison of the simulated and estimated results of topology-1.

V1 (Volt)	V2 (Volt)	D1 (%)	D2 (%)	Sim. VO (Volt)	Est. VO (Volt)
24	12	30	60	28.5	27
30	15	30	60	36	33.75
25	20	55	68.75	50	52.8
30	20	50	75	77	80
36	24	40	60	52	48
36	24	50	75	92	96
35	42	67	50	79	81.66

. The simulation and the estimated results were approximately same for each individual set of inputs.

The output voltage and current waveforms of topology-2 during discharging (case-1) are shown in Figure 16. The primary source voltage was taken as V = 16 V, and the nominal battery voltage rating was E = 24 V. An initial state of charge of the battery (SOC) was considered to be 80%. The duty cycles of the primary source and the battery were assumed to be 75% and 50%, respectively. The discharging of the battery can be seen in the SOC graph, as shown in Figure 17. The SOC was decreasing in nature.

The comparison of the simulated output voltage (from the Simulink model) and the estimated output voltage from Equation (33) for the different sets of primary inputs and battery nominal voltages (V, E) and duty cycles (D₁, D₂) is shown in

Table 3. Comparison of the simulated and estimated results of topology-2 during discharging (case-1).

V (Volt)	E (Volt)	D1 (%)	D2 (%)	Sim. VO (Volt)	Est. VO (Volt)
8	12	82.5	55	49	50.28
10	12	62.4	52	21	19.4
20	24	72	60	61	60
16	24	75	50	64	64
30	36	75	50	104	102
20	36	72	40	75	74.28

. The simulation and estimated results were approximately the same for each individual set of inputs.

The output voltage and current waveforms of topology-2 during charging (case-2) are shown in Figure 18. The primary source voltage was taken as V = 30 V, and the nominal battery voltage rating was E = 24 V. An initial SOC was considered at 40%. The duty cycle of the primary source was assumed to be 60%, and the switch under the battery cell remained off. The charging of the battery can be seen in the SOC graph, shown in Figure 19. The SOC was increasing in nature.

A comparison of the simulated output voltage (from the Simulink model) and the estimated output voltage from Equation (47), for different sets of primary inputs and battery nominal voltages (V, E), and duty cycles (D₁, D₂) are shown in

Table 4. Comparison of the simulated and estimated results of topology-2 during charging (case-2).

V (Volt)	E (Volt)	D1 (%)	D2 (%)	Sim. VO (Volt)
20	12	60	39.5	38
15	12	70	39.3	38
30	24	60	53.3	51
20	12	40	23	21.3
40	24	60	80	76
44	36	50	63	52
40	36	60	66.5	64

. The simulation and estimated results were approximately same for each individual set of inputs.

4. Design of Controllers for the Three-Port SEPIC Converter

A controller is needed for closed loop operation of the proposed converter, in order to maintain the output voltage as constant. A state-space analysis of the proposed converter was performed in order to obtain the transfer function, followed by the step response of the converter. Two controller structures were designed in this work; the first one was for unidirectional topology, and the other one was for bidirectional topology. The controller used in this work was a PI controller for both topologies, and an MPPT controller for the solar photovoltaic system was also used as an input in the bidirectional topology to track the maximum available power.

4.1. State Space Analysis of the Three-Port SEPIC Converter

State space analysis refers to the smallest set of variables whose knowledge at t = t₀, together with the knowledge of the input for t > t₀, gives complete knowledge of the behavior of the system at any time t ≥ t₀. The state variable refers to the smallest set of variables that can help us to determine the state of the dynamic system. For the proposed converter, the current through all of the inductors (i_L1, i_L2, i_L) and the voltage across each capacitor (V_C1, V_C2, V_C) are considered to be the state variables. The state space model is represented as:

$$\dot{\mathrm{x}}=\mathrm{Ax}+\mathrm{Bu}$$

(60)

$$\mathrm{y}=\mathrm{Cx}+\mathrm{Du}$$

(61)

where x = state variable matrix, u = input matrix, y = output matrix.

$$\mathrm{x}=\left[\begin{array}{c}{\mathrm{i}}_{\mathrm{L}1}\\ {\mathrm{i}}_{\mathrm{L}2}\\ {\mathrm{i}}_{\mathrm{L}}\\ {\mathrm{V}}_{\mathrm{C}1}\\ {\mathrm{V}}_{\mathrm{C}2}\\ {\mathrm{V}}_{\mathrm{C}}\end{array}\right];\mathrm{u}=\left[\begin{array}{c}{\mathrm{V}}_1\\ {\mathrm{V}}_2\end{array}\right];\mathrm{y}=\left[\begin{array}{c}{\mathrm{V}}_{\mathrm{o}}\\ {\mathrm{I}}_{\mathrm{o}}\end{array}\right]$$

The transfer function (TF) of the system is defined as follows by Equation (62):

$$\mathrm{TF}\left(\mathrm{s}\right)=\mathrm{C}\left(\mathrm{sI}-\mathrm{A}\right){}^{-1}\mathrm{B}+\mathrm{D}$$

(62)

The A, B, C, and D matrices of the proposed converter are derived using the steady-state Equations (19)–(24):

$$\mathrm{A}=\left[\begin{array}{cccccc}0& 0& 0& \frac{{\mathrm{D}}_1-1}{{\mathrm{L}}_1}& \frac{{\mathrm{D}}_2-{\mathrm{D}}_1}{{\mathrm{L}}_1}& \frac{{\mathrm{D}}_2-1}{{\mathrm{L}}_1}\\ 0& 0& 0& \frac{{\mathrm{D}}_1}{{\mathrm{L}}_2}& \frac{-(1+{\mathrm{D}}_1-{\mathrm{D}}_2)}{{\mathrm{L}}_2}& \frac{{\mathrm{D}}_2-1}{{\mathrm{L}}_2}\\ 0& 0& 0& \frac{{\mathrm{D}}_1}{\mathrm{L}}& \frac{{\mathrm{D}}_2-{\mathrm{D}}_1}{\mathrm{L}}& \frac{{\mathrm{D}}_2-1}{\mathrm{L}}\\ \frac{1-{\mathrm{D}}_1}{{\mathrm{C}}_1}& \frac{-{\mathrm{D}}_1}{{\mathrm{C}}_1}& \frac{-{\mathrm{D}}_1}{{\mathrm{C}}_1}& 0& 0& 0\\ \frac{{\mathrm{D}}_1-{\mathrm{D}}_2}{{\mathrm{C}}_2}& \frac{1+{\mathrm{D}}_1-{\mathrm{D}}_2}{{\mathrm{C}}_2}& \frac{{\mathrm{D}}_1-{\mathrm{D}}_2}{{\mathrm{C}}_2}& 0& 0& 0\\ \frac{1-{\mathrm{D}}_2}{\mathrm{C}}& \frac{1-{\mathrm{D}}_2}{\mathrm{C}}& \frac{1-{\mathrm{D}}_2}{\mathrm{C}}& 0& 0& \frac{-1}{\mathrm{RC}}\end{array}\right]$$

$$\mathrm{B}=\left[\begin{array}{cc}\frac{1}{{\mathrm{L}}_1}& 0\\ 0& \frac{1}{{\mathrm{L}}_2}\\ 0& 0\\ 0& 0\\ 0& 0\\ 0& 0\end{array}\right]\mathrm{C}=\left[\begin{array}{cccccc}0& 0& 0& 0& 0& 1\\ 0& 0& 0& 0& 0& \frac{1}{\mathrm{R}}\end{array}\right]\mathrm{D}=\left[\begin{array}{cc}0& 0\\ 0& 0\end{array}\right]$$

The transfer function of the proposed converter has been derived using the state-space model, and it is represented in Equations (63) and (64):

$$\frac{{\mathrm{V}}_{\mathrm{o}}}{{\mathrm{V}}_1}=\frac{1.941\mathrm{e}004{\mathrm{s}}^4+2.023\mathrm{e}-009{\mathrm{s}}^3+4.453\mathrm{e}009{\mathrm{s}}^2+0.0003845{\mathrm{s}}^1+1.451\mathrm{e}014}{{\mathrm{s}}^6+30.3{\mathrm{s}}^5+2.057\mathrm{e}005{\mathrm{s}}^4+5.652\mathrm{e}006{\mathrm{s}}^3+8.792\mathrm{e}009{\mathrm{s}}^2+1.751\mathrm{e}011{\mathrm{s}}^1+8.866\mathrm{e}013}$$

(63)

$$\frac{{\mathrm{V}}_{\mathrm{o}}}{{\mathrm{V}}_2}=\frac{1.941\mathrm{e}004{\mathrm{s}}^4+3.724\mathrm{e}-009{\mathrm{s}}^3+1.644\mathrm{e}009{\mathrm{s}}^2+0.0001096{\mathrm{s}}^1+3.493\mathrm{e}013}{{\mathrm{s}}^6+30.3{\mathrm{s}}^5+2.057\mathrm{e}005{\mathrm{s}}^4+5.652\mathrm{e}006{\mathrm{s}}^3+8.792\mathrm{e}009{\mathrm{s}}^2+1.751\mathrm{e}011{\mathrm{s}}^1+8.866\mathrm{e}013}$$

(64)

For the open-loop system in Figure 20, the step response had a steady state error of 1.5%, and the maximum overshoot was 59%, which was greater. A PI controller was designed for maintaining the output at a reference value. For the closed-loop system in Figure 21, the steady-state error and the maximum overshoot were almost 0%. The step response of the proposed converter model is shown in Figure 22.

4.2. The Closed-Loop Unidirectional Controller

The output voltage V_O in this topology varied with the change in the input voltage sources V₁ and V₂. A PI controller was incorporated between the output and the input V₂, as shown in Figure 23. The actual output voltage was compared with a set value or a reference voltage, and generated an error. The error was processed through a PI controller tuned with a proportional constant (K_P) and an integral constant (K_I). The output of the PI controller was again processed through a saturation block, the maximum limit of which was set to 0.8, so that the switch did not operate beyond an 80% duty cycle for the safety of the switch. The saturated signal then passed through a PWM block, which generated the switching pulses D₂ for the voltage source V₂. With the known values of V₀, V₁, V₂, and D₂, the switching pulses for V₁, i.e., (D₁) could then be found, using the output voltage equation of topology-1 (Equation (25)).

The reference value of the output voltage was set to be 220 V. With this closed-loop topology of a unidirectional structure, the output voltage was maintained at a constant value of 220 V, even if there was a variation in the input supply V₁ and V₂. The proportional gain constant (K_P) of the PI controller was taken as 0.0001, and the integral gain constant (K_I) was taken as 0.005. Figure 24 shows the output voltage and the output current of a unidirectional closed-loop converter.

With 220 V as the reference voltage, the generated output was V_O = 220 V with inputs V₁ = 90 V and V₂ = 100 V. From the results of the closed loop simulation, it was inferred that the output voltage of the converter remained constant with the variation of input source. The closed loop system reduced the steady state error and maximum overshoot to 0%.

4.3. The Closed-Loop Bidirectional Controller

In this design, as shown in Figure 25, two input voltage sources, a solar photovoltaic system and a battery were used. The output voltage V_O varied with the variation of the input voltage sources. A PI controller was incorporated between the output and one of the input sources, depending on the availability of the sources. A P & O algorithm-based MPPT controller was incorporated with a PV input, in order to track the maximum available power. Three operating conditions were possible for this closed-loop structure.

Case-1: When both sources supply to the load: When both the sources are active, then the MPPT controller generates the switching pulse (D₁) for the cell containing the PV, and the PI controller generates the switching pulses (D₂) for the cell containing the battery. The PI controller incorporated with the battery maintains the output voltage to the set value. The actual output voltage is compared with a set value or a reference voltage, and it generates an error. The error is processed through a PI controller tuned with a proper value of a proportional constant (K_P) and an integral constant (K_I). The output of the PI controller is again processed through a saturation block, the maximum limit of which is set to 0.8, so that the switch does not operate beyond the 80% duty cycle for the safety of the switch. The signal forms the saturation block that is fed to the pulse generation circuit or the PWM block, which generates the switching pulses D₂ for the cell containing the battery source. Meanwhile, the MPPT controller transfers the maximum available power from the PV to the load.

Case-2: When sufficient solar power is available: When maximum solar power is available and it is sufficient to supply the load, then the MPPT controller has to be removed, and the PI controller will be incorporated between the load and the PV input. During this condition, if the battery is not fully charged, the switch for the battery port (S₂) can be turned off. This makes the battery charge from the PV input. If the battery is fully charged, then it can be disconnected from the system through the breaker. The PI controller with the PV input will maintain a constant output, even if there is a variation in solar irradiation to an extent. The operating conditions for the above three cases are given in

Table 5. Control logic of a closed-loop bidirectional controller.

Condition	SOC	vpv	irr	batcut	pvcut	pvmpp	batpi
1	>80%	-	-	1	1	1	1
2	<95%	>120	-	1	1	0	0
3	>99%	>120	-	0	1	0	0
4	<40%	-	-	1	1	0	0
5	-	-	0	0	1	1	1

. The signals ‘pvcut’ and ‘batcut’ represent the operating signals for the breakers of the PV port and battery port, respectively. When ‘pvcut’ or ‘batcut’ is 1, then the corresponding breaker will be shorted, and the respective source will be added to in the system. Similarly, if it is 0, then the corresponding breaker will be open, and the respective source will be disconnected from the system. The signals ‘pvmpp’ and ‘batpi’ are the operating signals of the selection switches, allowing the switching of pulses to two respective switches, S₁ and S₂, of the input ports from the controllers. If ‘pvmpp’ is 1, then the switching pulse D₁ will be generated from the MPPT controller, and if ‘pvmpp’ is 0, then the switching pulse D₁ will be generated from the PI controller. Similarly, if ‘batpi’ is 1, then the switching pulse D₂ will be generated from the PI controller, and if ‘batpi’ is 0, then the switching pulse D₂ will be 0 and switch S₂ turns off.

Case-3: When solar power is not available: When PV power is not available during the night or in cloudy weather, the battery alone will supply to the load, and maintain a constant output. During this condition, the PV can be disconnected from the system through a breaker. The PI controller is incorporated between the load and battery source. The actual output voltage is compared to the reference voltage, and it generates an error. The error is processed through the PI controller, tuned with a proper value of the proportional constant (K_P) and the integral constant (K_I). The output of the PI controller is again processed through a saturation block. The signal form the saturation block is fed to the pulse generation circuit or PWM block, which generates the switching pulses D₂ for the cell containing the battery source.

In the output, the voltage shown in Figure 26 implies that it remains constant at a set value of 220 V, even if there is a variation in the PV input due to intermittent solar irradiation levels, to an extent. The proportional gain constant (KP) of the PI controller is taken as 0.0001, and the integral gain constant (KI) is taken as 0.005.

Condition-1 of control logic: Figure 27 shows the output voltage and output current of a bidirectional closed loop converter when both the PV and the battery are supplying. The inputs are taken to be PV = 119 V, E = 120 V, and the initial battery state of charge is assumed to be 82%, as shown in Figure 28. From the results of the closed-loop simulation for this case, it is inferred that the output voltage of the converter remains constant at a set value of 220 V. Both sources are supplying to the load, and the battery is discharging.

Condition-2 of control logic: Figure 29 shows the output voltage and output current of a bidirectional closed loop converter when only the PV is supplying. The PV is taken to be PV = 123 V, and the initial battery state of charge is assumed to be 60%, as shown in Figure 30. The output voltage is maintained constant at a set value of 220 V, and the battery is charging.

Condition-3 of control logic: In this case, if the battery is fully charged and PV is sufficient to supply the load, then the battery can be disconnected. For a fully charged battery, the initial battery SOC is assumed to be 99.9%. From the results of the closed-loop simulation for this case, in Figure 31 and Figure 32, it is inferred that the output voltage of the converter remains constant at a set value of 220 V. The PV is supplying to the load and the battery is disconnected.

Condition-4 of control logic: In this case, the solar PV supplies the load and charges the battery. The PV is taken to be PV = 119 V, and the battery is very much less charged. The initial battery state of charge is assumed to be 35%, as shown in Figure 33 and Figure 34. The output voltage is maintained constantly at a set value of 220 V, and the battery is charging.

Condition-5 of control logic: In this case, if the PV is not available or if irradiation level is 0, then the battery supplies to the load. The initial battery SOC is assumed to be 65%. From the results of the closed loop simulation for this case, in Figure 35 and Figure 36, it is inferred that the output voltage of the converter remains constant at a set value of 220 V. The PV is disconnected, and the battery supply to the load is being discharged.

5. Experimental Verification

The simulation analysis of the open loop topology-1 was verified with a real-time hardware setup. The hardware setup was realized with two IGBTs (FGA15N120) and a high-frequency diode (HER3006PT). A DSPIC30F2010 microcontroller was used for generating the switching pulses. In both the input ports, V₁ and V₂, supply was provided by a solar PV system of equal power rating.

The input to PVSC1 is V₁ = 35 V, whereas for PVSC2, V₂ = 42 V. The duty cycle for two corresponding switches is: D₁ = 67% and D₂ = 50%. The components of the setup were designed to operate at a maximum of 1 kW. The component design parameters of the setup are given in

Table 6. Design parameters for the hardware setup.

Description	Specification
PVSC1 inductor, L1	15 mH
PVSC2 inductor, L2	15 mH
PVLC inductor, L	15 mH
PVSC1 capacitor, C1	0.54 mF
PVSC2 capacitor, C2	0.54 mF
PVLC capacitor, C	0.54 mF
Switching frequency, f	10,000 Hz

.

With the given input and duty cycle, the calculated output voltage from Equation (26) was 81.66 V. The output of the MATLAB simulation of the proposed topology for the similar parameters was approximately 79 V. The output voltage of the proposed hardware setup for the given input and duty cycle was 78.8 V. This indicates that for similar values of parameters and inputs, the outputs corresponding to a mathematical analysis, MATLAB simulation, and hardware setup are approximately the same. Figure 37 shows the hardware setup of the three-port unidirectional topology.

Figure 38a shows the input voltage waveform, V₁ = 37 V and V₂ = 42 V. Figure 38b shows the switching pulses of the switch S₁ & S₂, i.e., D₁ = 67% and D₂ = 50% respectively. Figure 39a shows the voltage across the switches. Figure 39b shows the current through the inductors. Figure 40a,b shows the voltage across the capacitors. Figure 41 shows the output voltage of the converter V₀ = 78.8 V.

6. Conclusions

In this paper, a unidirectional and bidirectional three-port converter based on SEPIC topology has been proposed and analyzed thoroughly. The detailed operations in various cases along with design concepts, theoretical analyses, have been cross verified through simulation and experimental results. The proposed three-port converter offers alternate solutions for integrating renewable sources with energy storage devices. This makes three port SEPIC-SEPIC converters a promising topology for electric vehicles, satellite, or DC micro-grid applications.