# Supply System for Three-Level Inverters Using Multi-Pulse Rectifiers with Coupled Reactors

^{*}

## Abstract

**:**

## 1. Introduction

_{D}/2, and U

_{D}. For this purpose, in standard NPC inverters, a characteristic technique is to use an AC/DC converter supplying the inverter via a, so-called, intermediate circuit. This circuit takes the form of a low-pass filter consisting of, among other components, a bank of capacitors usually built from two capacitor sections connected in series. The supplying converter output DC voltage U

_{D}is divided in two, so the system has three output terminals which correspond to potentials 0, U

_{D}/2, and U

_{D}. For proper operation of the inverter, it is very important to maintain this midpoint potential + U

_{D}/2 stable. Generally, all control methods and algorithms should take into consideration the problem of midpoint potential balancing. Interesting proposals and an analysis have been presented in [10,11,12,13].

_{D}voltage, so the multilevel inverters are frequently applied in vehicle drives [14,15,16,17,18,19,20,21].

_{I}and THD

_{U}(Total Harmonic Distortion) factors used in power electronics. These factors define current and voltage distortion in comparison to ideal mathematical waveforms. For instance, the permissible voltage distortion coefficient for receivers supplied from the low voltage network is equal to 3% in the case of special objects such as hospitals or airports, and to 5% for general objects including industrial plants. In general, the permissible current distortion coefficient should not exceed several percent (2–10%). It is also noteworthy here that the requirements referring to permissible amplitudes of individual current harmonics are also standardized. The THD factors are defined as follows:

_{h}is the RMS value of the current harmonic, I

_{l}is the RMS value of the fundamental current harmonic, and I is the RMS value of the current taken from the supply source.

_{U}is defined as:

_{z}is the supply source reactance which is determined from the short-circuit test. Once the short-circuit current I

_{z}is known, the reactance can be calculated as X

_{z}= U

_{1}/I

_{z}.

_{C}, given as a percentage. It is defined as:

_{C}depends on q, which is the number of ripples of the stabilized voltage during the supply voltage period and is characteristic for a given inverter, and for the applied input and output filters. For instance, H

_{C}= 160–450 for a 6-pulse diode rectifier with capacitive filter, and H

_{C}= 22 ÷ 50 for an 18-pulse rectifier with inductive filter.

_{I}values representing the contents of higher current harmonics are obtained: 31% for q = 6; 15% for q = 12, and 9.6% for q = 18. There are many applications where the introduction of higher current harmonics to a network have to be restricted. This is the reason to use multi-pulse AC/DC converters, because they are able to restrict harmonics contents. Certainly, increasing the supply source reactance by using additional reactors, for example, also leads to considerable reduction of THD

_{I}, but also reduces the efficiency of the converter. In classical solutions, the q value can be multiplied in many ways, for instance, by serial or parallel connection of three-phase bridge rectifiers and relevant phase shift in transformers supplying the converter. Multi-pulse diode converters and frequency domain analysis of operation have been presented among others in [24]. An innovative proposal of the new rectifier circuit with a line-side interphase transformer has been described by M. Depenbrock and M. Niermann in [25,26]. They presented a theory and described the characteristics of the rectifier which assures the line is powered by nearly sinusoidal currents.

## 2. Multi-pulse AC/DC Converter with Coupled Reactors

_{a}, N

_{b}, N

_{a}+ N

_{b}). This unit introduces a required phase shift between its input and output line phase voltage. The shift angle can be regulated in a large scale. When the turns ratio is selected properly, two symmetric three-phase voltage systems, phase shifted by π/6, are obtained at the unit output. As such, the reactor unit delivers six supply voltages shifted mutually by the established angle. It is possible to connect together three or even more 3CRλ units in order to increase the order (number of pulses) of the AC/DC converter, so the special notation code of the 3CRλ terminals has been presented in the diagram of the unit.

#### 2.1. A Three-Level Inverter with 12-Pulse AC/DC Converter Using the 3CRλ Unit

_{D}. Such a solution would make the potential of pole 1 more stable during inverter operation. This potential stability would make the voltage U

_{D}division accurate which guarantees a proper performance of the three-level inverter. Such a solution would be very convenient while supplying the three-level inverters because the converter would deliver two supplying voltages connected in series. The constituent rectifiers P1 and P2 would be supplied by separate sets of AC voltages. The voltages would be shifted and less mutually dependent. Usually there are problems with independence of these two voltages.

#### 2.2. A Three-Level Inverter Model

_{a}, K

_{b}, K

_{c}assigned to output phases a, b, c, voltage source U

_{D}, and two capacitors connected in series. The capacitors form the intermediary circuit and permit the source voltage U

_{D}to be divided. Three potentials of the intermediary circuit as well as three states of the switches are consequently denoted by use of digits 0, 1, 2. The highest potential of the positive pole of the voltage source U

_{D}is denoted as 2 while the negative one as 0. Every switch is able to connect one potential of the intermediary circuit to the one phase output. Based on this, switching states of the switches are also denoted by digits 2, 1, and 0, respectively.

_{D}/3. The ternary expansion of the vector index $k={\left({a}_{k}{b}_{k}{c}_{k}\right)}_{3}$ has to contain the same two digits: ${a}_{k}={b}_{k}\cup {a}_{k}={c}_{k}\cup {b}_{k}={c}_{k}$ provided that no one digit equals 1. The next group contains six vectors for which the modulus measure is $\sqrt{3}{U}_{D}/3$ and which are perpendicular to phase axes. The ternary expansion of the index k has to contain all different digits: ${a}_{k}\ne {b}_{k}\ne {c}_{k}$. The third group counts six pairs of multiple redundant vectors which length is U

_{D}/3 and which are situated on phase axes. They are available since the three-level VSI can be sourced from U

_{D}/2 voltage [28].

_{w}while the additional inductance introduced to the system is L

_{s}. The resultant inductance is much higher than the internal inductance of the source: L

_{s}>> L

_{w}. The simulation tests of system operation were performed for different values of the L

_{s}. It was also assumed that the load of the intermediary circuit was constant and equivalent to power of 2 kW. Basic parameters of the rectifier simulation model are collated in Table 2.

_{I}values are shown as functions of the short-circuit voltage and the reactor inductance L

_{s}. Simulation tests were performed under the assumption that the network was symmetrical, and the phase voltage had the shape of a mathematical sine wave. For a small value of L

_{s}(1 mH, u

_{z}% = 0.5%) the current waveform was discontinuous and the total harmonic distortion coefficient THD

_{I}reached 72.7%.

_{I}factor reaches a value below 10%. However, this value is relatively high, so the reactor introduces a significant reactive power to the system. By increasing the inductance, it is possible to improve the shape of the supply current waveforms. At the same time higher inductance L

_{s}leads to the rise of the commutation angle. For the inductance, e.g. L

_{s}= 20 mH, and the assumed load of 2 kW, the THD

_{I}value remains below 8%.

_{210}what meant that phase A had been connected to point 2 (U

_{D}), phase B to point 1 (U

_{D}/2), and phase C to point 0. The successive Figure 9, Figure 10 and Figure 11 illustrate the results of these tests. They include the following quantities: Phase, intermediary circuit and 3CRλ winding currents (Figure 9), supply line voltage and current (Figure 10) and their oscillograms presented in Figure 11.

#### 2.3. A Three-Level Inverter with 24-Pulse AC/DC Converter Using Three 3CRλ Units

_{a}

_{2}, N

_{b}

_{2}, and N

_{a}

_{2}+ N

_{b}

_{2}coils of the 3CRλ. They form a space voltage vector of the supply system. At the same time, they generate demanded currents that are mutually shifted. As a result, it is possible to obtain two voltage space vectors shifted by the angle of 2π/24. Every space vector determines a mathematical representation of the three-phase voltages. As such, the vectors here represent a supply network for 3CRλ1 and 3CRλ2 units.

_{is}or D

_{js}and point C of the intermediary circuit. For instance, the voltage ${u}_{D11aC}$ is advancing voltage ${u}_{D13aC}$ by 30°, and voltage ${u}_{D31aC}$ is advancing ${u}_{D33aC}$ by 30°. Voltage waveforms on terminals D

_{13s}–D

_{11s}and D

_{33s}–D

_{31s}(s = a, b, c) are defined as a difference between voltage on terminals D

_{13s}and D

_{11s}, referenced to voltage on point C: ${u}_{D13sD11s}={u}_{D13sC}-{u}_{D11sC}$. The same reasoning permits to define the voltage ${u}_{D33sD31s}={u}_{D33sC}-{u}_{D31sC}$. These waveforms are presented in Figure 14c,f. It is unmistakable that the shift angle between them is equal to 15°. Successive waveforms and their construction method are presented in Figure 15 and Figure 16: diagrams i to s.

_{1s}and D

_{3s}of the 3CRλ2 unit are referenced to the point C. The following equations present the determination principle:

_{a}and N

_{b}denote relevant coil numbers.

## 3. Simulation and Experimental Results of the 24-Pulse AC/DC Converter

_{210}or similar, e.g., V

_{021}, which meant two sections of the intermediary circuit were loaded equally. Parameters of the simulation and laboratory model are collected in Table 3.

_{I}presented in Figure 21 confirms that condition.

_{I}factor is equal to 1.20%.

## 4. Conclusions

_{max}semiconductor devices.

## Author Contributions

## Funding

## Acknowledgments

## Conflicts of Interest

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**Figure 6.**Possible connections of the load to terminals 0, 1, 2. Potentials of terminals 0, 1, 2 are equal, respectively: 0, U

_{D}/2, U

_{D}.

**Figure 9.**Current waveforms: 1-network phase current, 2 and 3-3CRλ winding currents i

_{1R/2/}, i

_{2R/3/}4-intermediary circuit current i

_{d/4/}for the 2 kW load.

**Figure 10.**Oscillograms of current i

_{R-1}and voltage u

_{R-2}in the supply line: 1-current, 2-voltage at rated converter load.

**Figure 11.**Oscillograms of current i

_{R-2}and voltage u

_{R-1}in the supply line: 1-current, 2-voltage at rated converter load.

**Figure 14.**Phase voltage waveforms ${u}_{D33aC}$, ${u}_{D31aC}$, ${u}_{D13aC}$, ${u}_{D11aC}$, ${u}_{D3aC}$, ${u}_{D1aC}$ and ${u}_{D13sD11s}={u}_{D13sC}-{u}_{D11sC}$, ${u}_{D33sD31s}={u}_{D33sC}-{u}_{D31sC}$.

**Figure 18.**Output current i

_{1a}, i

_{3a}and voltage u

_{D1aD3a}waveforms of the 3CRλ2 unit: (

**a**) rated load, (

**b**) 10% load.

**Figure 19.**Line voltage u

_{a}and u

_{Ga}and voltage u

_{D}

_{11aD13a}and u

_{D}

_{31aD33a}waveforms on main windings of 3CRλ1 and 3CRλ3 units: (

**a**) rated load, (

**b**) 10% load.

**Figure 20.**Line current waveforms: i

_{1a}, i

_{3a}of 3CRλ2; i

_{11a}, i

_{13a}of 3CRλ1; and i

_{31a}, i

_{33a}of 3CRλ3 in relation to the line voltage.

**Figure 25.**Oscillograms: Winding currents of 3CRλ1; i

_{1a}, i

_{11a}, i

_{13a}(

**a**) and 3CRλ3; i

_{3a}, i

_{31a}, i

_{33a}(

**b**).

$\overrightarrow{{V}_{k}^{t}}$ | $\overrightarrow{{V}_{0}^{t}}$ | $\overrightarrow{{V}_{1}^{t}}$ | $\overrightarrow{{V}_{2}^{t}}$ | $\overrightarrow{{V}_{3}^{t}}$ | $\overrightarrow{{V}_{4}^{t}}$ | $\overrightarrow{{V}_{5}^{t}}$ ∗ | $\overrightarrow{{V}_{6}^{t}}$ | $\overrightarrow{{V}_{7}^{t}}$ ∗ | $\overrightarrow{{V}_{8}^{t}}$ |

i_{2} | 0 | 0 | i_{c} | 0 | 0 | i_{c} | i_{b} | i_{b} | −i_{a} |

i_{1} | 0 | i_{c} | 0 | i_{b} | −i_{a} | i_{b} | 0 | i_{c} | 0 |

$\overrightarrow{{V}_{k}^{t}}$ | $\overrightarrow{{V}_{9}^{t}}$ | $\overrightarrow{{V}_{10}^{t}}$ | $\overrightarrow{{V}_{11}^{t}}$ ∗ | $\overrightarrow{{V}_{12}^{t}}$ | $\overrightarrow{{V}_{13}^{t}}$ | $\overrightarrow{{V}_{14}^{t}}$ | $\overrightarrow{{V}_{15}^{t}}$ ∗ | $\overrightarrow{{V}_{16}^{t}}$ | $\overrightarrow{{V}_{17}^{t}}$ |

i_{2} | 0 | 0 | i_{c} | 0 | 0 | i_{c} | i_{b} | i_{b} | −i_{a} |

i_{1} | i_{a} | −i_{b} | i_{a} | −i_{c} | 0 | −i_{c} | i_{a} | −i_{b} | i_{a} |

$\overrightarrow{{V}_{k}^{t}}$ | $\overrightarrow{{V}_{18}^{t}}$ | $\overrightarrow{{V}_{19}^{t}}$ ∗ | $\overrightarrow{{V}_{20}^{t}}$ | $\overrightarrow{{V}_{21}^{t}}$ ∗ | $\overrightarrow{{V}_{22}^{t}}$ | $\overrightarrow{{V}_{23}^{t}}$ | $\overrightarrow{{V}_{24}^{t}}$ | $\overrightarrow{{V}_{25}^{t}}$ | $\overrightarrow{{V}_{26}^{t}}$ |

i_{2} | i_{a} | i_{a} | −i_{b} | i_{a} | i_{a} | −i_{b} | −i_{c} | −i_{c} | 0 |

i_{1} | 0 | i_{c} | 0 | i_{b} | −i_{a} | i_{b} | 0 | i_{c} | 0 |

Nominal line-to-line voltage | U_{s} = 400 V |

Number of turns N_{a} in winding | 204 |

Number of turns N_{b} in winding | 75 |

Inductance of the reactor | L_{s} = 22 mH |

Capacitance of the intermediary circuit | C = 10 mF |

Resistance emulating the load | R = 102 Ω |

Current density in coupled reactor windings | J = 2.5 A/mm^{2} |

Cross section area of 3CRλ core column | S_{Fe} = 8 cm^{2} |

Shift angle of diode bridge input current vectors | 2α = 30° |

Phase internal inductance of the source | L_{w} = 0.1 mH |

Coefficient of core filling with iron | k_{Fe} = 0.9 |

DC power | 2 kW |

Nominal line-to-line voltage | U_{s} = 400 V |

Number of turns N_{a} in winding | 195 |

Number of turns N_{b} in winding | 71 |

Number of turns N_{a}_{2} in winding | 138 |

Number of turns N_{b}_{2} in winding | 23 |

Inductance of the line reactor | L_{s} = 22 mH |

Capacitance of the intermediary circuit | C = 11.2 mF |

Resistance emulating the load | R = 102 Ω |

Current density in coupled reactor windings | J = 2.5 A/mm^{2} |

Cross section area of 3CRλ2 core column | S_{Fe} = 6 cm^{2} |

Cross section area of 3CRλ1 and 3CRλ3 core column | S_{Fe} = 6 cm^{2} |

Shift angle between current vectors | 2α = 15° |

Phase internal inductance of the source | L_{w} = 0.1 mH |

Coefficient of core filling with iron | k_{Fe} = 0.9 |

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**MDPI and ACS Style**

Iwaszkiewicz, J.; Mysiak, P. Supply System for Three-Level Inverters Using Multi-Pulse Rectifiers with Coupled Reactors. *Energies* **2019**, *12*, 3385.
https://doi.org/10.3390/en12173385

**AMA Style**

Iwaszkiewicz J, Mysiak P. Supply System for Three-Level Inverters Using Multi-Pulse Rectifiers with Coupled Reactors. *Energies*. 2019; 12(17):3385.
https://doi.org/10.3390/en12173385

**Chicago/Turabian Style**

Iwaszkiewicz, Jan, and Piotr Mysiak. 2019. "Supply System for Three-Level Inverters Using Multi-Pulse Rectifiers with Coupled Reactors" *Energies* 12, no. 17: 3385.
https://doi.org/10.3390/en12173385