Synchronous Power Control of Grid-Connected Power Converters under Asymmetrical Grid Fault

Abstract

Control of grid-connected power converters is continuously developing to meet the grid codes, according to which the generation units should keep connected to the grid and further provide ancillary services, such as voltage and frequency support, negative sequence current injection, inertia emulation, etc. A virtual admittance controller is proposed in this paper for the objective of voltage support under asymmetrical grid faults. By using independent and selective admittances for positive and negative sequence current injection, the unbalanced voltage can be significantly compensated during asymmetrical faults. The controller is based on the generic control framework of the synchronous power controller (SPC), which is able to control a power converter with emulated and improved synchronous generator characteristics. Simulation and experimental results based on two paralleled 100 kW grid-connected power converters demonstrate the controller to be effective in supporting unbalanced voltage sags.

1. Introduction

Grid-connected power converters have been acting as an important interface between the renewables and the electrical grids. The conventional control of grid-connected power converters has been well validated in many applications and shows its effectiveness [1,2,3,4]. Along with the expansion of the renewable power generation plants, their impact on the power system has caused increasing attention [5,6]. The different performance of the converters compared to the traditional synchronous generators should be taken into account.

The conventional grid-connected power converters differ from synchronous generators mainly in the lack of the electromechanical characteristics. Consequently, the statics and dynamics of the renewable power generation units are both different compared with the synchronous generators. Even if the statics can be changed by equipping the droop control and energy reserve, there are still some disadvantages of the converter-interfaced generation plants.

The phase-locked loop (PLL) is a grid voltage estimator used by conventional power converters to obtain the voltage phase angle to determine the amount of current to be injected either in-phase or in-quadrature to regulate the active and reactive powers delivered to the grid, respectively. Therefore, the dynamics of these conventional converters are characterized by the PLL, whose performance will degrade under weak or islanded grid conditions [7,8]. As a PLL is not designed to emulate any inertial response in the presence of frequency deviations, the total inertia in the grid decreases as the integration of renewable generation plants grows. However, the updated grid codes have included “synthetic inertia” in the grid connection requirements [9].

The emulation of synchronous generators and the implementation of its mechanical and electrical characteristics on grid-connected converters have been intensively studied in recent years. The implementation of mechanical characteristics, especially rotor inertia emulation, has been investigated in many studies to contribute with synthetic inertia to the power system [10,11,12]. Besides, the emulation of electrical characteristics, commonly known as virtual impedance, is also largely developed for objectives such as the load sharing of paralleled converters [13,14], harmonics compensation [15,16] and impedance shaping in cascaded converters [17]. Nevertheless, the performance of the synchronous generation emulation control under grid faults, especially under asymmetrical faults, still needs further study.

Grid-connected power converters can face voltage sags caused by different types of grid faults. According to grid code requirements, grid-connected power converters should be capable of getting through grid fault scenarios to let generation units remain connected under such adverse conditions, and further provide ancillary services to support the grid voltage and frequency.

Three-phase balanced faults are usually considered for stating the low-voltage ride-through (LVRT) requirements in most of the grid codes; however, asymmetrical faults are the most common faults in electrical grids [18,19]. Due to an asymmetrical grid fault, the voltages at the point of common coupling (PCC) will sag and become unbalanced, and may cause the trip of the power converters and the loads connected to the PCC. Sophisticated ride-through abilities for power converters can be enabled to prevent tripping of renewable generation units under fault conditions [20,21], the lack of contribution of negative-sequence current during asymmetrical faults motivates further improvement in the control design [22].

Many previous works have proposed techniques to deal with the grid synchronization of power converters during asymmetrical grid faults. Smith et al. [23] has presented different variations of synchronous reference frame PLL for grid synchronization, which are able to decompose the positive and negative components of grid voltage, even under unbalanced conditions. Alternative methods such as [24] using a Kalman filter have also been presented for the power converters to be synchronized to the grid under both balanced and unbalanced voltage sags. As is known, unbalanced voltages contain both positive-sequence component and negative-sequence component. In order to compensate the negative-sequence component of the PCC voltages, the current injected by the power converter should also contain a negative-sequence component, as well as the positive-sequence one. Therefore, the injection of negative-sequence current by a generation unit should be also considered as an objective, in addition to grid synchronization.

This paper develops a virtual admittance control structure, which is a part of the synchronous power controller (SPC) for grid-connected power converters. The SPC is an established solution for controlling grid-connected power converters and equipping them with emulated and improved synchronous machine characteristics. In the proposed virtual admittance block, except for the emulation of the stator output impedance of the synchronous generators, extra function of injecting negative-sequence current under asymmetrical grid faults is also added. Simulation and experimental results based on two parallel connected 100 kW grid-connected power converters are presented in this paper to demonstrate the effectiveness of the proposed control strategy in realizing negative-sequence current injection, as well as the basic function of the virtual admittance.

Unlike previous works that emphasize the grid synchronization of power converters under unbalanced grid voltages, this work implements a different control framework, the SPC, for grid-connected power converters to contribute emulated and improved synchronous generator characteristics to the grid. Furthermore, it is also shown that its capability of injecting negative-sequence reactive current during asymmetrical grid fault using a specially designed tri-path virtual admittance block.

The rest of the paper is organized as follows. The general control framework of the SPC with the proposed virtual admittance control structure are elaborated in Section 2. Section 3 shows the detailed design of the virtual admittance block considering the E.ON and Red Electrica de Espana (REE) grid codes. The simulation results under asymmetrical faults are shown in Section 4. The experimental results under the same fault condition are shown in Section 5.

2. Synchronous Power Controller with Selective Virtual Admittances

The main synchronous generator characteristics contain two aspects, the stator output impedance (electrical) and the rotor inertia (mechanical). The former one defines the fundamentals of active and reactive power generation, which is important in grid synchronization, load sharing, etc. The latter one affects the dynamics of the power system and ensures the instantaneous power balance. The SPC aims to equip grid-connected power converters with aforementioned characteristics, while this paper mainly addresses its virtual admittance block design with special function of negative-sequence current control.

2.1. Synchronous Power Controller

Figure 1 shows the cascaded control layers of the SPC-based grid-connected converters. The SPC mainly consists of the electrical part and the mechanical part, corresponding to the electrical and mechanical part of the synchronous generators.

The mechanical part of the SPC generates the reference frequency, ω_r*, which corresponds to the inner frequency of a synchronous generator, and it swings around the rated frequency ω_s following the relation expressed as:

$${\omega }_r^{*}={\omega }_s+(P^{*}-P)\frac{{\omega }_n^2/P_{\max }}{s+2\xi {\omega }_n}$$

(1)

where P* is the active power reference, P the generated active power, P_max is a transmission gain between the load angle and the generated power used in the active power control loop modeling, ξ, and, ω_n, the damping factor and the natural frequency of the second-order power loop transfer function.

Since the form of Equation (1) is deducted based on the dynamics of the generator rotor, ω_n can be translated to the inertia constant, H, following Equation (2). In this way, the virtual mechanical characteristic can be set:

$${\omega }_n=\sqrt{\frac{P_{\max }{\omega }_s}{2H{S}_n}}$$

(2)

where S_n the rated power of the converter.

The voltage controlled oscillator (VCO) block generates the virtual electromotive force, e, using ω_r* and the magnitude reference, E*, which is generated by the reactive power controller. In the case when the electrical part control is realized in the stationary reference frame, the VCO can be expressed as:

$$e=\left[\begin{array}{c}{e}_{\alpha }\\ e_{\beta }\end{array}\right]=\left[\begin{array}{c}{E}^{*}\cos ({\omega }_r^{*}t)\\ E^{*}\sin ({\omega }_r^{*}t)\end{array}\right]$$

(3)

where the phase of e is obtained by integrating ω_r^*, similar to the function of the VCO in a PLL.

The electrical part includes the virtual admittance and the current controller. The current controller let the converter inject the current following the reference that is defined by the virtual admittance block. In the case when the control is implemented in the stationary reference frame, the Proportional Resonant controller is used and expressed as:

$$v_{\mathsf{\alpha }\mathsf{\beta }}^{*}=(i_{\mathsf{\alpha }\mathsf{\beta }}^{*}-i_{\mathsf{\alpha }\mathsf{\beta }})(K_p+K_r\frac{k_{bw}\omega s}{s^2+k_{bw}\omega s+{\omega }^2})$$

(4)

As shown in Figure 1, the reactive power controller (RPC) and the outer P-f and Q-V droop loops are also needed as complementary part of the SPC. A proportional integral (PI) controller is usually used as the RPC and expressed as:

$$E^{*}=E_s+(Q^{*}-Q)(K_{pq}+\frac{K_i}{s})$$

(5)

The outer droop controllers are expressed as:

$$P^{*}=P_s+({\omega }^{*}-\omega )D_p$$

(6)

$$Q^{*}=Q_s+(V^{*}-V)D_q$$

(7)

2.2. Proposed Virtual Admittance Block

The SPC’s virtual admittance block, as Figure 1 shows, defines an output admittance for the power converter equivalent to the output impedance of a synchronous generator. The admittance structure used in the admittance block can be written as:

$$i^{*}=\frac{e-v}{R+sL}$$

(8)

As an enhancement to the output impedance of a synchronous generator, multiple and selective admittances are proposed to be built up in this block, as shown in Figure 2. Different impedance values for the positive- and negative-sequence signals can be used to achieve different levels of positive- and negative-sequence current injection during the voltage sags.

In Figure 2, L₁ and R₁ are the inductance and the damping resistance of the impedance for the positive-sequence voltage components at the fundamental frequency, while L₂ and R₂ are the ones for the negative-sequence signals at the fundamental frequency. The rest of the voltage components go through a third admittance branch (L₃ and R₃), which is named as transient admittance. Considering the possible delay of the filtering stages, this third branch will present a controlled impedance feature during transients. Therefore, the positive- and negative-sequence voltage support possess the same gain during the transient, which is determined by L₃. In addition, the injection of harmonic currents is also determined by this transient admittance, although additional selective band-pass filters and corresponding harmonic impedances might be also implemented. Above all, the current reference generated by the virtual admittance block of Figure 2 results from the sum of three components, that is:

$$i^{*}=i^{+*}+i^{-*}+i_{trans}^{*}$$

(9)

The proposed virtual admittance has several advantages compared with the physical stator impedance of synchronous generators. Firstly, the positive- and negative-sequence voltages are decomposed and processed through difference admittances. Further, the delay effect of the positive- and negative-sequence components calculation is considered and hence a third general admittance branch is included as a compensation. Moreover, the admittance values of each branch can be online adjusted to meet the requirements in the full operation stage. In detail, the admittance values can be specified much smaller than the nominal ones during grid connection operations to avoid large transient currents caused by the transient lack of synchronization between the grid voltage and the converter inner-built electromotive force. Then the admittance values can be conditioned to the nominal ones within a specified time of transition.

For separating the positive- and negative-sequence signals, sequence band-pass filters are needed in a former stage. The design of this sequence band-pass filters for this objective has been addressed in many works, such as [25]. In this paper the method used is based on the dual second-order generalized integrator (D-SOGI), which can be expressed as:

$$v_{{}_{\mathsf{\alpha }\mathsf{\beta }}}^{+}=\frac{1}{2}\left[\begin{array}{cc}{f}_d& -f_q\\ f_q& f_d\end{array}\right]v_{\mathsf{\alpha }\mathsf{\beta }}$$

(10a)

$$v_{{}_{\mathsf{\alpha }\mathsf{\beta }}}^{-}=\frac{1}{2}\left[\begin{array}{cc}{f}_d& f_q\\ -f_q& f_d\end{array}\right]v_{\mathsf{\alpha }\mathsf{\beta }}$$

(110b)

where the resonant and quadrature output of the SOGI, namely, f_d(s)v_αβ and f_q(s)v_αβ, are used to generate the positive- and negative-sequence signals. f_d(s) and f_q(s) in Equation (10) have the transfer functions as:

$$f_d(s)=\frac{k_{bw}\omega s}{s^2+k_{bw}\omega s+{\omega }^2}$$

(11a)

$$f_q(s)=\frac{k_{bw}{\omega }^2}{s^2+k_{bw}\omega s+{\omega }^2}$$

(11b)

where k_bw is the bandwidth parameter and ω is the center frequency.

2.3. Design Considerations

The virtual admittance block has to be carefully designed to achieve the desired performance in both normal operation and voltage sag conditions. Moreover, in addition to meet requirements regarding magnitude of the current injection to be injected during the voltage sags, the time response should also be considered.

2.3.1. Grid Code Requirements

Different requirements of reactive current injection during voltage dips can be found in grid codes. The proportional gain between the reactive current to be injected, I_q, and the voltage drop magnitude, ΔV, can be defined to set the minimum requirement for the voltage support, which is written as:

$$I_q^{pu}\ge -k_q\Delta V_{pu}$$

(12)

In this paper, a convention of the sign of the reactive current is defined to let the reactive power have a positive value under leading operation, and hence a negative value under lagging operation. In this way, as shown in Equation (12), the injected reactive current has a positive value when the grid voltage drops.

In the E.ON grid codes, a proportional gain for reactive current injection, k_q, is required to be equal to or greater than 2, and the operational region for voltage regulation has a higher bound of 1.2 V_N, being V_N the rated grid voltage, which provides voltage limitation as well as voltage support, and a dead band of ±5% around V_N [26].

In the REE (the Spanish electrical grid operator) grid codes, it is required that the voltage support by reactive current injection should be activated once the voltage is lower than 85% of its rated value, and the reactive current should reach 90% when the voltage is lower than 50% of its rated value [27]. Based on these critical points, the proportional gain for reactive current injection, k_q, is calculated to be equal to or greater than 2.57.

Regarding the cases of asymmetrical faults, according to the European Network of Transmission System Operators for Electricity (ENTSO-E) grid codes, the fault-ride-through capabilities should be defined by each transmission system operator (TSO), while respecting the provisions of the national regulatory authorities [9].

One example of the requirement of the negative-sequence current injection can be found in the German grid codes VDE-AR-N 4120 [28], where it is required a proportional gain k₂ between the magnitude of the negative-sequence current and the negative-sequence voltage given by:

$$I^{-}=k_2(\Delta V^{-}-0.05)$$

(13)

where k₂ represent the regulation gain, required to be within the range of 0 to 10, and ΔV⁻ is the incremental change of the magnitude of the negative-sequence voltage. As a complement of this relationship, there is a saturation for the magnitude of the negative-sequence current I⁻ at 1 p.u..

Moreover, the following specifications can be found in the grid codes regarding requirements of the time response of the voltage support.

In the E.ON grid codes, it is stated that the voltage support service of the generation unit needs to be activated when a voltage dip of over 5% of the rms value of the generator voltage occurs, and the voltage support should occur within 20 ms after fault detection.

In the REE grid codes, it is required that the reactive current injection should be provided within 150 ms after the beginning or clearance of the fault. During this time window, the consumption of reactive power is forbidden as long as the rms voltage drops below 0.85 p.u..

2.3.2. Design of the Virtual Admittance

The virtual admittance of the SPC naturally brings a proportional relationship between the magnitude of the grid voltage drop and the amount of injected reactive current.

The interchanged reactive power between two voltage sources e and v through an impedance can be modeled by:

$$Q=\frac{EV}{Z}\cos (\phi -\delta )-\frac{V^2}{Z}\cos (\phi )$$

(14)

where V and E are the line-to-line rms values of v and e, Z the impedance, ϕ the impedance angle and δ the load angle, which results from the phase angle difference between e and v. In the case of the power interchange between a synchronous generator and the grid, v is the grid voltage, e is the stator induced voltage, and Z is the module of the output impedance of the synchronous generator.

Since the output impedance of a synchronous generator is mainly inductive, the impedance angle is close to 90°. Then Equation (14) can be transformed to:

$$Q=\frac{V}{X}(E\cos (\delta )-V)$$

(15)

where X is the reactance of the output impedance.

Equation (15) can be written as Equation (16), considering a small value of δ, which represents the operation around the rated condition.

$$Q=\frac{V}{X}(E-V)$$

(16)

Therefore, the reactive current injected by the generator will be:

$$I_q=\frac{Q}{V}=\frac{E-V}{X}$$

(17)

Therefore, the incremental amount of the injected reactive current will be proportional to the change in the voltage magnitude, namely:

$$\Delta I_q=\frac{-\Delta V}{X}$$

(18)

In the case of SPC-based grid-connected power converters, the value of X can be specified simply by setting the value of the inductance in the virtual admittance block. In order to specify a proper value for such a reactance, the per-unit value of X is considered and defined as:

$$X_{pu}=\frac{X}{V^2/S_n}=\frac{2\pi fL}{V^2/S_n}$$

(19)

Then, Equation (18) can be expressed in per unit as:

$$\Delta I_q^{pu}=\frac{-\sqrt{3}\Delta V_{pu}}{X_{pu}}$$

(20)

Based on the knowledge on traditional power systems, a typical value for the output impedance of a synchronous generator, X_pu, can be chosen around 0.3 [29]. Then, according to Equation (20), the resulting proportional gain, k_q, is calculated to be 5.77. Figure 3 shows the voltage support characteristics when X_pu = 0.3 compared with the E.ON and REE grid codes, which set a minimum current that should be provided by a generation unit during the fault. It can be observed in this figure that the resulting voltage support characteristic is above the requirements of both grid codes.

Therefore, Figure 3 gives a clue for specifying the values of the positive-sequence admittance, i.e., the first branch in Figure 2. For the purpose of meeting the grid code requirements, the value of L₁ can be calculated based on Equation (19) once X_pu is set. The value for R₁ can be chosen through a dynamic study of the admittance transfer function (1st order low-pass filter) to yield a desired bandwidth with sufficient damping. Since the proportional gain for negative-sequence current injection can be chosen in a range as indicated by Equation (13), L₂ might be set different from L₁.

The time response of the virtual admittance block has to be fast enough to achieve an effective voltage regulation. The virtual admittance block contains three selective admittances as shown in Figure 2, for positive-sequence, negative-sequence and transient current regulation, respectively. The transfer function for each branch has the same form and can be generalized as:

$$\frac{\Delta i_{ref}}{\Delta v}(s)=\begin{array}{cc}\frac{1}{R_n+s{L}_n},& n=1,2,3\end{array}$$

(21)

Then, we can estimate the settling time of the virtual admittance that responds to a variable input. Since in this application the input signals for the admittances, Δv, can be assumed sinusoidal, the time response can be estimated by the response of the magnitude of the two output signals that are generated by giving two sinusoidal input signals in quadrature. The expression is written as:

$$h_V(t)=\sqrt{h_{v\alpha }{(t)}^2+h_{v\beta }{(t)}^2}$$

(22)

where h_vα(t) and h_vβ(t) are the responses to the sinusoidal input signals on α- and β-axis, respectively, and they can be calculated by the convolution:

$$h_{v\alpha }(t)=v_{\alpha }\times h_{\delta }(t)$$

(23a)

$$h_{v\beta }(t)=v_{\beta }\times h_{\delta }(t)$$

(23b)

where h_δ(t) is the system impulse response, and v_α and v_β are:

$$v_{\alpha }=V\cos (\omega t)$$

(24a)

$$v_{\beta }=V\sin (\omega t)$$

(24b)

In practice, the settling time of h_V(t) has to be calculated with discretized signals (discretized input signal with finite length and discretized transfer function). Providing the calculated response is written as:

$$h_V(k)=\sqrt{h_{v\alpha }{(k)}^2+h_{v\beta }{(k)}^2}$$

(24)

then the settling time can be calculated by:

$$t_s=T_s\cdot \max \{\begin{array}{ccc}\forall k& s.t.& \left|\frac{h_V(k)}{h_V(n)}-1\right|>{\epsilon }_s\end{array}\}$$

(25)

where T_s is the discretizing sampling time, n the total number of the points of the discretized signal, and ε_s the defined steady-state band.

Specifying the values for R_pu and X_pu to be 0.1 p.u. and 0.3 p.u., respectively, the settling time for the admittance expression, $\frac{1}{R+jX}$, is 21.6 ms, which is calculated according to the aforementioned method, with ε_s = 0.1. This settling time can indicate the response of the transient admittance branch, namely, the second branch of the virtual admittance block in Figure 2. For the other two branches that deal with positive- and negative-sequence voltages, the time response is also dependent on the filtering stage of the virtual admittance block (as shown in Figure 2). The time response of the sequence filtering stages can be determined from Equations (10) and (11).

Figure 4a shows the response of the sequence filter for the negative-sequence rms component for different values of the bandwidth parameter k_bw.

According to Equation (11), the response for the positive-sequence component will have the same characteristics in time. Therefore, by tuning the k_bw in Equation (11), the speed for separating the positive- and negative-sequence components of the grid voltage can be easily adjusted.

Figure 4b shows how the dynamics of the positive- and negative-sequence current injection during asymmetrical faults is mainly determined by the sequence filtering stage, since the admittance time response is very fast and does not add almost any delay.

3. Simulation Results

Simulation tests based on a digital implementation of the proposed controller are presented firstly in this section. A 100 kW two-level three-phase converter connected to a 400 V/50 Hz grid through a grid link filter is modeled for simulation, as shown in Figure 5. The key parameters for the test setup and controller are listed in

Table 1. Key parameters of the 100 kW SPC-based power converter.

Description	Symbol	Value
DC voltage	Vdc	750 [V]
Sag generator equivalent inductance	Ls	800 [μH]
Switching frequency	fsw	3150 [Hz]
Virtual resistance	Rpu	0.1 [p.u.]
Virtual reactance	Xpu	0.3 [p.u.]
Sequence filtering stage bandwidth	kbw	0.3
SPC’s virtual inertia constant	H	5 [s]
SPC’s virtual damping factor	ξ	0.7

.

The event considered in this simulation test is a 0.43 p.u. of voltage sag in one of the phases of the ac source, and it lasts for 200 ms. According to the aforementioned grid codes, the power converter should remain connected to the grid under such unbalanced voltage drop and the voltage support should be also triggered.

A generalized expression for the current reference generated by the virtual admittance block can be written as:

$$i^{*}=\frac{1}{R+Ls}(A_{pos}\Delta v^{+}+A_{neg}\Delta v^{-}+A_{trans}\Delta v_{\mathrm{trans}})$$

(26)

where L and R are the unified inductance and resistance that can be calculated based on the specified X_pu and R_pu.

To set different values for each sequence admittance in the virtual admittance block, the unified value of resistance and inductance can be modified by different coefficients, as shown in Equation (27). In this way, the admittance value for each branch can be simply defined by specifying value for the coefficients A_pos, A_neg and A_trans. Therefore, the inductance and resistance in each branch have the values shown in

Table 2. The inductance and resistance in each branch.

Description	Symbol	Value
Positive sequence resistance	R1	R/Apos
Positive sequence inductance	L1	L/Apos
Negative sequence resistance	R2	R/Aneg
Negative sequence inductance	L2	L/Aneg
Transient resistance	R3	R/Atrans
Transient inductance	L3	L/Atrans

.

Once X_pu and R_pu are set to meet requirements in reactive current injection during the faults, A_pos can be set to 1 by convenience.

In the experiments, two different sets of values for the virtual admittances are specified. In the first case, the value for A_neg was set to 10, which is a significantly greater value than the ones for A_pos and A_trans (which were both set to 1 by convenience), to clearly boost the negative-sequence current injection in the case of unbalanced faults. In contrast, the value for A_neg was set to 0.1 in a second case to limit the injection of negative-sequence current injection during unbalanced faults. These very different values for A_neg, namely 10 and 0.1, were chosen in this study case to clearly evidence the effect of the negative-sequence admittance value during unbalanced faults However, in real applications, A_neg should be determined according to the TSO requirements on the ratio between V⁻ and I⁻.

Working with the first set of values, i.e. with A_neg = 10 A_pos, it can be clearly appreciated in Figure 6 how the power converter provides a significant support to recover the voltage at the PCC, $v_{PCC}$, regarding both magnitude and symmetry recovery. By using such a large value for the negative-sequence admittance, the unbalanced voltage at the PCC is almost compensated as Figure 6b shows, compared to the grid voltage $v_{\mathrm{grid}}$, as Figure 6a shows. The highly unbalanced current injected to the grid, shown in Figure 6c, denotes its large negative-sequence component.

Considering the second set of values, a small value for the negative-sequence admittance is used, A_neg = 0.1 A_pos, hence the converter injects a very limited amount of negative-sequence current during the unbalanced fault, which is denoted by the relatively balanced current waveforms shown in Figure 7c. As a result, the PCC voltage unbalance is almost not compensated during the unbalanced grid fault as Figure 7b shows. Setting a low value for A_neg can be needed in practice considering current limitations of the power converter. Hence, small size power converters will be mainly responsible for positive-sequence current injection.

The rms value for the positive- and negative-sequence components of the voltage at the PCC and the injected current, calculated by $V_{rms}^{+}=\sqrt{\frac{1}{3}\left(v_{\alpha }^{+2}+v_{\beta }^{+2}\right)}$ and $V_{rms}^{-}=\sqrt{\frac{1}{3}\left(v_{\alpha }^{-2}+v_{\beta }^{-2}\right)}$, are shown in Figure 8.

Figure 8a shows that the positive-sequence voltage is properly supported by the SPC-based power converter with virtual admittance. The drop of the positive-sequence voltage component at the PCC is 8.5% when the power converter is activated, in comparison with 14.1% when the power converter is blocked. Figure 8b demonstrates a significant compensation of the unbalanced effect. When A_neg = 10, the per-unit rms voltage of the negative-sequence at the PCC during the fault is only 2.35%, a value much smaller than 14.6%, which is the per-unit rms voltage of the negative-sequence component of the voltage at the main grid. Figure 8d shows that the rms value of the negative-sequence current injected during the unbalanced fault can be simply adjusted by changing the values for the negative-sequence admittance, i.e., A_neg. Figure 8 also shows that the reaction of the converter in presence of the unbalanced fault is less than 20 ms and gets settled within 100 ms, which meets the grid codes requirements.

Figure 9 shows the effect of the transient admittance branch in the proposed virtual admittance block. A_trans is set to 0 and 1 in two different study cases, while A_pos is set to 1 and A_neg is set to 10 in both cases. As seen in Figure 9, the transient admittance contributes to a faster response when the unbalanced fault takes place. The injected current responds faster when the transient admittance is enabled, and both positive- and negative-sequence components of the PCC voltage present a smoother change than in the case of disabling the transient impedance. The coherence of the steady-state profiles in each scope of Figure 9 shows that the static performance is not affected by the transient admittance.

4. Experimental Results

As a first test scenario, a 10 kW grid-connected power converter is used to check whether the SPC controlled power converter can start-up and injects the power correctly with good dynamics.

The converter is programmed to have small virtual admittances in all the three branches of the virtual admittance block initially, being A_pos = A_neg = A_trans = 0.01, in order to minimize the transient at the instant of grid connection. Then, the virtual admittance parameters gradually increase to 1 after the switching is enabled. Then, the active and reactive power references jump from 0 to 10 kW and 2.5 kVar afterwards.

Figure 10 shows the current waveforms during the whole process. It is seen that no transient of current is found at the instant when the converter’s switching is enabled, and no oscillations of current are found during the admittance parameters changing and the active power step-up.

Figure 11 shows the active and reactive power injected by the power converter during the whole process. At t = 0.1 s, the power converter’s switching is enabled (E1). At t = 0.2 s, the admittance parameters start increasing from the value 0.01, and reach the value 1 at t = 0.7 s. At t = 0.8 s, the active and reactive power references jump from 0 to 10 kW and 2.5 kVar. It is observed how the power injected by the converter is correctly controlled free from oscillations or significant deviations during the whole process.

The above experimental results have demonstrated the correct implementation of the overall SPC control scheme. Then, the following tests are oriented to show the performance of the proposed virtual admittance block under asymmetrical grid fault.

Figure 12 shows the experimental setup for asymmetrical grid fault tests, where two 100 kW two-level three-phase power converters with the same specifications are connected in parallel and to the utility grid through a sag generator. The setup is pictured in Figure 13. A dc power source supplies both converters. The parameters for the SPC-based power converters are the same as the ones used in simulation, shown in Table 1. The event considered in the experiments is the same with the simulation tests, namely, a voltage sag of 0.43 p.u. in one of the phases of the ac grid.

In a first experiment, only one of the two converters is connected, and A_pos, A_neg, and A_trans are set to 1, 10 and 1, respectively. The voltage and current waveforms at the PCC during normal working and under fault conditions are shown in Figure 14. In this experimental test, the voltage sag is started and ended manually, which lasts for 8 s.

Figure 14a shows the envelope of the PCC voltage and converter injected current before, during and after the fault. A zoom-in of the pre-fault voltage and current waveforms are shown in Figure 14b, while the zoom-in voltage and current waveforms during the fault are shown in Figure 14c. These plots evidence how the PCC voltage is well supported during the unbalanced fault. There are only minor visible differences in the voltage waveforms magnitude before and during the fault. Therefore, it is demonstrated how the injected negative-sequence current results in relatively balanced voltage waveforms at the PCC.

The recorded data from the oscilloscope are plotted in Figure 15 to check the power converter dynamics and a quantitative evaluation of the injected positive- and negative-sequence currents. The positive- and negative-sequence components of the PCC voltage are also calculated.

From the profiles of the rms current of the positive- and negative-sequence components, as Figure 15d shows, the fast reaction of the power converter to support the unbalanced grid voltage can be appreciated. The positive- and negative-sequence current raised to 68% and 62% of the steady-state value, respectively, just 20 ms after of the fault start.

In a second experimental test, both converters are connected to the grid in order to test current sharing performance in front of common disturbances. The positive- and transient-admittance values were set the same for both converters, while different values for A_neg were set for the two power converters, i.e., A_neg = 10 A_pos, and A_neg = 0.1 A_pos, respectively.

Figure 16 shows the difference in the current injection of the two power converters when different values for A_neg are set in both converters. For converter 1, with A_neg = 10, the injected current during the fault has unbalanced waveforms as Figure 16c shows, since it contains a large amount of negative-sequence component. For converter 2, with A_neg = 0.1, the injected current during the fault is relatively balanced, due to the small rate of negative-sequence current injection. Thanks to the combined support provided by both converters, the voltage at the PCC does not experience a significant change in magnitude during the grid fault, which can be seen by comparing Figure 16b,c.

Figure 17 compares the rms value of the current injected by both converters. Since both of them have the same value for A_pos, the rms value of the positive-sequence current component is at the same level in both converters. However, the negative-sequence rms current profiles for both converters exhibit a clear difference in magnitude. It practically demonstrates that negative-sequence current sharing among paralleled converter can be easily adjusted by just setting proper values for A_neg in each of them.

Figure 18 shows the rms profile of the positive- and negative-sequence components of the voltage at the PCC and the currents injected by two power converters with different negative-sequence virtual admittances. The positive-sequence voltage drop at the PCC, as Figure 18a shows, is equal to 8.3% of its rated value, which is much smaller than the positive-sequence grid voltage drop, which is equal to 13.8%. Since the two converters have the same value for A_pos, the steady-state value of I₁⁺ and I₂⁺ are close each other as Figure 18c shows. However, converter 1 injects much more amount of negative-sequence current than converter 2 as Figure 18d shows, due to the high value set for A_neg in the former. The negative-sequence voltage component at the PCC increases by 5.2% during the fault. It is worth noting that even though the negative-sequence voltage component at the PCC, as Figure 18b shows, is 5.2%, which is smaller than the one in grid voltage (14.6%) during the unbalanced fault, it is greater than the one in the former experiment, when converter 2 was not connected (1.9%). Therefore, the relative influence of converter 1 on the PCC voltage is reduced due to the participation of converter 2.

Based on the steady-state rms value for the positive- and negative-sequence voltage and current components, the actual gain of the negative-sequence current injection (ΔI⁻/ΔV⁻) obtained from experimental results can be calculated. The actual gains for the two converters are visualized in Figure 19 and compared with requirements in the Verband der Elektrotechnik (VDE) grid codes (considering a 5% dead-band for each one). As can be observed in Figure 19, the characteristics of the two converters are within the range of the grid codes requirements (the shadow area).

5. Conclusions

This paper presents a virtual admittance controller aimed to provide voltage support under asymmetrical grid faults. By using independent and selective admittances for positive- and negative-sequence current injection, the unbalanced voltage can be significantly conditioned during asymmetrical faults. This controller is based on the general control framework of the SPC, which is able to control a grid-connected power converter with emulated and improved synchronous generator characteristics. Simulation and experimental results showed the significant effect of the proposed controller for unbalanced grid voltage support. A desired droop ratio for positive- and negative-sequence current injection to meet the grid codes can be easily achieved by adjusting the values of the positive- and negative-sequence admittance, respectively. The time response of the converter in presence of the asymmetrical faults can also be tuned for fast voltage support. Further, the transient admittance makes the converter have a faster response when the fault takes place.