Medina, L.; Diez-Ochoa, M.; Correal, R.; Cuenca-Asensi, S.; Serrano, A.; Godoy, J.; Martínez-Álvarez, A.; Villagra, J.
A Comparison of FPGA and GPGPU Designs for Bayesian Occupancy Filters. Sensors 2017, 17, 2599.
https://doi.org/10.3390/s17112599
AMA Style
Medina L, Diez-Ochoa M, Correal R, Cuenca-Asensi S, Serrano A, Godoy J, Martínez-Álvarez A, Villagra J.
A Comparison of FPGA and GPGPU Designs for Bayesian Occupancy Filters. Sensors. 2017; 17(11):2599.
https://doi.org/10.3390/s17112599
Chicago/Turabian Style
Medina, Luis, Miguel Diez-Ochoa, Raul Correal, Sergio Cuenca-Asensi, Alejandro Serrano, Jorge Godoy, Antonio Martínez-Álvarez, and Jorge Villagra.
2017. "A Comparison of FPGA and GPGPU Designs for Bayesian Occupancy Filters" Sensors 17, no. 11: 2599.
https://doi.org/10.3390/s17112599
APA Style
Medina, L., Diez-Ochoa, M., Correal, R., Cuenca-Asensi, S., Serrano, A., Godoy, J., Martínez-Álvarez, A., & Villagra, J.
(2017). A Comparison of FPGA and GPGPU Designs for Bayesian Occupancy Filters. Sensors, 17(11), 2599.
https://doi.org/10.3390/s17112599