Optogenetics is a neural stimulation technique that allows activation or deactivation and sensing [1
] of specific light-sensitive neurons with high temporal and spatial accuracy [2
]. This technique is based on introducing light-responsive proteins into neurons through genetic engineering. When the proteins are light-gated ion channels, the approach allows activation of ionic conductance across the cell membrane with light, which provides researchers with a strong tool of crucial importance for brain-computer interface development. Applications range from selective control of specific brain regions for identifying their function, to neuroprosthetics, and even treatment of diseases related to dysfunctions of certain parts of the nervous system [2
]. Besides, the necessity of having a tightly coupled electrophysiological recording readout to monitor the evoked brain activity at the single-neuron for tracking the effect of optical neural activation has been highlighted [4
Recently, optogenetics has been used to carry various experiments in freely-behaving rodents, especially mice [5
], which serve as disease models. As a result, many research groups have worked on optogenetics-related hardware to address the growing need in this area [5
]. Since the nature of these experiments requires flexible tools, which can evolve over time, the need for new optogenetic systems is always present. In particular, optical stimulation systems that can simultaneously record brain activity for allowing real time readout of light effect on brain activity, especially in freely moving animals, are highly sought [11
]. At the time of this writing, only a few commercial and research headstage systems are available [5
]. These systems present different characteristics, such as electrophysiological recording and optical stimulation [5
], high-power lasers or diodes for optical stimulation [5
], and wireless or wired transmitters [5
]. However, commercial wireless systems, such as those proposed in [6
], either provides optical stimulation from a maximum of two channels or electrophysiological recording from several channels (from up to 126 channels), but not both functions. Similarly, existing wirelessly powered implantable optoelectronic devices, such as the one proposed in [8
], can offer cellular-scale optical stimulation using inorganic light-emitting diodes (µ-ILEDs) but do not provide any electrophysiological recording means. The system presented in [9
] provides 32 electrical stimulation channels but does not include any electrophysiological recording circuitry. Although many of these tools and settings have interesting features, to our knowledge, none of them benefit from combined implantable fiber-coupled LED and multiple electrophysiological recording channels while possessing wireless transmission. The ones featuring optical stimulation LED or lasers are either tethered to a power source via cables [6
], and/or are missing electrophysiological recording capability [8
], while the ones capable of high-quality signal recording lack light stimulation circuitry [12
Designing a wireless optogenetic headstage is a challenging task as there are many design constraints and considerations that have to be taken into account. Two of the most challenging constraints are: the limited energy source and the need for a small form factor. More specifically, limited power sources such as batteries and wireless power delivery links [5
] create serious limitations on the amount of optical power that can be delivered to the target light-sensitive neurons. In addition, the size requirement of the optogenetic headstage, especially when designed for mice, results in a more compact size and smaller power sources. Other challenges to designing a neural headstage, with or without optical stimulation, involve electromagnetic compatibility (EMC) and electromagnetic interference (EMI) issues. A wireless optogenetic headstage must include ultra-low noise analog circuitry [16
], high-current optical stimulation circuitry [5
], digital and mixed-signal processors [5
] and radio frequency (RF) transmission circuitry. Combining all these building blocks together inside a small package can cause EMC/EMI issues that can significantly degrade the performance of the headstage. The high switching currents in the optical stimulation circuits, as well as charge injection and clock feedthrough from the digital circuits, can cause high fluctuations in the power supply rails, and induce noise in the sensitive analog circuitry.
In this paper, we present an optogenetic headstage incorporating two high-power LED and two electrophysiological readout channels. The headstage is built entirely using low-cost commercial off-the-shelf (COTS) components for better flexibility, lower cost and reduced development time. It can drive each LED with up to 150 mA resulting in 8 mW output optical power from a 200-μm core implanted optical fiber (250 mW/mm2
) to deliver light to the target brain regions. Each of the two readout channels, also referred to as an analog front end (AFE), amplify and filter the acquired neural signal. A commercial radio transceiver operating at a center frequency of 2.4 GHz is used to transmit the acquired and digitized neural signals back to a base station computer where more processing is performed in the captured signals. The system is powered using a small lithium-ion battery and can continuously operate for up to 3 h. A MSP430 microcontroller from Texas Instruments equipped with a real-time operating system (RTOS) is in charge of system control, digitizing the AFE outputs and data transmission. To the best of our knowledge, this is the first reported fully wireless headstage to offer simultaneous multichannel optical stimulation along with multichannel brain signals recording capability. In Section 2
of this paper, an overview of the proposed optogenetic headstage is presented and all building blocks and rationale behind their design are described in detail. In Section 3
, we present in vitro
and in vivo
measurements obtained with the fabricated headstage prototype. In vivo
trials were performed with a transgenic mouse expressing Channelrhodopsin-2. Section 4
includes the conclusion and future work.
2. System Overview and Design
The proposed wireless optogenetic system, the block diagram of which is shown in Figure 1
, consists of two interconnected parts. The first part is the headstage itself, which contains the electronics for powering the LED, for recording and amplifying neural signals and for wirelessly transferring neural data to a base station. The second part consists of an implantable module, which holds the LED, the optical fibers and two microelectrodes. The headstage system includes five main building blocks: (1) the analog front-end; (2) the optical stimulation circuitry; (3) the power management unit (PMU); (4) the wireless transceiver; and (5) the mixed-signal controller. The AFE amplifies the low-amplitude action potentials (AP) whose bandwidth lies between 300 Hz and 7 kHz [16
]. Very high common-mode rejection ratio (CMRR) and power supply rejection ratio (PSRR) are necessary for a smooth and reliable neural signal acquisition where the expected amplitudes of the signals are very low [16
]. The AFE achieves its high PSRR partly by incorporating electronic components with high PSRR specifications and partly by having a separate power supply filter network, which removes fast power supply fluctuations.
Block diagram of the proposed headstage system.
Block diagram of the proposed headstage system.
The role of optical stimulation circuitry is to apply a determined voltage pattern across the stimulation LED pins. This voltage pattern, which directly translates to the LED current, needs to be precise in order to ensure that the optical power delivered to the target neurons is accurate. The presented optogenetic headstage can deliver a current of 150 mA to the stimulation LED [20
] using precise closed-loop current sources. The PMU is responsible for supplying a 3.3-V supply voltage for the control unit and the radio transceiver. The PMU incorporates a power supply filter, which removes high-frequency fluctuations in the regulated supply voltages. Otherwise, these high-frequency fluctuations would be observable in the supply voltage from the battery when the optical stimulation LED are active. A digital radio transceiver working at 2.4 GHz is used to transmit the acquired data to a base station, and to receive the stimulation parameters. The control unit is based on a low-power microcontroller (MCU) from the MSP430 family of Texas Instruments. This microcontroller generates the optical stimulation patterns, digitizes the output signals of the AFE, transmits data using the radio transceiver, and, in general, controls the functionality of the whole headstage system.
The headstage is connected with biological tissues through an implantable module, which is a mechanical part that is mounted on the rodent’s head by surgery holding in place with dental cement; this component includes, the optical fibers and the microelectrodes both connected to the headstage through a Molex board-to-board connector. In the following subsections, we will describe each building block of the headstage in detail, including the implantable module.
2.1. Implantable Module (LED and Microelectrodes)
The headstage is connected to the implantable module via a low-profile board-to-board Molex connector, enabling easy disconnection of the system between experiments and to recharge the battery. The fiber-coupled LEDs (Doric Lenses, Québec, QC, Canada) are connected to a printed circuit board inside the implantable module. Each LED is coupled with a 200-µm core optical fiber, and pre-packaged with two microelectrodes inside a thin polyimide tubing of 400 µm outer diameter to minimize brain damage upon implantation. Tungsten microelectrodes from MicroProbes (Gaithersburg, MD, USA) having a shank diameter of 75 µm, and an impedance of 1 MΩ are employed for single-cell recording. Once the optrode (combined optical fiber and microelectrodes) is precisely placed into the brain, the implantable module must be cemented using dental cement on the animal skull to avoid optrode tethering and displacement, and to hold firmly the headstage in place. When used within in vivo experiments, the implantable module can be cemented to the skull of the animal to be held in place.
2.2. Analog Front End
The AFE is responsible for amplifying and conditioning the neural signal measured by the microelectrodes. Neural signals can be acquired using different methods [16
], and, depending on the method, the amplitude of the acquired signals and the complexity and duration of the in vivo
experimental protocol are different [16
]. In this work, we aim to capture extracellular action potentials [5
] with microelectrodes. In this scenario, it is expected that the amplitudes of the action potentials are between 50 µV and 150 µV [5
]. As a result, an ultra-low-noise amplifier design with high CMRR and PSRR is necessary. Our design, based on low-cost commercial components, uses a high-performance INA118 instrumentation amplifier alongside a very low-noise LM4140 voltage reference, both from Texas Instruments. In addition, the AFE contains a 2nd order low-pass Sallen-key filter, a non-inverting amplifier, and a passive power supply filter network for removing high-frequency fluctuations, plus one low-dropout (LDO) voltage regulator (TLV70230, Texas Instruments, Dallas, TX, USA). Figure 2
shows the AFE circuitry. An ultra-low-noise 1.25-V voltage reference (LM4140) generates the mid-supply common-mode voltage for the instrumentation amplifier and other op-amps. Using such a low-noise and high-PSRR voltage reference is critical since this voltage directly appears at the inputs of the AFE, rendering it very sensitive to any noise or fluctuations that could be superimposed on the neural signal [21
An overall gain of 3000 V/V and a −3 dB bandwidth between 300 Hz and 7 KHz, for full-bandwidth neural signal acquisition, is chosen for the AFE. It should be noted that the gain of 3000 V/V is suitable for amplifying input signals of amplitude of up to approximately 800 µV before saturation at the input of the analog-to-digital converter (ADC), because of an internal 2.5-V reference voltage inside the MSP430).
Schematic of the two-channel analog front-end.
Schematic of the two-channel analog front-end.
2.3. Optical Stimulation Circuitry
The stimulation LED are driven by the optical stimulation circuitry. This circuit uses a precise current source design based on a closed-loop op-amp to ensure the right amount of current is passed through the LED. The voltage across the 0.5-Ω resistor is fed to one ADC of the microcontroller transmitted to the base station to precisely monitor the optical stimulation timings, and to give a real-time feedback of the amount of current flowing into each LED during the experiment. Transistor Q1 (Figure 3
) is used to make sure that the LED is turned off completely when there is no activation signal at the base of Q1 i.e.
, the pulse width modulation (PWM) signal is on its low level. Figure 3
depicts the LED driver; since the LED are directly connected to the battery to benefit from a high forward voltage, power supply filter networks are implemented for every building block in the headstage in order to filter out any transient currents occurring upon activation of optical stimulation LEDs that would otherwise disturb the voltage supply of other circuits.
LED driver circuitry.
LED driver circuitry.
2.4. Power Management Unit
shows the PMU circuitry. The whole headstage is powered by a 3.7-V, 100-mAh lithium-ion battery, so the PMU must provide a fixed 3.3-V supply voltage for the control unit and radio transmission. To address this requirement, a low-drop voltage regulator (TLV70233 from Texas Instruments) is used, which has a 51-dB PSRR to decrease the effects of high frequency fluctuations produced by optical stimulation circuitry. In addition, a passive power supply filter network is designed to be located after the regulation circuitry to remove the optical fluctuation effects. This passive network has a low-pass behavior and compensates the low PSRR of the LDO voltage regulator at higher frequencies.
In addition, as mentioned above, another low-drop regulator (TLV70230 from Texas Instruments) provides the required supply voltage in the AFE circuit, and an ultra-low-noise 1.25 V voltage regulator (LM4140) is embedded to produce the common-mode voltage. This common voltage has been chosen to be half of the internal ADC reference of the MSP430.
2.5. Wireless Transceiver
Wireless communications are insured by the ultra-low-power nRF24L01+ chip from Nordic Semiconductor. The chip integrates a complete 2.4-GHz Gaussian frequency-shift keying (GFSK) RF transceiver and synthesizer capable of transmitting at a maximum rate of 2 Mbps. Tests carried with this wireless transmitter have shown a measured maximum effective transmission rate of 0.7 Mbps. Such a transmission rate enables one to transmit as much as two channels of neural signals, each sampled at 20 kHz, and quantified on a maximum of 12 bits, corresponding to a maximum bit rate of 0.64 Mbps, which is below the aforementioned effective transmission rate. Control and configuration data of the transceiver are passed by the microcontroller via an 8-MHz Serial Peripheral Interface (SPI) bus. When transmitting at 0 dBm, the chip consumes as low as 11.3 mA, while consuming 13.5 mA in receiving mode at 2 Mbps. A quad-flat no-leads (QFN) 4 × 4-mm package allows this transceiver to be fully suitable for a compact PCB design.
2.6. Mixed-Signal Control System
Digitization, control of RF communications, and generation of LED stimulation patterns are carried by a MSP430F5328 microcontroller from Texas Instrument [22
]. To be able to use the microcontroller resources at its maximum of efficiency and the lowest power, a real-time operating system (RTOS) has been integrated into the control firmware. We selected the FunkOS [23
] developed by Funkenstein Software Consulting since it supports all the needed functionalities for this application, while being fast and energy-efficient. RTOS, like the TinyOS [24
], have already been used in previous neural recording systems. Unlike TinyOS, which uses the nesC programing language, FunkOS uses C language, which is a widespread programming language that is compatible with the MSP430 driver libraries. It is also fully compatible with the native interruptions of the microcontroller. The context switching latency was measured to be around 35 µs with an operating frequency of 8 MHz. In order to compare FunkOS with other RTOS, measurements were performed on the SYS/BIOS, the FreeRTOS and the BRTOS, which resulted in 94 µs, 137 µs and 42 µs of context switching latency, respectively. As previously mentioned, all the various tasks of the RTOS can be jointly used with the native interruptions of the system, allowing quick responses to any event, which is crucial to allow a sampling frequency of 20 kHz in the headstage, using the ADC and the DMA module available in the MSP430. So, after filling the buffer of the ADC, the DMA is triggered to transfer data from the ADC buffer directly to a packetizing module, before being passed to the transceiver and transmitted to the base station. When a packet is ready, the DMA interruption triggers the data transmission task via an RTOS semaphore. Thus, the MCU can execute other tasks or get into Idle mode between each packet by executing a Sleeping task (Figure 5
Functional diagram of the control firmware.
Functional diagram of the control firmware.
The control firmware, the functional diagram of which is shown in Figure 5
, consists in four main tasks. The task having the highest priority is dedicated to receiving configuration packets from the base station. Since the transceiver consumes more power in receiving mode (13.5 mA at 2 Mbps) than in transmitting mode (11.3 mA at 0 dBm), a task has been dedicated to toggle the transceiver from the receiving mode to the idle mode whenever possible. This task also transmits a synchronization packet and sets the transceiver in receiving mode for a short period of time. If no configuration packet has been received, the transceiver is switched into idle mode before repeating the cycle. Another task is dedicated to transmitting the captured neural data to the transceiver when the DMA finishes filling the buffer packet. A sleeping task is dedicated to put the microcontroller in idle mode for saving power when no other task has to be executed. Such a sleeping task saves power by turning off the MCU when it is not in use. The MCU is brought back in the active mode by using interrupts. With a packet size of 32 bytes, the Sampling/Transmitting task is triggered by a DMA interruption every 800 µs. Note that changing the task context requires a 35-µs delay. A 70-µs delay is required to switch from the Sleeping task to the Sampling/Transmitting task and vice versa. Additionally, transferring a packet to the transceiver requires around 42 µs using a SPI link at 8 MHz. As a result, the MCU can ideally be in the sleeping task for 688 µs between DMA interrupts (800-µs periods), which corresponds to 86% of the CPU time, the context changes being automatically managed by the RTOS. By adding the overhead induced by the code execution inside the Sampling/Transmitting task, it has been observed that the MCU goes into the Sleeping task as much as 73% of the time, resulting in a measured average power saving of 3.3 mW.