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Keywords = hop quantization

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19 pages, 1201 KB  
Article
Design of a Low-Latency Video Encoder for Reconfigurable Hardware on an FPGA
by Pablo Perez-Tirador, Jose Javier Aranda, Manuel Alarcon Granero, Francisco J. J. Quintanilla, Gabriel Caffarena and Abraham Otero
Technologies 2025, 13(10), 433; https://doi.org/10.3390/technologies13100433 - 25 Sep 2025
Abstract
The growing demand for real-time video streaming in power-constrained embedded systems, such as drone navigation and remote surveillance, requires encoding solutions that prioritize low latency. In these applications, even small delays in video transmission can impair the operator’s ability to react in time, [...] Read more.
The growing demand for real-time video streaming in power-constrained embedded systems, such as drone navigation and remote surveillance, requires encoding solutions that prioritize low latency. In these applications, even small delays in video transmission can impair the operator’s ability to react in time, leading to instability in closed-loop control systems. To mitigate this, encoding must be lightweight and designed so that streaming can start as soon as possible, ideally even while frames are still being processed, thereby ensuring continuous and responsive operation. This paper presents the design of a hardware implementation of the Logarithmic Hop Encoding (LHE) algorithm on a Field-Programmable Gate Array (FPGA). The proposed architecture is deeply pipelined and parallelized to achieve sub-frame latency. It employs adaptive compression by dividing frames into regions of interest and uses a quantized differential system to minimize data transmission. Our design achieves an encoding latency of between 1.87 ms and 2.1 ms with a power consumption of only 2.7 W when implemented on an FPGA clocked at 150 MHz. Compared to a parallel GPU implementation of the same algorithm, this represents a 6.6-fold reduction in latency at approximately half the power consumption. These results show that FPGA-based LHE is a highly effective solution for low-latency, real-time video applications and establish a robust foundation for its deployment in embedded systems. Full article
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18 pages, 5465 KB  
Article
Critical Lengths of Kitaev Chains for Majorana Zero Modes with a Microsecond Coherence Time and a Quantized Conductance Signature
by Mirko Poljak
Materials 2024, 17(23), 5898; https://doi.org/10.3390/ma17235898 - 2 Dec 2024
Cited by 1 | Viewed by 1288
Abstract
The problems of disorder and insufficient system length are generally regarded as central problems in the realization of Majorana zero modes (MZM), which are a promising platform for realizing fault-tolerant topological quantum computing (TQC). In this work, we analyze eigenenergy spectra and transport [...] Read more.
The problems of disorder and insufficient system length are generally regarded as central problems in the realization of Majorana zero modes (MZM), which are a promising platform for realizing fault-tolerant topological quantum computing (TQC). In this work, we analyze eigenenergy spectra and transport properties of finite Kitaev chains using quantum transport simulations in a wide design space of hopping amplitude (t), superconductor pairing (Δ), and electrochemical potential. Our goal is to determine critical or minimum acceptable chain lengths to obtain oscillation-free MZMs with suitable microsecond coherence times, and observable zero-bias conductance peaks (ZBCP) quantized almost at ~2e2/h. Due to qualitative equivalence of the Kitaev and Oreg–Lutchyn models, we approximately determine the foreseeable critical length of topological superconducting nanowires (TS NWs) as well. We find that the ZBCP length requirement is looser in comparison to the limit imposed by the coherence time. For a large t/Δ mismatch of ~40 corresponding to the experimental TS NWs, the first condition sets the minimum length to 344 sites (≈5.5 μm), while the second condition requires 605 sites (≈9.7 μm). The calculated lengths are far from the reported experimental hybrid device dimensions, explaining difficulties in observing MZMs in TS NWs fabricated so far. Nonetheless, a decreasing t/Δ mismatch allows for shorter systems, which argues in favor of the proximitized quantum dot path for MZMs in a solid-state system. Full article
(This article belongs to the Section Quantum Materials)
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15 pages, 4256 KB  
Article
DV-Hop Location Algorithm Based on RSSI Correction
by Wanli Zhang and Xiaoying Yang
Electronics 2023, 12(5), 1141; https://doi.org/10.3390/electronics12051141 - 26 Feb 2023
Cited by 11 | Viewed by 2237
Abstract
To increase the positioning accuracy of Distance Vector-Hop (DV-Hop) algorithm in non-uniform networks, an improved DV-Hop algorithm based on RSSI correction is proposed. The new algorithm first quantizes hops between two nodes by the ratio of the RSSI value between two nodes and [...] Read more.
To increase the positioning accuracy of Distance Vector-Hop (DV-Hop) algorithm in non-uniform networks, an improved DV-Hop algorithm based on RSSI correction is proposed. The new algorithm first quantizes hops between two nodes by the ratio of the RSSI value between two nodes and the benchmark RSSI value, divides the hops continuously, calculates the average hop distance according to the Minimum Mean Square Error (MMSE) criterion of the best index based on the quantized hops, and then adds hop distance matching factor to the fitness function of each anchor node into the calculation of the hop distance fitness function to weight the fitness function. The change index value is introduced to obtain more accurate hop distance value, and then the estimation error of unknown node (UN) coordinate is modified by using the distance relationship between the UN and the nearest beacon node (BN), and the modified coordination position is further modified by using the triangle centroid to improve the accuracy of node positioning in the irregular network. The experimental results show that compared with the original DV-Hop, improved DV-Hop1, improved DV-Hop2 and improved DV-Hop3, the localization error of the improved algorithm in this paper is reduced by 58%, 45%, 34%, and 29%, respectively, on average, in the two network environments. Without increasing the hardware cost and energy consumption, the improved algorithm has excellent localization performance. Full article
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23 pages, 3506 KB  
Article
Comprehensive Performance Analysis of Zigbee Communication: An Experimental Approach with XBee S2C Module
by Khandaker Foysal Haque, Ahmed Abdelgawad and Kumar Yelamarthi
Sensors 2022, 22(9), 3245; https://doi.org/10.3390/s22093245 - 23 Apr 2022
Cited by 33 | Viewed by 8151
Abstract
The recent development of wireless communications has prompted many diversified applications in both industrial and medical sectors. Zigbee is a short-range wireless communication standard that is based on IEEE 802.15.4 and is vastly used in both indoor and outdoor applications. Its performance depends [...] Read more.
The recent development of wireless communications has prompted many diversified applications in both industrial and medical sectors. Zigbee is a short-range wireless communication standard that is based on IEEE 802.15.4 and is vastly used in both indoor and outdoor applications. Its performance depends on networking parameters, such as baud rates, transmission power, data encryption, hopping, deployment environment, and transmission distances. For optimized network deployment, an extensive performance analysis is necessary. This would facilitate a clear understanding of the trade-offs of the network performance metrics, such as the packet delivery ratio (PDR), power consumption, network life, link quality, latency, and throughput. This work presents an extensive performance analysis of both the encrypted and unencrypted Zigbee with the stated metrics in a real-world testbed, deployed in both indoor and outdoor scenarios. The major contributions of this work include (i) evaluating the most optimized transmission power level of Zigbee, considering packet delivery ratio and network lifetime; (ii) formulating an algorithm to find the network lifetime from the measured current consumption of packet transmission; and (iii) identifying and quantizing the trade-offs of the multi-hop communication and data encryption with latency, transmission range, and throughput. Full article
(This article belongs to the Special Issue Reliability Analysis of Wireless Sensor Network)
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19 pages, 987 KB  
Article
Low-Resolution ADCs for Two-Hop Massive MIMO Relay System under Rician Channels
by Shujuan Yu, Xinyi Liu, Jian Cao and Yun Zhang
Entropy 2021, 23(8), 1074; https://doi.org/10.3390/e23081074 - 19 Aug 2021
Cited by 4 | Viewed by 2404
Abstract
This paper works on building an effective massive multi-input multi-output (MIMO) relay system by increasing the achievable sum rate and energy efficiency. First, we design a two-hop massive MIMO relay system instead of a one-hop system to shorten the distance and create a [...] Read more.
This paper works on building an effective massive multi-input multi-output (MIMO) relay system by increasing the achievable sum rate and energy efficiency. First, we design a two-hop massive MIMO relay system instead of a one-hop system to shorten the distance and create a Line-of-Sight (LOS) path between relays. Second, we apply Rician channels between relays in this system. Third, we apply low-resolution Analog-to-Digital Converters (ADCs) at both relays to quantize signals, and apply Amplify-and-Forward (AF) and Maximum Ratio Combining (MRC) to the processed signal at relay R1 and relay R2 correspondingly. Fourth, we use higher-order statistics to derive the closed-form expression of the achievable sum rate. Fifth, we derive the power scaling law and achieve the asymptotic expressions under different power scales. Last, we validate the correctness of theoretical analysis with numerical simulation results and show the superiority of the two-hop relay system over the one-hop relay system. From both closed-form expressions and simulation results, we discover that the two-hop system has a higher achievable sum rate than the one-hop system. Besides, the energy efficiency in the two-hop system is higher than the one-hop system. Moreover, in the two-hop system, when quantization bits q = 4, the achievable sum rate converges. Therefore, deploying low-resolution ADCs can improve the energy efficiency and achieve a fairly considerable achievable sum rate. Full article
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