Search Results (4)

As the basic tools for neuroscience research, invasive neural recording devices can obtain high-resolution neuronal activity signals through electrodes connected to the subject’s brain. Existing wireless neural recording devices are large in size or need external large-scale equipment for wireless power supply, which limits their application. Here, we developed an ultra-low-noise, low power and miniaturized dual-channel wireless neural recording microsystem. With the full-differential front-end structure of the dual operational amplifiers (op-amps), the noise level and power consumption are notably reduced. The hierarchical microassembly technology, which integrates wafer-level packaged op-amps and the miniaturized Bluetooth module, dramatically reduces the size of the wireless neural recording microsystem. The microsystem shows a less than 100 nV/$\sqrt{\mathrm{Hz}}$ ultra-low noise level, about 10 mW low power consumption, and 9 × 7 × 5 mm${}^3$ small size. The neural recording ability was then demonstrated in saline and a chronic rat model. Because of its miniaturization, it can be applied to freely behaving small animals, such as rats. Its features of ultra-low noise and high bandwidth are conducive to low-amplitude neural signal recording, which may help advance neuroscientific discovery. Full article

Continuous monitoring of mechanical impacts is one of the goals of modern SHM systems using a sensor network installed on a structure. For the evaluation of the impact position, there are generally applied triangulation techniques based on the estimation of the differential time of arrival (DToA). The signals generated by impacts are multimodal, dispersive Lamb waves propagating in the plate-like structure. Symmetrical S₀ and antisymmetrical A₀ Lamb waves are both generated by impact events with different velocities and energies. The discrimination of these two modes is an advantage for impact positioning and characterization. The faster S₀ is less influenced by multiple path signal overlapping and is also less dispersive, but its amplitude is generally 40–80 dB lower than the amplitude of the A₀ mode. The latter has an amplitude related to the impact energy, while S₀ amplitude is related to the impact velocity and has higher frequency spectral content. For these reasons, the analog front-end (AFE) design is crucial to preserve the information of the impact event, and at the same time, the overall signal chain must be optimized. Large dynamic range ADCs with high resolution (at least 12-bit) are generally required for processing these signals to retrieve the DToA information found in the full signal spectrum, typically from 20 kHz to 500 kHz. A solution explored in this work is the design of a versatile analog front-end capable of matching the different types of piezoelectric sensors used for impact monitoring (piezoceramic, piezocomposite or piezopolymer) in a sensor node. The analog front-end interface has a programmable attenuator and three selectable configurations with different gain and bandwidth to optimize the signal-to-noise ratio and distortion of the selected Lamb wave mode. This interface is realized as a module compatible with the I/O of a 16 channels real-time electronic system for SHM previously developed by the authors. High-frequency components up to 270 kHz and lower-frequency components of the received signals are separated by different channels and generate high signal-to-noise ratio signals that can be easily treated by digital signal processing using a single central unit board with ADC and FPGA. Full article

Micro-electromechanical system (MEMS) magnetic sensors are widely used in the nanosatellites field. We proposed a novel high-precision miniaturized three-axis digital tunneling magnetic resistance-type (TMR) sensor. The design of the three-axis digital magnetic sensor includes a low-noise sensitive element and high-performance interface circuit. The TMR sensor element can achieve a background noise of 150 pT/Hz^1/2 by the vertical modulation film at a modulation frequency of 5 kHz. The interface circuit is mainly composed of an analog front-end current feedback instrumentation amplifier (CFIA) with chopper structure and a fully differential 4th-order Sigma-Delta (ΣΔ) analog to digital converter (ADC). The low-frequency 1/f noise of the TMR magnetic sensor are reduced by the input-stage and system-stage chopper. The dynamic element matching (DEM) is applied to average out the mismatch between the input and feedback transconductor so as to improve the gain accuracy and gain drift. The digital output is achieved by a switched-capacitor ΣΔ ADC. The interface circuit is implemented by a 0.35 μm CMOS technology. The performance test of the TMR magnetic sensor system shows that: at a 5 V operating voltage, the sensor can achieve a power consumption of 120 mW, a full scale of ±1 Guass, a bias error of 0.01% full scale (FS), a nonlinearity of x-axis 0.13% FS, y-axis 0.11% FS, z-axis 0.15% FS and a noise density of x-axis 250 pT/Hz^1/2 (at 1 Hz), y-axis 240 pT/Hz^1/2 (at 1 Hz), z-axis 250 pT/Hz^1/2 (at 1 Hz), respectively. This work has a less power consumption, a smaller size, and higher resolution than other miniaturized magnetometers by comparison. Full article

This study proposes a front-end readout circuit as an encoder chip for magneto-resistance (MR) linear scales. A typical MR sensor consists of two major parts: one is its base structure, also called the magnetic scale, which is embedded with multiple grid MR electrodes, while another is an “MR reader” stage with magnets inside and moving on the rails of the base. As the stage is in motion, the magnetic interaction between the moving stage and the base causes the variation of the magneto-resistances of the grid electrodes. In this study, a front-end readout IC chip is successfully designed and realized to acquire temporally-varying resistances in electrical signals as the stage is in motions. The acquired signals are in fact sinusoids and co-sinusoids, which are further deciphered by the front-end readout circuit via newly-designed programmable gain amplifiers (PGAs) and analog-to-digital converters (ADCs). The PGA is particularly designed to amplify the signals up to full dynamic ranges and up to 1 MHz. A 12-bit successive approximation register (SAR) ADC for analog-to-digital conversion is designed with linearity performance of ±1 in the least significant bit (LSB) over the input range of 0.5–2.5 V from peak to peak. The chip was fabricated by the Taiwan Semiconductor Manufacturing Company (TSMC) 0.35-micron complementary metal oxide semiconductor (CMOS) technology for verification with a chip size of 6.61 mm², while the power consumption is 56 mW from a 5-V power supply. The measured integral non-linearity (INL) is −0.79–0.95 LSB while the differential non-linearity (DNL) is −0.68–0.72 LSB. The effective number of bits (ENOB) of the designed ADC is validated as 10.86 for converting the input analog signal to digital counterparts. Experimental validation was conducted. A digital decoder is orchestrated to decipher the harmonic outputs from the ADC via interpolation to the position of the moving stage. It was found that the displacement measurement error is within ±15 µm for a measuring range of 10 mm. Full article