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Keywords = RTL-to-GDSII flow

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26 pages, 9948 KB  
Article
Comprehensive RTL-to-GDSII Workflow for Custom Embedded FPGA Architectures Using Open-Source Tools
by Emilio Isaac Baungarten-Leon, Susana Ortega-Cisneros, Gerardo Leyva, Héctor Emmanuel Muñoz Zapata, Erick Guzmán-Quezada, Francisco J. Alvarado-Rodríguez and Juan Jose Raygoza-Panduro
Electronics 2025, 14(19), 3866; https://doi.org/10.3390/electronics14193866 - 29 Sep 2025
Viewed by 2722
Abstract
The main objective of this work is to provide a comprehensive explanation of the Register Transfer Level (RTL) to Graphic Data System II (GDSII) flow for designing custom Field-Programmable Gate Array (FPGA) architectures at the 130 nm technology node using the SKY130 Process [...] Read more.
The main objective of this work is to provide a comprehensive explanation of the Register Transfer Level (RTL) to Graphic Data System II (GDSII) flow for designing custom Field-Programmable Gate Array (FPGA) architectures at the 130 nm technology node using the SKY130 Process Design Kit (PDK). By leveraging open-source tools—specifically OpenLane and OpenFPGA—this study details the methodology and implementation steps required to generate a GDSII layout of a custom FPGA. OpenLane offers an integrated RTL-to-GDSII flow by combining multiple Electronic Design Automation (EDA) tools, while OpenFPGA enables the construction of flexible and customizable FPGA architectures. The article covers key aspects of the RTL-to-GDSII workflow, including RTL file configuration, the utilization of configuration variables for physical design, hierarchical chip design, macro and core implementation, chip-level integration, and gate-level simulation. Experimental results validate the proposed workflow, showcasing the successful transformation from RTL to GDSII. The findings of this research provide valuable insights for researchers and engineers in the FPGA design field, advancing the state of the art in FPGA architecture development. Full article
(This article belongs to the Special Issue FPGAs and Reconfigurable Systems: Theory, Methods and Applications)
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