We are pleased to announce that a new scholar, Dr. Pedro Toledo, has been appointed Editorial Board Member (EBM) for Chips (ISSN 2674-0729), effective April 2026. We wish him success in both his research and his efforts to develop the journal.

Name: Dr. Pedro Toledo
Affiliation: Synopsys, Oeiras, Portugal
Interests: analog IC design; ultra-low-power circuits; digital-based analog design; advanced CMOS (FinFET/GAA); SERDES and high-speed I/O; voltage references (ZTC/GZTC); nano-voltage OTAs; energy-harvesting ICs; IoT analog interfaces; mixed-signal design

Dr. Pedro Toledo is a staff analog/RF design engineer at Synopsys in Oeiras, Portugal. He received his joint Ph.D. in Microelectronics from Politecnico di Torino (Italy) and UFRGS (Brazil). His research interests include analog IC design, ultra-low-power circuits, digital-based analog design, advanced CMOS (FinFET/GAA), SERDES and high-speed I/O, voltage references (ZTC/GZTC), nano-voltage OTAs, energy-harvesting ICs, IoT analog interfaces, and mixed-signal design. He has authored numerous papers in IEEE journals and conferences, including IEEE Transactions on Circuits and Systems, ISCAS, ICECS, and other flagship venues, and serves as a reviewer for various journals.

The following is an interview with Dr. Pedro Toledo:

1. Could you briefly introduce how you first learned about the journal Chips?
I first learned about Chips through academic publishing channels and professional networks, particularly via its increasing visibility in the semiconductor and microelectronics research community. Its strong focus on emerging topics in integrated circuits and systems also drew my attention to its scope and mission.

2. What research directions do you believe the journal should focus on?
The journal should continue emphasizing cutting-edge topics in semiconductor technologies, including advanced CMOS scaling, heterogeneous integration, and system-level co-design. Additionally, areas such as AI hardware, low-power and edge computing, RF and mixed-signal design, and emerging device technologies—such as beyond-CMOS, neuromorphic, and quantum computing systems—are particularly relevant. Strengthening the connection between circuit design, system architecture, and real-world applications will further enhance the journal’s impact.

3. What suggestions do you have for the journal to expand its presence in the global semiconductor industry and academic market?
To expand its global presence, the journal could actively engage with major conferences and industry events, fostering collaborations with leading academic and industrial stakeholders. Inviting high-quality special issues on trending topics, increasing the participation of renowned researchers on the editorial board, and promoting published work through digital platforms and social media can also improve visibility. Additionally, encouraging submissions from both academia and industry will help bridge the gap between theoretical advances and practical implementations.

4. As an Editorial Board Member, how do you think the journal can better support authors in enhancing the academic impact of their articles?
The journal can support authors by providing constructive and timely peer review, with clear guidance on improving technical depth, clarity, and presentation quality. Offering recommendations on how to position contributions relative to the state of the art, as well as encouraging reproducibility and transparency, can significantly enhance impact. Additionally, initiatives such as highlighting high-quality papers, promoting open access visibility, and offering pre-submission editorial guidance can help authors maximize the reach and influence of their work.

5. How does your current work at Synopsys on high-speed SerDes and advanced CMOS align with the scope of Chips?
My work at Synopsys focuses on designing high-speed serial links and equalization circuits in advanced CMOS technologies—exactly the kind of practical, industry-driven analog and mixed-signal design that Chips aims to showcase. I believe this hands-on experience with cutting-edge process nodes (FinFET, GAA, Nanosheet) and system-level I/O challenges will help me bridge the gap between fundamental research and industrial applications, which is central to the journal’s mission.

We sincerely thank Dr. Toledo for his time and thoughtful insights, and we look forward to his valuable contributions to Chips.