Surface Ion Trap for Fast Microwave Gates

Abstract

Microwave-driven quantum logic gates in trapped-ion systems offer a scalable and laser-free alternative to optical control, with the potential for robust integration into surface-electrode trap architectures. In this work, we present a systematic design guideline for planar ion traps optimized for fast two-qubit microwave gates using chip-integrated conductors. We investigate two electrode configurations, one employing a single microwave line for driving $\sigma$ transitions, and another with two symmetric lines for $\pi$ transitions. Through finite-element simulations, we analyze ion height, magnetic field gradients, heating effects, and gate durations under realistic cryogenic conditions. Our results show that both configurations can achieve two-qubit gate times in the order of 10 μs for ${}^9\mathrm{Be}^{\mathrm{+}}$ and ${}^{40}\mathrm{Ca}^{\mathrm{+}}$ ions.

1. Introduction

Trapped ions remain one of the most promising platforms for the realization of universal quantum processors, offering long coherence times [1,2] and high-fidelity quantum gates necessary for fault-tolerant quantum computing [3,4]. Quantum logic operations have been successfully demonstrated using both single-qubit [5] and entangling two-qubit [6,7] gates with fidelities suitable for implementing error correction protocols. These qubits are typically based on electric-dipole-forbidden transitions, either of optical frequency, such as electric quadrupole transitions [8], or in microwave (MW) domain between hyperfine levels [9], allowing for a remarkably long coherence time on the order of several minutes or even more due to suppressed spontaneous emission [10]. While the optical qubits are operated with carefully tuned lasers, the microwave qubits are also usually controlled using optical Raman transitions to achieve individual addressing [11] and to couple internal states to motional modes [12]. However, this laser-based approach introduces challenges such as photon scattering [13,14] and the need for complex optical alignment when scaling up to larger systems.

Microwave-driven qubit operations offer an attractive alternative, particularly in terms of scalability, system stability, and cost-effectiveness [15,16]. However, implementing precise spatial addressing and strong spin-motion coupling with microwave fields in free space is challenging due to their long wavelengths. To overcome this, methods have been developed to enhance field gradients, either by applying strong magnetic field gradients [17,18,19] or by placing ions near microwave-carrying conductors, leveraging near-field effects [20,21]. This enables precise control over spin-motion coupling through trap-integrated microwave structures. Recent progress in integrating microwave circuitry directly into surface-electrode ion traps has opened new avenues towards realizing scalable quantum processors [16,22]. These microfabricated traps enable high-fidelity quantum gates comparable to those achieved with lasers [15], but with enhanced engineering control. Moreover, planar ion traps provide greater scalability when integrated into the quantum charge-coupled device (QCCD) architecture [23].

In particular, the $\sigma$ transition within the hyperfine manifold can be utilized for microwave-driven quantum operations using chip-integrated conductors [15]. To drive this transition, a patterned conductor layout with shared AC current paths is employed. By displacing the ion perpendicular to the trap axis and applying an alternating current, a time-varying magnetic field is generated at the ion’s position, enabling coherent Rabi oscillations. When applied to a pair of ions, this configuration can induce spin-motion coupling, facilitating entangling gate operations. Additionally, the $\pi$ transition, driven by microwave fields aligned along the quantization axis, can also be employed for qubit manipulation [16,24]. The first experimental realization of a two-qubit gate driven solely by microwave fields was demonstrated in 2009 using a magnetically insensitive $\pi$ transition in a ${}^{25}\mathrm{Mg}^{\mathrm{+}}$ ion [21]. This implementation used a three-conductor layout to generate a microwave magnetic field gradient and achieved a two-qubit gate fidelity of 76% with a gate time of 400 μs. High-fidelity microwave-driven gates were later demonstrated in 2016. In one approach, a static magnetic field gradient was used to entangle ${}^{171}\mathrm{Yb}^{\mathrm{+}}$ ions with 98.5% fidelity and a 2700 μs gate time [25]. In another, a microwave field gradient enabled a 99.7% fidelity gate in ${}^{43}\mathrm{Ca}^{\mathrm{+}}$, albeit with a longer gate time of 3250 μs [5]. A recent study on ${}^9\mathrm{Be}^{\mathrm{+}}$ ions reported a faster two-qubit gate of 99.3% fidelity within 1000 μs [26]. Despite the high fidelity, these microwave-based gates remained significantly slower than optical Mølmer–Sørensen gates, such as those demonstrated with ${}^9\mathrm{Be}^{\mathrm{+}}$ ions in [6]. A major improvement in gate speed was recently reported in [15], wherein a gate duration of 120 μs was achieved. However, this result relied on a magnetically sensitive qubit encoding, which inherently limits the achievable coherence time.

In this work, we numerically investigate planar ion trap configurations with different electrode layouts optimized for fast two-qubit microwave gates using magnetic field gradients, while maintaining qubit encoding on hyperfine splitting. Our goal is to find an optimal parameters to achieve fast gate operation, paving the way for scalable, laser-free quantum computation in trapped-ion systems. Specifically, we focus on two chip configurations with, respectively, a single MW line and two MW lines, and conduct numerical simulations of magnetic field distribution, temperature distribution, and estimate gate operation time. For both ${}^9\mathrm{Be}^{\mathrm{+}}$ and ${}^{40}\mathrm{Ca}^{\mathrm{+}}$ ions, we demonstrate the possibility of achieving a fast two-qubit gate in the order of ten microseconds under realistic experimental conditions, demonstrating the validity of our proposed guideline of chip design.

2. Microwave Trap Designs

Microwave quantum gates require the ability to drive transitions between hyperfine states. These transitions can involve a change in the projection of the total atomic angular momentum, m, by 0 or $\pm 1$. Accordingly, two types of transitions are possible: $\pi$ and $\sigma$ transitions. The $\pi$ transitions preserve the magnetic quantum number ($\Delta m=0$) and are driven by linearly polarized electromagnetic fields aligned with the quantization axis. In contrast, $\sigma$ transitions involve a change of $\Delta m=\pm 1$ and are induced by circularly polarized fields perpendicular to the quantization axis.

An external static magnetic field is applied to lift the degeneracy of the magnetic sublevels of the hyperfine manifold, a prerequisite for implementing microwave-based quantum logic. Typically, this DC magnetic field lies in the plane of the chip, with a significant projection along the x-axis, perpendicular to the ion chain and parallel to the trap surface. To implement a microwave-driven two-qubit gate, it is essential to generate a strong gradient of the oscillating magnetic field component along the x-direction, $\partial B_{\mathrm{MW}}/\partial x$, while minimizing the DC component of the microwave field, $B_{\mathrm{MW}}$, at the ion position. This oscillating magnetic field gradient couples the internal qubit states to the collective motional modes of the ion chain. The strength of this coupling, and hence the effective Rabi frequency, is directly proportional to the magnetic field gradient. Under these conditions, the duration of a microwave-driven two-qubit gate can be estimated as follows:

$${\tau }_{2Q}={\displaystyle \frac{2\pi \sqrt{\hslash m_{\mathrm{ion}}{\omega }_{\sec }}}{\mu \frac{\partial B_{\mathrm{MW},x}}{\partial x}}},$$

(1)

where $m_{\mathrm{ion}}$ is the mass of the ion, ${\omega }_{\sec }$ is the secular frequency of the trapping potential, and $\mu$ is the magnetic dipole matrix element associated with the transition. Therefore, in order to realize a fast two-qubit gate, it is crucial to generate a strong gradient of the oscillating magnetic field while simultaneously nullifying the static component of the microwave field at the ion position [20].

To enable the individual addressing of ions [27], it is necessary to displace specific ions along the x-axis, moving them into regions where the microwave magnetic field component $B_{\mathrm{MW}}$ is non-zero. In these regions, both single- and two-qubit gates can be performed. Such displacement can be achieved using auxiliary DC electrodes integrated into the surface trap design. Furthermore, the microwave magnetic field can be generated using pulsed currents, which provides temporal control, allowing the field to be turned on or off as required during gate operations.

We consider three schemes to generate the conditions required to implement microwave gates (see Figure 1). In all cases, the external static magnetic field is assumed to be aligned along the x-axis. For simplicity and practical feasibility, we only analyze configurations in which the same current flows through each conductor. Using identical currents avoids the need for precise calibration and stabilization of the current amplitude and phase, which would be necessary in more complex configurations with individually controlled conductors.

In the first scheme [15] (Figure 1a), a single current generates a microwave magnetic field parallel to the x-axis at a point above the wire, thus ensuring that $B_y=0$. The gradient $\partial B_y/\partial x$ is non-zero, making this configuration suitable for two-qubit gate operations. However, to drive a $\pi$ transition, the polarization of the field gradient should be aligned with the DC magnetic field direction, which is not the case here. Instead, the resulting polarization is a superposition of ${\sigma }^{+}$ and ${\sigma }^{-}$ components, thus enabling the generation of $\sigma$ transitions with $\Delta m=\pm 1$. The second scheme [16] (Figure 1b) utilizes two currents of equal magnitude flowing in opposite directions, creating a field perpendicular to the trap plane at the center. In this configuration, the polarization of the microwave field gradient aligns with the DC magnetic field, enabling the induction of $\pi$ transitions. The third configuration [22] (Figure 1c) consists of three equidistantly placed wires carrying the same current, which nullifies the AC magnetic field at a specific point. At this point, the gradient of the field along the x–y axes is non-zero, allowing both $\pi$ and $\sigma$ transitions. Simple calculations show that, in the ideal case, the position where the AC field is nulled is located at a distance equal to the spacing between the wires, above the central wire.

3. Materials and Methods

The ion height $h_0$ must be carefully chosen during the trap design process. An increased distance between the electrodes and the ion results in a higher numerical aperture, which facilitates more efficient ion cooling. Furthermore, the ion heating rate decreases rapidly with increased ion height, scaling as $d^{-4}$. As the distance from the dielectric increases, the electric field noise decreases, leading to lower-qubit gate errors. On the other hand, the depth of the potential well decreases with increasing ion height. Moreover, when introducing an MW line for near-field interactions, a smaller distance is preferable, as the impact of the magnetic field is enhanced. As a result, the ion height must be carefully selected to balance these competing factors.

Once the ion-to-electrode distance is fixed, the geometry of the DC and radio-frequency (RF) electrodes must be defined to maintain the desired height. We consider a standard five-rail scheme with DC-RF-DC-RF-DC electrodes. The defined geometry of the trap now allows for the placement of MW lines to drive current. We examine three possible electrode placement schemes, (a) one conductor, (b) two conductors, and (c) three conductors, all with equal current amplitude but flowing in different directions (see Figure 1 and Figure 2).

In design (a), the current flows through the central DC electrode, which is maintained at a potential close to zero. This configuration does not significantly perturb the pseudopotential distribution across the electrodes but generates a magnetic field predominantly along the x-axis (Figure 1d and Figure 2a). In design (b), the central DC electrode is split into two microwave conductors, separated by a gap equal to that between the RF and DC electrodes. This gap minimally distorts the trapping pseudopotential while allowing current to flow in opposite directions through the two MW lines, generating a magnetic field along the y-axis, as illustrated in Figure 1e and Figure 2b. The third design, design (c), has two additional microwave lines located between the RF and outer DC electrodes, as depicted in Figure 1f and Figure 2c. The central electrode is also used as an MW line, forming a three-conductor setup. This configuration allows for the generation of a magnetic field with a null point above the trap surface. Ideally, the zero-crossing of the magnetic field coincides with the minimum of the pseudopotential.

An additional critical consideration in planar trap design is the heating induced by the microwave current. While a higher magnetic field gradient is desirable for faster gate operations, the current is limited by the power dissipation that can be extracted from the chip and the maximum allowable temperature, which is particularly important in a cryogenic environment. Therefore, the electrode dimensions, thermal management capabilities, and maximum operating temperature collectively constrain the allowable current.

With the electrode geometry defined, the next step is to tune the RF voltage parameters—specifically, the amplitude and frequency—in order to achieve the desired stability parameter, secular frequency, and trap depth.

4. Numerical Results

For our numerical simulation, we consider a five-electrode design with the central DC of width $w_c$, two symmetric RF electrodes on the side of width $w_r$, and two outer DC electrodes with a size of 500 μm. The gap between electrodes is 10 μm. We define the grid $(w_c,w_r)\in [30,200]\times [30,200]\mathsf{\mu }\mathrm{m}$ with a 10 μm step for each value (18 × 18 values in total) and calculate the height of ions above the surface with the finite-element method (FEM, COMSOL Multiphysics 6.1). In Figure 3, we can see the dependence between $w_c$ and $w_r$ for $h_0=65\pm 5\mathsf{\mu }\mathrm{m}$ for scheme (a). For other schemes, the dependence is similar since the only difference is the small gaps for the MW lines. Note that it is possible to achieve the same $h_0$ with different configurations of electrodes.

The height of ions can also be qualitatively estimated using an analytic model [28], as follows:

$$h_0={\displaystyle \frac{1}{2}}\sqrt{w_c{w}_r(w_c+2w_r)}.$$

(2)

However, this approach (blue line in Figure 3) does not account for the gaps between electrodes and therefore introduces errors. Consequently, the field distribution and the ion height above the trap are usually computed numerically.

For the next stage, we choose values of $w_c$ and $w_r$ to give $h_0=65\pm 3\mathsf{\mu }\mathrm{m}$. For configurations (a) and (b), the choice of $w_c$ and $w_r$ defines the design uniquely and there are no free parameters. In design (c), we introduced the parameter $w_d$, which corresponds to the width of the two outer MW lines. The aim of this configuration was to have the pseudopotential minima at the same point as the zero point of the AC magnetic field. However, we did not find any solution for ($w_c$, $w_r$, $w_d$) to fulfill this requirement. This happened for the following reason: As mentioned in Section 2, the height of ions above the trap surface is the same as the distance between MW currents for configuration (c). But here, the distance between currents $w_c/2+w_r\approx 80\mathsf{\mu }\mathrm{m}$ defines the magnetic null, which is far beyond the target height of $h_0=65\pm 3\mathsf{\mu }\mathrm{m}$. Thus, in the following discussion we focus on configurations (a) and (b) only.

To determine the upper bound of the current, we conduct heating simulations using FEM (COMSOL Multiphysics). For designs (a) and (b), we calculate the maximum AC current, which is a major heat source. We choose the height of the silicon substrate as 500 μm, and the thickness of the gold electrodes as 500 nm. The temperature at the bottom of the substrate is set to 6 K. We calculate the maximum current that can be used while keeping the temperature below 10 K on the surface of the chip. In our simulation, a harmonic current with constant amplitude is applied to the MW electrodes, and the equilibrium of this system is calculated. The whole power from the MW line is pumped by the cooler at the bottom of the substrate. The pumped power is about 2 W per 1 mm of trap length, which is realistic and accessible in an experimental environment. Also, we consider different forms of current distribution across a single conductor and compare the results with a uniform distribution. The deviation is less than 1%; therefore, in further simulations we assume a uniform distribution of current density in the MW lines. Examples of temperature distribution are presented in Figure 4.

For the next step, we simulate an electromagnetic field and define the height of ions and the gradient of the microwave magnetic field. Examples of magnetic field distribution are presented in Figure 5, wherein the gradient of the microwave magnetic field is presented as a function of the height for both configuration (a) and configuration (b). For a silicon substrate with high resistivity and the geometric parameters considered here, the dielectric loss in silicon and capacitance coupling between electrodes have negligible effects on the field distribution around the ion position. Thus, we do not consider these effects, as in previous works [24,26]. Notice that while the gradient changes significantly with height for both schemes, the variation in (b) is much sharper than that in (a). For higher positions, the width of the MW wire ceases to play a role, since it looks like a single line with a negligible cross-section. However, the resistance of the MW wire decreases with increasing width and allows larger currents to flow. This leads to higher field gradients for wider MW wires. For short distances, the MW wire cannot be considered as a one-dimensional line. In that case, the field gradient becomes smaller for wider MW wires. This is because the current density is lower when spread over a wider surface. Since the field contribution from each wire segment decreases with distance and current density, the electrodes produce a weaker total field.

To gain a better understanding of the simulation result, we perform an analytic estimation of magnetic field gradient and show some typical data for different configurations in Figure 6. For scheme (a), we consider a single wire with current I and calculate the gradient above the wire as ${\displaystyle \frac{\partial B_y}{\partial x}}={\displaystyle \frac{{\mu }_{0}I}{2\pi }}{\displaystyle \frac{1}{y^2}}$. This analytical model agrees well when simulating for a large distance, as the effect induced by the finite size and detailed geometry of the wire becomes negligible. At a small distance, the discrepancy becomes significant (see Figure 6a). For scheme (b), we place two wires with opposite currents $\pm I$ separated by a distance L and calculate the gradient above the middle as ${\displaystyle \frac{\partial B_x}{\partial x}}={\displaystyle \frac{{\mu }_{0}I}{2\pi }}{\displaystyle \frac{2Ly}{(L^2/4+y^2)}}$. The agreement with the numerical simulation is also good at a large distance, as noted in Figure 6b. We further notice that the asymptotical dependence of the field gradient on the distance is different for the two configurations, with ${\displaystyle \frac{\partial B_y}{\partial x}}\propto 1/y^2$ for scheme (a) and $\propto 1/y^3$ for (b).

Furthermore, we stress that the duration of a two-qubit gate depends on the maximum temperature of the chip, since it determines the maximal current, which in turn sets the field gradient that governs the gate time. Therefore, achieving fast two-qubit gates requires the use of a cryogenic setup. Additionally, the substrate acts as an intermediate element between the heat source and the coldfinger of the cryostat, and the chip’s maximum temperature can be reduced by using a substrate with higher thermal conductivity.

Before concluding, we present in

Table 1. Calculated maximal currents, field gradients, and two-qubit gate times for different MW chip configurations.

	(a) Single-Wire Configuration					(b) Two-Wire Configuration
${\mathit{w}}_{\mathit{c}},{\mathit{w}}_{\mathit{r}},$μm	${\mathit{h}}_{\mathbf{0}},$μm	I, A	$\frac{\mathbf{1}}{\sqrt{\mathbf{2}}}{\displaystyle \frac{\partial {\mathit{B}}_{\mathit{y}}}{\partial \mathit{x}}},\frac{\mathit{T}}{\mathit{m}}$	${\mathit{T}}_{\mathbf{2}\mathit{Q}}^{\mathit{Be}},$μs	${\mathit{T}}_{\mathbf{2}\mathit{Q}}^{\mathit{Ca}},$μs	${\mathit{h}}_{\mathbf{0}},$μm	I, A	${\displaystyle \frac{\partial {\mathit{B}}_{\mathit{x}}}{\partial \mathit{x}}},{\displaystyle \frac{\mathit{T}}{\mathit{m}}}$	${\mathit{T}}_{\mathbf{2}\mathit{Q}}^{\mathit{Be}},$μs	${\mathit{T}}_{\mathbf{2}\mathit{Q}}^{\mathit{Ca}},$μs
30, 170	64.4	7.05	230	25	37	62.8	2.88	−86	67	80
30, 180	66.0	7.05	220	27	39	65.2	2.88	−79	74	88
40, 120	63.6	8.36	274	21	31	62.8	3.63	−131	45	53
40, 130	66.0	8.36	250	23	34	64.4	3.63	−122	47	57
50, 90	63.6	9.53	298	20	28	62.8	4.29	−176	33	39
50, 100	66.0	9.53	272	21	31	65.2	4.29	−161	36	43
60, 70	64.4	10.63	300	19	28	64.4	4.89	−216	27	32
70, 50	64.4	11.66	308	19	27	64.4	5.44	−247	24	28
80, 40	66.0	12.64	302	19	28	66.0	5.96	−268	22	26

the maximal currents, gradients of the magnetic fields, and two-qubit gate time for configurations (a) and (b). For each case, we calculate the magnetic field gradient at the ion position. Different schemes yield different gradients, since the current distribution on the surface is different. In configuration (a), with one wire, the induced transition is a $\sigma$ transition, so only the linearly polarized part of the MW field projected on $\sigma$ polarization is considered to obtain the field gradient and gate time. Here, the gate time is calculated both for a ${}^9\mathrm{Be}^{\mathrm{+}}$ ion ($\pi$: $|F=1,m_F=1\rangle \to |F=2,m_F=1\rangle$ and $\sigma$: $|F=1,m_F=0\rangle \to |F=2,m_F=1\rangle$ for hyperfine splitting of the ground state equals 1.25 GHz) in a trap with a secular frequency of 6 MHz, as well as for a ${}^{40}\mathrm{Ca}^{\mathrm{+}}$ ion ($\pi$: $|F=3,m_F=1\rangle \to |F=4,m_F=1\rangle$ and $\sigma$: $|F=3,m_F=1\rangle \to |F=4,m_F=0\rangle$ for hyperfine splitting of the ground state equals 3.1 GHz) in a trap with a secular frequency of 3 MHz.

Notice that in configuration (a), the ion height should be the same as that in a setup without an MW line, because the MW line does not change the structure of the electrodes and the resulting pseudopotential. In configuration (b), however, the height slightly changes due to the gap introduced in the central electrode. This change becomes smaller with increasing $w_c$ since the relative size of the gap becomes smaller. Additionally, the residual AC field is close to zero and is mostly defined by computational error for each set of parameters. In the two-wire setup, the power dissipated from the MW lines is greater since there are two conductors with greater resistance, which leads to smaller currents compared to the single-wire setup. As mentioned before, the value of the magnetic field gradient varies only slightly for configuration (a), but dramatically depends on geometry in configuration (b). This suggests that a proper choice of trap design can significantly decrease the two-qubit gate time.

5. Conclusions

In this work, we provide a guideline for the design of a planar ion trap for fast microwave gates. We consider a single-wire setup, which induces a $\sigma$ transition, and a double-wire configuration for a $\pi$ transition. For a wide range of heights, the values of the MW magnetic field gradient are comparable for both configurations. The width of the MW line plays a key role by defining the limits of maximal current without a severe heating effect. Generally, the height of the ion can be adjusted by varying the width of the RF electrodes, which do not interfere with the gradient of the magnetic field. As a concrete example, we show that a fast two-qubit gate with an operation time in the order of ten microseconds can be achieved for both configurations for ${}^9\mathrm{Be}^{\mathrm{+}}$ and ${}^{40}\mathrm{Ca}^{\mathrm{+}}$ ions, with a reasonable height and secular frequency.