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Open AccessFeature PaperArticle

Analysis of Entropy in a Hardware-Embedded Delay PUF

Department of Electrical and Computer Engineering, University of New Mexico, Albuquerque, NM 87131, USA
Department of Electrical and Computer Engineering, Florida Institute of Technology, Melbourne, FL 32901, USA
Authors to whom correspondence should be addressed.
Academic Editor: Kwangjo Kim
Cryptography 2017, 1(1), 8;
Received: 27 February 2017 / Revised: 24 May 2017 / Accepted: 2 June 2017 / Published: 7 June 2017
(This article belongs to the Special Issue PUF-Based Authentication)
The magnitude of the information content associated with a particular implementation of a Physical Unclonable Function (PUF) is critically important for security and trust in emerging Internet of Things (IoT) applications. Authentication, in particular, requires the PUF to produce a very large number of challenge-response-pairs (CRPs) and, of even greater importance, requires the PUF to be resistant to adversarial attacks that attempt to model and clone the PUF (model-building attacks). Entropy is critically important to the model-building resistance of the PUF. A variety of metrics have been proposed for reporting Entropy, each measuring the randomness of information embedded within PUF-generated bitstrings. In this paper, we report the Entropy, MinEntropy, conditional MinEntropy, Interchip hamming distance and National Institute of Standards and Technology (NIST) statistical test results using bitstrings generated by a Hardware-Embedded Delay PUF called HELP. The bitstrings are generated from data collected in hardware experiments on 500 copies of HELP implemented on a set of Xilinx Zynq 7020 SoC Field Programmable Gate Arrays (FPGAs) subjected to industrial-level temperature and voltage conditions. Special test cases are constructed which purposely create worst case correlations for bitstring generation. Our results show that the processes proposed within HELP to generate bitstrings add significantly to their Entropy, and show that classical re-use of PUF components, e.g., path delays, does not result in large Entropy losses commonly reported for other PUF architectures. View Full-Text
Keywords: entropy analysis; physical unclonable function; authentication entropy analysis; physical unclonable function; authentication
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MDPI and ACS Style

Che, W.; Kajuluri, V.K.; Martin, M.; Saqib, F.; Plusquellic, J. Analysis of Entropy in a Hardware-Embedded Delay PUF. Cryptography 2017, 1, 8.

AMA Style

Che W, Kajuluri VK, Martin M, Saqib F, Plusquellic J. Analysis of Entropy in a Hardware-Embedded Delay PUF. Cryptography. 2017; 1(1):8.

Chicago/Turabian Style

Che, Wenjie; Kajuluri, Venkata K.; Martin, Mitchell; Saqib, Fareena; Plusquellic, Jim. 2017. "Analysis of Entropy in a Hardware-Embedded Delay PUF" Cryptography 1, no. 1: 8.

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