The Development and Experimental Implementation of an Open Mechatronic Drive Platform for a BLDC Servomotor in an Industrial Robotic Axis

Abstract

This paper presents an open-architecture mechatronic drive platform for operating a three-phase BLDC servomotor in an industrial robotic axis. A sequential and iterative mechatronic design methodology is adopted, integrating electronic design, digital control, mechanical development, and experimental prototyping, with emphasis on open-loop operation. The electronic circuit was designed using schematics and a PCB and validated in Proteus Design Suite 8.15 (Labcenter Electronics Ltd., London, UK) to verify switching sequences and inverter behavior. The power stage is based on a six-switch insulated-gate bipolar transistor (IGBT) inverter module, complemented by an independent snubber protection board and a dedicated digital gate-drive control board. The mechanical enclosure was designed using computer-aided design (CAD), CAD software tools (Shapr3D, version 5.911.0 (9224), Shapr3D Zrt., Budapest, Hungary), and fabricated via 3D printing. Switching behavior was simulated in Octave using parameters from a real industrial BLDC servomotor (Yaskawa SGMAH series) extracted from a Motoman robotic axis. The contribution is design-oriented in a mechatronic engineering sense, emphasizing accessibility, openness, and experimental enablement of industrial drive hardware rather than control-performance optimization. An industrial Yaskawa BLDC servomotor from the Motoman robot is used to determine switching sequences and safe operating parameters. Experimental open-loop tests were conducted by directly commanding the six inverter switching sectors, resulting in the stable synchronous rotation of the motor on the developed electromechanical platform.

1. Introduction

Industrial robots are a core component of modern manufacturing systems, enabling precision, repeatability, and safety in tasks such as welding, machining, assembly, and painting [1,2,3]. In parallel, academic interest in modeling and control has grown substantially. However, experimental studies on real industrial robots remain limited in academic environments due to cost, restricted access to internal control architectures, and proprietary servo systems [4,5,6,7,8].

Several studies have addressed the modeling and control of the AC, Permanent Magnet Synchronous Motor (PMSM), and trapezoidal back-emf brushless DC (BLDC) motors used in robotic applications. Performance limits in servo drive selection and optimization have been extensively analyzed in the literature [9,10]. Advanced field-oriented control, vector control, and Space Vector Pulse Width Modulation (SVPWM)-based strategies have been extensively studied for electric drives [11,12,13,14,15]. Open-architecture robot controllers have also been explored as an alternative to proprietary systems, enabling flexible control and experimental access [16,17,18]. Additionally, recent research emphasizes the importance of accessibility and affordability in robotics through low-cost, frugal, and open-source platforms for education and research [19,20]. Despite these advances, most reported developments focus either on high-performance closed-loop control using commercial servo platforms or purely numerical simulations without full experimental realization on real industrial robotic systems [8,21]. Moreover, only a limited number of studies report the complete mechatronic development process, including electronic design, power-electronics integration, mechanical enclosure fabrication, open firmware access, and experimental validation under an open-architecture philosophy [17].

In general, the constraints include limited access to proprietary industrial controllers, high cost of commercial servo drives, and the need for safe experimental operation under open-loop conditions [4,5,6]. Consequently, the design process prioritizes open access to drive signals, modular hardware architecture, low implementation cost, and experimental transparency, which are critical requirements for educational and research-oriented platforms [20].

Based on the above-mentioned, this work presents the system-level engineering design and experimental implementation of an open-architecture, frugal mechatronic drive platform aimed at accessibility and experimental enablement of an industrial BLDC servomotor in a robotic axis. The system is fully open in terms of hardware, firmware, and control strategy, allowing for complete access to switching signals, power stages, and operating parameters, in contrast with commercial closed servo drives [17]. The platform is based on a low-cost digital controller with a ESP32-class microcontroller (Espressif Systems, Shanghai, China), a six-switch IGBT inverter module, and a modular power electronics structure, following a frugal engineering philosophy [20,21]. The servomotor under study corresponds to a real Yaskawa SGMAH series BLDC motor (Yaskawa Electric Corporation, Fukuoka, Japan) extracted from a Motoman industrial robot [6]. Then, experimental open-loop tests were performed by directly commanding the six inverter switching sectors, resulting in stable synchronous rotation of the motor on the developed electromechanical platform and thereby validating the correct operation of the proposed open-architecture system.

It is important to emphasize that the novelty of this work lies in accessibility, openness, and the experimental implementation of industrial drive hardware, rather than in control-theoretic performance improvement or algorithmic optimization. Specifically, the contribution is the mechatronic system-level engineering design of a frugal open-architecture platform that exposes low-level switching signals and power-electronics stages for safe experimental operation of a real industrial-grade hardware.

Main Contributions

The main contributions are as follows:

• Experimental implementation of an open-architecture, frugal drive platform that exposes low-level switching signals and power-stage access for an industrial BLDC servomotor.
• System-level engineering design of a modular architecture that uses an ESP32-class controller, PC923-based optically isolated gate-drive channels, a six-switch IGBT inverter module, and a dedicated protection layer (snubber/transient suppression).
• Safety-oriented staged procedure for open-loop experimental operation, including power-domain separation, galvanic isolation, and limited duty-cycle excitation.
• Validation on real industrial hardware, by using an experimental open-loop, six-step commutation to drive a Yaskawa SGMAH servomotor extracted from a Motoman robotic axis.

This paper is organized as follows. Section 2 describes the proposed sequential and iterative mechatronic design methodology. Section 3 presents the electronic and power system architecture. Section 4 details the mechanical integration and experimental implementation. Section 5 discusses the experimental results, and Section 6 states the main conclusions and offers insights for future work.

2. Mechatronic Design Methodology

To develop an open-architecture, frugal mechatronic drive platform, we propose an open-loop drive system for commanding an industrial robotic axis. The motivation for this aligns with the well-known limitation that commercial industrial robots typically provide a closed internal architecture, restricting access to internal signals, wiring, and control layers, hindering experimental research and educational replication in academic labs. In this context, opening up the architecture becomes a necessary step to enable experimentation on real industrial actuators and power stages. In this work, the target actuator is a three-phase BLDC servomotor extracted from a Motoman robotic arm (Yaskawa SGMAH series), which represents a realistic industrial scenario under proprietary-drive constraints.

A diagram of the proposed mechatronic design process is shown in Figure 1. According to the proposed workflow, a sequential–iterative mechatronic design process is adopted to implement the proposed open-architecture, frugal drive platform. In contrast to purely component-oriented approaches, the proposed methodology emphasizes the structured integration of system requirements, electronics, power-stage design, digital logic components, mechanical integration, and experimental validation, while maintaining low cost and full access to low-level switching signals. The proposed method explicitly enables iterative refinement between stages, allowing for design corrections based on simulation outcomes and experimental observations [17,18]. The iteration is explicitly triggered by verification outcomes at each stage; if predefined electrical or safety limits are exceeded, the design reverts to the previous stage for refinement before further experimental escalation.

Table 1. Conceptual alignment of proposed mechatronic design methodology with regard to other frameworks.

Aspect	V-Model/VDI 2206	Proposed Methodology
Design philosophy	System engineering with verification loops	System-level mechatronic engineering with experimental accessibility focus
Disciplinary integration	Mechanical, electrical, and software co-design	Integrated electronics, power stage, control logic, and mechanical enclosure
Iteration mechanism	Formal verification and validation stages	Iterative refinement driven by electrical and safety acceptance criteria
Validation focus	Functional and performance compliance	Safe open-loop experimental operation
Control strategy	Typically closed-loop, performance-oriented	Explicitly open-loop, transparency-oriented
Industrial constraints	Certification and product deployment	Educational and research experimentation

summarizes the conceptual alignment between the proposed methodology and other established mechatronic design frameworks, such as the V-model and VDI 2206. Similar to these frameworks, the methodology emphasizes requirement definition, system decomposition, implementation, and validation. However, the proposed methodology prioritizes experimental accessibility, open-loop safety, and incremental hardware validation.

2.1. First Stage: System Requirements and Constraints

The proposed sequential–iterative mechatronic design methodology is conceptually aligned with established system engineering frameworks such as the V-model and the VDI 2206 guideline for mechatronic system design. Similar to these frameworks, the methodology emphasizes requirement definition, interdisciplinary system integration, and verification at each development stage. Unlike performance-oriented industrial development processes, the proposed methodology prioritizes experimental accessibility, open-loop safety, and incremental hardware validation. As a result, iteration drives conservative acceptance criteria at the power-electronics and switching levels rather than by closed-loop performance metrics.

As a reference architecture for the power and gate-driving stages, the proposed platform adopts the general electronic structure recommended in the manual application of the PC923 optically isolated gate driver (Sharp Corporation, Osaka, Japan), which is widely used in industrial inverter systems. This reference configuration defines a clear separation between the low-voltage digital control domain, the isolated gate-driver stage, and the high-voltage inverter bridge. For a clear diagram and information about the configuration, please refer to [22].

In this work, the PC923 reference topology is not replicated verbatim but rather serves as a guiding framework for defining design constraints, selecting components, and developing protection strategies under a frugal, open-architecture philosophy. Based on this structure, a modular gate-driving and inverter system is developed to enable direct access to switching signals and commutation sequences, supporting open-loop operation and experimental validation on a real industrial servomotor. These requirements are derived from the characteristics of industrial robotic applications, the limitations imposed by proprietary commercial drives, and the need for safe and reproducible experimentation in academic environments. Then, to structure this stage, the requirements are grouped into four sub-stages: (i) power supply definition, (ii) actuator and inverter constraints, (iii) open-loop safety constraints, and (iv) open-architecture and frugal design requirements.

2.1.1. Power Supply Definition

Multiple independent supply domains are established to decouple low-level control electronics from high-power switching dynamics and to ensure safe and repeatable open-loop commutation tests. In particular, the platform includes the following.

Regulated +5 V domain. Dedicated to the microcontroller, digital logic, and signal conditioning, as shown in Figure 2. The low-voltage domain provides regulated rails for the microcontroller-based control unit and isolated gate-driver interfaces, while the DC-link domain supplies the three-phase inverter bridge. This partitioning strategy is consistent with industrial drive design practices and supports safe incremental testing during early experimental stages.

Isolated (floating) auxiliary supplies used to power the gate-driver stages (e.g., $\pm 15$ V rails, depending on the driver requirements), as shown in Figure 3, enabling proper gate drive levels while maintaining galvanic isolation between control and power.

High-power DC-link domain supply. The high-power DC-link domain supplies power to the three-phase inverter and the BLDC servomotor. This domain is provided by a programmable switched-mode power supply (commercial laboratory DC power supply) rated at 10 A with an adjustable output voltage range of 0–100 V.

2.1.2. Actuator and Inverter Constraints

The actuator is a three-phase industrial BLDC servomotor extracted from a Motoman robotic arm (Yaskawa SGMAH series). This motor represents a realistic industrial case study, originally intended to operate with a proprietary servo amplifier that restricts access to internal commutation, modulation, and protection layers.

The proposed platform must generate inverter switching commands compatible with a standard three-phase, six-switch topology, as is illustrated in Figure 1. The design explicitly supports sector-based commutation (six-step operation), allowing for the direct control of the upper and lower switching devices for phases U, V, and W. This constraint enables the validation of inverter operation and electromechanical coupling without relying on embedded proprietary firmware.

The servomotor parameters are reported in accordance with the Yaskawa SGMAH series documentation. Since multiple variants exist within the SGMAH family, only general specifications relevant to inverter-level operation are listed, in

Table 2. Main specifications of the Yaskawa SGMAH-A3A1A servomotor.

Parameter	Value (SGMAH-A3A)
Voltage class	200 V
Rated output power	0.03 kW
Rated torque (continuous)	0.0955 N·m
Instantaneous peak torque	0.286 N·m
Rated current (rms)	0.44 A
Instantaneous max. current (rms)	1.3 A
Rated speed	3000 rpm
Max. speed	5000 rpm
Torque constant	0.238 N·m/A (rms)
Rotor inertia J	$0.0166\times {10}^{-4}$ kg·m2

, which is sufficient for the open-loop experimental validation presented. The motor-winding configuration is specified by the manufacturer as star-connected without a neutral and was experimentally verified by phase-to-phase resistance and continuity measurements.

2.2. Second Stage: Electronic and Power-Stage Design

Electronics design is organized from a system-level perspective, with board-level implementation (component selection, PCB partitioning, and protection) while preserving open-architecture and frugal constraints.

System-Level Architecture and Modular Partitioning

Figure 4 describes the proposed global electronic architecture as four functional parts as follows. First, a low-cost digital controller (ESP32-class) that generates sector commutation commands; second, an isolated gate-driver stage that converts logic-level commands into robust gate-drive signals; third, a three-phase power inverter stage (six-switch bridge implemented with an industrial IGBT module); and a protection and filtering layer including snubber/transient suppression networks and measurement/test points for safe experimentation.

Power domains and signal isolation architecture. Separating the logic-level control, isolated gate driving, and high-power conversion stages is a key step toward ensuring safe, reproducible operation under open-loop conditions.

The low-voltage domain supplies the digital control unit, implemented using an ESP32-class microcontroller, which generates logic-level commutation and PWM signals. These signals are intentionally kept electrically isolated from the power stage to mitigate electromagnetic interference and prevent fault propagation during high-frequency switching events.

Optical isolation and gate-drive structure based on PC923. It is implemented using a gate-drive structure inspired by the manufacturer’s application manual [22]. These optically isolated gate drivers enable each switching device to operate with a local reference ground, which is particularly critical for the upper switches of the three-phase inverter. This approach eliminates common-mode coupling between phases and enables precise control of switching transitions under open-loop operation.

Three-phase inverter and open-loop commutation constraints. Figure 5 presents the detailed six-switch three-phase inverter topology adopted in this work. The inverter consists of three half-bridges, U, V, and W, one for each phase, supplied by a programmable high-voltage DC link. The DC-link voltage is supplied by a programmable switched-mode power supply (commercial laboratory DC power supply) rated at 10 A with an adjustable output voltage range of 0–100 V. This configuration enables gradual inverter energization during experimental tests, which is essential when operating industrial servomotors in an open loop without embedded current or torque regulation.

Open-loop commutation is implemented using predefined six-step switching sequences, where complementary switches are never activated simultaneously. Dead-time enforcement, limited-duty-cycle operation, and incremental voltage ramping are applied to prevent shoot-through, overcurrent, and excessive electromagnetic stress. The resulting architecture must allow for direct access to individual gate signals, modular replacement of subsystems, and incremental validation of the inverter operation before motor coupling. The detailed implementation of this stage is presented in Section 3.

Quantitative and iteration criteria were defined at the system and power-electronics levels. These criteria explicitly determine when the design advances to the next stage or reverts to a previous one for refinement, in alignment with structured system-engineering frameworks. These criteria should be adjusted according to motor parameters, explicit electrical and thermal thresholds, ensuring that each iteration loop is driven by measurable conditions rather than descriptive assessment alone.

Table 3. Iteration and acceptance criteria governing the proposed sequential–iterative methodology.

Design Layer	Verification Variable	Iteration Rule
Digital control logic	Complementary switching	If overlap is detected → redesign timing/dead-time parameters.
Gate-drive interface	Gate voltage integrity	If gate levels exceed driver limits → revise isolation supply or driver topology.
Power inverter	DC-link stress	If DC-link voltage/current exceeds predefined safe margins→ revert to the previous test level.
Electromechanical coupling	Phase current growth	If current exceeds motor or inverter limits → reduce excitation or redesign switching strategy.
Thermal behavior	Temperature rise	If thermal margin is violated → halt experiment and improve cooling or duty profile.
System integration	Functional repeatability	If behavior is non-repeatable across runs → refine wiring, grounding, or isolation strategy.

summarizes the iteration and acceptance criteria used to govern the proposed sequential–iterative methodology.

2.3. Third Stage: Switching Strategy and Open-Loop Control Definition

The third stage of the proposed methodology defines the switching and commutation strategy for energizing the industrial BLDC servomotor under open-loop conditions, namely as a deterministic and safe excitation sequence that enables experimental validation of the power electronics and electromechanical coupling. A classical six-step (trapezoidal) commutation strategy is adopted, which is well-suited for three-phase BLDC and PMSM drives operating in an open-loop configuration. In this approach, only two inverter switches are actively driven at any given time, one upper and one lower device, while the third phase remains floating. This configuration minimizes switching complexity and allows for direct control of the inverter switching signals.

Figure 6 shows the six-step commutation cycle implemented in this work. Also, it shows the logical switching states of the six inverters (T1–T6), the corresponding phase excitation sequences for phases U, V, and W, and the temporal progression of the commutation steps. Each step corresponds to a 60° electrical interval, resulting in a complete electrical cycle composed of six discrete switching states.

Although the back-electromotive force (back-EMF) waveforms are shown in Figure 6 for reference, no back-EMF sensing or zero-crossing detection is used in the proposed platform. Instead, commutation is performed purely based on predefined timing sequences generated by the digital control unit. This choice is consistent with the platform’s open-loop nature and provides complete transparency into the switching process.

Rather than relying on embedded commercial firmware or closed-loop current regulation, the methodology adopts explicit sector-based commutation implemented at the digital control level.

Industrial Case Study: Yaskawa SGMAH-A3A1A Servomotor. A diagram of the industrial BLDC servomotor selected as the case study is taken from [23]. The actuator corresponds to a Yaskawa SGMAH-A3A1A servomotor extracted from a Motoman robotic arm, representative of industrial robotic axes commonly deployed in manufacturing environments. However, the motor was designed to operate with proprietary Yaskawa servo amplifiers that integrate internal current and encoder communication, velocity and position control loops, and embedded protection and commutation logic. Consequently, direct access to low-level switching signals, power stages, and commutation timing is usually restricted in standard industrial operation. Then, the experimental validation focuses exclusively on open-loop operation.

The use of a real industrial servomotor, rather than a laboratory-scale BLDC machine, constitutes a key contribution of this work. It demonstrates that the proposed frugal, open-architecture platform can safely energize and commutate an industrial-grade actuator originally designed for closed, proprietary control, thereby bridging the gap between academic experimentation and real industrial hardware.

2.4. Fourth Stage: Mechanical Integration and Experimental Validation

The final stage of the methodology addresses mechanical integration and experimental validation of the complete mechatronic platform, as shown in Figure 7. CAD models were developed for the physical enclosures that house the cases. This stage includes the physical CAD assembly of the electronic subsystems in a mechanical mounting case, including the voltage sources and the PCB of the logical electronics that controls the experimental setup, so that it is suitable for open-loop testing.

Another case was designed via CAD for the transformers of each source for the low-voltage power supplies, including the regulated digital control supply and the floating auxiliary supplies used for the isolated gate-driver stages. The enclosures were designed to physically separate low-level electronics from high-voltage components, reducing electromagnetic interference and improving operational safety during open-loop commutation experiments.

The modular enclosure strategy aligns with the frugal, open-architecture philosophy of the proposed platform. Each functional block—digital control, isolated gate-drive supplies, and high-voltage DC-link interface—is housed in an independent case, allowing for incremental assembly, testing, and replacement without affecting the overall system. This approach also facilitates visual inspection, manual probing, and educational demonstration of the internal structure of an industrial-grade drive system.

3. Power Electronics and Gate-Drive Architecture

This section describes the electronic architecture of the proposed open-architecture drive platform, focusing on the power-electronics structure, gate-drive isolation strategy, and DC-link configuration used to operate the industrial BLDC servomotor in open-loop mode.

The star-winding configuration without a neutral, as specified by the manufacturer and identifiable from the motor lead arrangement, was also experimentally verified using a digital multimeter (Steren Electrónica, S.A. de C.V., Mexico City, Mexico) by measuring the phase-to-phase resistances, which exhibited similar values ($R_{ab}\approx R_{bc}\approx R_{ca}$), and by confirming the absence of continuity to a neutral point, consistent with a star-connected stator winding.

Then, the design follows the requirements and constraints defined in Section 2 and is oriented toward safe, transparent, and reproducible experimentation rather than closed-loop performance optimization.

The digital control unit, implemented with an ESP32-class microcontroller, generates the logical commutation signals for the predefined six-step switching sequence. These signals are transferred to the power stage through optically isolated gate-driver circuits, ensuring galvanic isolation between low-voltage control electronics and the high-voltage inverter. The three-phase inverter directly energizes the industrial BLDC servomotor phases U, V, and W through a protected DC-link interface.

3.1. Gate-Drive Isolation and PC923-Based Driver Design

Gate-drive isolation is a critical requirement for safe operation of high-voltage industrial motor drives, particularly under open-loop conditions where protection layers are intentionally simplified. In this work, optical isolation is implemented by using the PC923 optocoupler-based gate-driver circuits, following the manufacturer’s application guidelines [22], as shown in Figure 8. Each inverter switch (T1–T6) is driven by an independent optically isolated gate-driver channel. The PC923 devices offer high common-mode transient immunity and fast switching, enabling reliable operation at the switching frequencies required for BLDC commutation. Floating auxiliary power supplies are used to energize each gate-driver stage, enabling proper gate-to-emitter voltage control while maintaining electrical isolation from the control ground.

This approach mirrors industrial gate-drive practices while maintaining a frugal and accessible implementation. By explicitly separating gate-drive power domains and avoiding integrated proprietary driver modules, full access to individual gate signals is preserved, supporting detailed experimental observation and manual verification.

3.2. Three-Phase Inverter and DC-Link Configuration

The power stage is implemented as a conventional three-phase, six-switch inverter suitable for BLDC and PMSM operation. The inverter interfaces directly with the industrial servomotor windings via terminals U, V, and W. Each phase leg consists of an upper and a lower switching device, with antiparallel freewheeling diodes.

Although the Yaskawa SGMAH-A3A1A servomotor’s rated power is relatively low (30 W nominal), the inverter stage was implemented with an industrial six-switch IGBT module rather than MOSFET-based devices. This selection was governed by several design criteria aligned with the experimental scope of this work: (i) compatibility with the 200 V voltage class of the industrial servomotor, (ii) high robustness and short-circuit withstand capability under open-loop operation, (iii) availability of modular industrial IGBT inverter blocks suitable for laboratory use, and (iv) pedagogical transparency, enabling direct observation of gate-drive, isolation, and power-stage behavior. The selection prioritizes safe experimental operation and hardware accessibility over minimizing switching losses, consistent with the open-loop, exploratory nature of the proposed platform.

3.3. RC Snubber Network

To mitigate voltage overshoot and switching-induced stress, a classical series-$RC$ snubber network was incorporated as a protection-oriented element, as shown in Figure 9. The snubber is connected at the inverter switching node and operates in conjunction with the antiparallel diode of each IGBT. Its purpose is to damp the parasitic resonance formed by the effective stray inductance $L_{\sigma }$ of the commutation loop (module leads, wiring, and PCB layout) and the snubber capacitance C. In the following analysis, the snubber resistance and capacitance shown in Figure 9 are denoted as $R\equiv R_{\mathrm{snub}}$ and $C\equiv C_{\mathrm{snub}}$ for compactness. The corresponding natural frequency $f_0$ is given by

$$f_0={\displaystyle \frac{1}{2\pi \sqrt{L_{\sigma }C}}}.$$

(1)

A widely used practical damping rule for series-$RC$ snubbers is to select the resistor close to the “near-critical” value,

$$R\approx \sqrt{{\displaystyle \frac{L_{\sigma }}{C}}}⟺L_{\sigma }\approx R^{2}C,$$

(2)

which provides effective attenuation of oscillatory transients without excessive power dissipation.

In this work, the snubber elements were selected as $R=1\mathrm{\Omega }$ (2 W) and $C=25\mathrm{nF}$ (300 V rating). By substituting these values into to (2), the implied effective stray inductance is

$$L_{\sigma }\approx {\left(1\mathrm{\Omega }\right)}^2\left(25\mathrm{nF}\right)=25\mathrm{nH},$$

(3)

which is consistent with compact inverter power loops. The associated time constant $\tau$ is

$$\tau =RC=\left(1\mathrm{\Omega }\right)\left(25\mathrm{nF}\right)=25\mathrm{ns},$$

(4)

indicating that the snubber operates at nanosecond time scales, where voltage overshoot and high $\mathrm{d}v/\mathrm{d}t$-related ringing typically occur.

Substituting $L_{\sigma }=25\mathrm{nH}$ and $C=25\mathrm{nF}$ into the resonance expression (1) yields

$$f_0\approx {\displaystyle \frac{1}{2\pi \sqrt{\left(25\mathrm{nH}\right)\left(25\mathrm{nF}\right)}}}\approx 6.37\mathrm{MHz},$$

(5)

confirming that the snubber is designed to damp high-frequency parasitic oscillations in the MHz range, as expected for inverter commutation transients, rather than the PWM fundamental frequency.

Under the experimental constraints of this platform ($V_{dc}\le 100\mathrm{V}$ and $f=15\mathrm{kHz}$), the estimated average dissipation in the snubber resistor, $P_R$, is

$$P_R\approx {\displaystyle \frac{1}{2}}C{V}^{2}f=\frac{1}{2}(25\times {10}^{-9})\left({100}^2\right)(15,000)\approx 1.875\mathrm{W},$$

(6)

thereby justifying the selected 2 W resistor rating. The snubber component values were determined through incremental experimental testing using commercially available (off-the-shelf) components, while remaining quantitatively consistent with realistic stray-inductance damping and safe power dissipation within the intended operating range.

The snubber and transient suppression stage is therefore incorporated as a protection-oriented element rather than an analytically optimized network. The absence of abnormal switching behavior and the stable experimental operation observed validate its effectiveness within the scope of the proposed open-architecture platform.

3.4. Open-Loop Operation and Safety Considerations

This work does not aim to optimize switching losses or thermal efficiency, as the primary objective is to enable experimental testing of industrial hardware under open-loop conditions. Instead of analytical loss modeling, conservative operational constraints are enforced, including limited duty-cycle excitation, staged DC-link voltage ramping, and continuous empirical thermal monitoring of the inverter module and heat sink. These measures ensure safe operation during experimental validation while preserving architectural transparency.

Table 4. Values for quantitative iteration and acceptance criteria used in the case study.

Design Stage	Criterion	Acceptance Condition
Digital control	Complementary gating and dead-time	No overlap between complementary devices; enforced dead-time $t_{dt}\ge 1\mathsf{\mu }$s (ESP32 PWM).
Gate-drive stage	Gate-drive levels	$V_{GE}\approx +15$ V (ON) and $V_{GE}\approx -15$ V (OFF) within auxiliary supply tolerance ($\pm 10\%$).
Inverter stage	DC-link energization (open-loop)	Programmable DC-link limited to $V_{dc}\le 100$ V; staged ramp in steps $\Delta V=10$–20 V with hold time ≥5 s per step.
Power electronics	Current limitation (motor/spec-based)	Conservative operating limit $I_{\mathrm{rms}}\le 0.44$ A (rated); allows for a short transient up to $I_{\mathrm{rms}}\le 1.3$ A (max) only for brief verification; stop test if $I>1.3$ A.
Open-loop commutation	Duty cycle escalation rule	Start with $d=10\%$; increase in $\Delta d=5$–$10\%$ up to $d\le 80\%$ only if current and temperature criteria remain satisfied at each $V_{dc}$ step.
Switching safety	Shoot-through prevention	No abnormal DC-link current spikes at switching transitions; any evidence of shoot-through ⇒ return to gate-drive/dead-time tuning.
Thermal safety	Heatsink/module temperature	Measured with IR thermometer/thermocouple: $T_{\mathrm{hs}}\le 80 °\mathrm{C}$ (continuous); stop test if $T_{\mathrm{hs}}\ge 90 °\mathrm{C}$ or rapid rise >$2 °\mathrm{C}/\mathrm{s}$.

lists the methodology-level criteria for the Yaskawa SGMAH-A3A1A industrial servomotor case study.

All experimental tests conducted with the proposed platform operate in open-loop conditions, with no current, position, or speed feedback. Consequently, several conservative design and operational measures are adopted to ensure safe operation. In future work, we are going to include sensing and monitoring as the next phase of the proposed platform. These include fixed commutation timing, limited duty-cycle excitation, enforced non-overlap between complementary switches, and controlled DC-link voltage ramping.

The modular architecture of the drive allows individual subsystems—control logic, gate drivers, inverter, and power supplies—to be tested independently before full system integration. This staged validation strategy reduces the risk of catastrophic failure and aligns with the sequential–iterative methodology described in Section 2.

The resulting architecture provides a transparent and experimentally accessible platform for studying industrial BLDC drive behavior at the power-electronics level, bridging the gap between purely simulated models and proprietary industrial servo drives.

3.5. Mathematical Formulation of Open-Loop BLDC Commutation

To formally describe the open-loop excitation strategy adopted in this work, a simplified electrical model of a three-phase BLDC servomotor is considered. Each stator phase is represented by a series resistance $R_s$, an inductance $L_s$, and a back-electromotive force (back-EMF) source. Under open-loop conditions, mechanical dynamics and torque regulation are not explicitly controlled; instead, the electrical excitation is predefined as a function of time.

The per-phase voltage equations can be expressed as

$$v_a=R_s{i}_a+L_s{\displaystyle \frac{d{i}_a}{dt}}+e_a,$$

(7)

$$v_b=R_s{i}_b+L_s{\displaystyle \frac{d{i}_b}{dt}}+e_b,$$

(8)

$$v_c=R_s{i}_c+L_s{\displaystyle \frac{d{i}_c}{dt}}+e_c,$$

(9)

where $v_{a,b,c}$ and $i_{a,b,c}$ denote the phase voltages and currents, respectively, and $e_{a,b,c}$ represent the back-EMF components. For BLDC machines, the back-EMF is commonly approximated by trapezoidal waveforms that are functions of the electrical rotor angle ${\theta }_e$:

$$e_a=K_{b}f\left({\theta }_e\right),e_b=K_{b}f({\theta }_e-\frac{2\pi }{3}),e_c=K_{b}f({\theta }_e+\frac{2\pi }{3}),$$

(10)

where $K_b$ is the back-EMF constant and $f(·)$ is a normalized trapezoidal function [13,14].

Since the motor is assumed to be star-connected without a neutral wire, the phase currents satisfy the constraint

$$i_a+i_b+i_c=0.$$

(11)

In the proposed open-loop framework, the electrical angular speed ${\omega }_e$ is imposed by the commutation timing, such that

$${\theta }_e\left(t\right)={\omega }_{e}t,$$

(12)

without requiring rotor position sensing or estimation.

3.6. Switching Vector and Inverter Voltage Model

The three-phase inverter is modeled as a two-level voltage-source inverter composed of six controlled switches. Let the binary switching vector

$$\mathbf{S}=\left[\begin{array}{c}{S}_a\\ S_b\\ S_c\end{array}\right],S_x\in \{-1,0,+1\}$$

(13)

where $S_x$ relates to the conduction state of each phase leg and $x=\{a,b,c\}$ where $S_x=+1$ denotes connection to the positive DC rail, $S_x=-1$ denotes connection to the negative rail, and $S_x=0$ corresponds to a floating phase: a, b, or c.

Under this definition, the phase voltage vector ${\mathbf{v}}_{abc}$, with respect to the DC-link midpoint of the total high-voltage supply $V_{dc}$ for the inverter, is given by

$${\mathbf{v}}_{abc}={\displaystyle \frac{V_{dc}}{2}}\left[\begin{array}{c}{S}_a\\ S_b\\ S_c\end{array}\right].$$

(14)

In six-step commutation, the switching vector $\mathbf{S}$ takes one of six discrete values $k=[1,2,3,4,5,6]$, as shown in Figure 6. Then, each step k corresponds to a 60° electrical interval (from 60° to 360°), and then returns to the first step $k=1$ (60°), and so on, as follows:

$${\mathbf{S}}_k\in \left\{\left[\begin{array}{c}+1\\ -1\\ 0\end{array}\right],\left[\begin{array}{c}+1\\ 0\\ -1\end{array}\right],\left[\begin{array}{c}0\\ +1\\ -1\end{array}\right],\left[\begin{array}{c}-1\\ +1\\ 0\end{array}\right],\left[\begin{array}{c}-1\\ 0\\ +1\end{array}\right],\left[\begin{array}{c}0\\ -1\\ +1\end{array}\right]\right\}.$$

(15)

This formulation provides a direct and transparent mapping between the digital commutation logic and the applied inverter voltages, which is essential for open-architecture experimental platforms. This switching logic directly maps to the inverter gate signals, enabling explicit control of the switching sequence for experimental validation.

3.7. Open-Loop Excitation

Although the commutation sequence is defined at the switching vector level, pulse-width modulation (PWM) is used to generate the gate signals applied to the inverter switches. In the proposed platform, PWM is used as a carrier-based signal-generation mechanism rather than a closed-loop modulation strategy.

Let $d\in [0,1]$ denote a fixed duty ratio applied during each commutation interval. The effective phase voltage is then expressed as

$${\overline{v}}_x=d{S}_x{\displaystyle \frac{V_{dc}}{2}},x\in \{a,b,c\}.$$

(16)

During initial experimental tests, the duty ratio d is kept constant and limited to conservative values to restrict current magnitude and torque production. No current feedback, voltage regulation, or modulation index adaptation is employed, thereby preserving the platform’s open-loop nature.

This simplified PWM representation decouples the commutation logic from the switching frequency and provides a safe, flexible mechanism for scaling the applied voltage during experimental validation [12]. Furthermore, this formulation allows for transparent verification of inverter behavior and provides a deterministic excitation scheme suitable for open-loop experimentation on industrial BLDC servomotors [12,14].

3.8. Relation Between Mathematical Model and Simulation

The mathematical formulation presented above directly underpins the time-domain simulation implemented in Octave (GNU Octave 8.4.0, GNU Project, Boston, MA, USA) The switching vector ${\mathbf{S}}_k$ is generated as a function of the imposed electrical angle ${\theta }_e\left(t\right)$, while the phase voltages are computed according to the inverter model. The phase voltage and current dynamics are obtained by numerical integration of the electrical equations.

This explicit correspondence ensures that the simulation results represent the same open-loop commutation strategy implemented later in hardware, thereby serving as a functional validation step before experimental energization, as shown in Figure 10 and Figure 11.

3.9. Pseudocode of the Open-Loop Switching Simulation

Algorithm 1 summarizes the MATLAB/Octave implementation used to validate the open-loop, six-step commutation strategy before experimental testing. The pseudocode highlights the direct correspondence between the mathematical formulation, the switching sequence, and the numerical simulation.

Algorithm  Open-loop BLDC six-step commutation simulation

Require: Phase resistance $R_s$, phase inductance $L_s$, back-EMF constant $K_b$, DC-link voltage $V_{dc}$, imposed electrical speed ${\omega }_e$, simulation horizon T, time step $\Delta t$   1: Generate time vector $t\leftarrow 0:\Delta t:T$, $N\leftarrow \left|t\right|$   2: Initialize arrays $i_a,i_b,i_c,e_a,e_b,e_c,v_a,v_b,v_c\leftarrow 0$ (length N)   3: Define six-step switching table $\mathcal{S}=\{{\mathbf{S}}_1,\dots ,{\mathbf{S}}_6\}$, with ${\mathbf{S}}_k={[S_a,S_b,S_c]}^T$, $S_x\in \{-1,0,+1\}$   4: for $k=2$ to N do   5:     Compute electrical angle: ${\theta }_e\leftarrow {\omega }_{e}t\left(k\right)$   6:     Compute trapezoidal back-EMF:   7:            $e_a\left(k\right)\leftarrow K_{b}f\left({\theta }_e\right)$   8:            $e_b\left(k\right)\leftarrow K_{b}f({\theta }_e-2\pi /3)$   9:            $e_c\left(k\right)\leftarrow K_{b}f({\theta }_e+2\pi /3)$ 10:      Determine commutation sector: 11:             $s\leftarrow ⌊\mathrm{mod}({\theta }_e,2\pi )/(\pi /3)⌋+1$ 12:      Select switching vector: $\mathbf{S}\leftarrow \mathcal{S}\left(s\right)$ 13:      Apply phase voltages: 14:             $v_a\left(k\right)\leftarrow {\displaystyle \frac{V_{dc}}{2}}{S}_a$ 15:             $v_b\left(k\right)\leftarrow {\displaystyle \frac{V_{dc}}{2}}{S}_b$ 16:             $v_c\left(k\right)\leftarrow {\displaystyle \frac{V_{dc}}{2}}{S}_c$ 17:      Update phase currents (Euler integration): 18:             ${\dot{i}}_a\leftarrow \left(v_a\left(k\right)-R_s{i}_a(k-1)-e_a\left(k\right)\right)/L_s$ 19:             ${\dot{i}}_b\leftarrow \left(v_b\left(k\right)-R_s{i}_b(k-1)-e_b\left(k\right)\right)/L_s$ 20:             $i_a\left(k\right)\leftarrow i_a(k-1)+\Delta t{\dot{i}}_a$ 21:             $i_b\left(k\right)\leftarrow i_b(k-1)+\Delta t{\dot{i}}_b$ 22:      Enforce star-connection constraint: 23:             $i_c\left(k\right)\leftarrow -(i_a\left(k\right)+i_b\left(k\right))$ 24: end for 25: Plot phase currents and applied phase voltages versus time

Future work will incorporate motor parameter identification by using experimental measurements on the SGMAH motor to monitor and compare voltages and currents.

4. Experimental Setup and Validation

This section describes the experimental platform developed to validate the proposed open-architecture frugal drive system. The objective of the experiments is to demonstrate the correct operation of the power electronics, gate-drive circuitry, and open-loop commutation strategy when applied to a real industrial BLDC servomotor, rather than to evaluate closed-loop performance or dynamic regulation.

4.1. Experimental Test Bench Configuration

The experimental setup consists of the modular drive platform described in Section 2 and Section 3, a programmable DC power supply (commercial laboratory DC power supply), and an industrial BLDC servomotor extracted from a Motoman robotic axis, as shown in Figure 12. The servomotor corresponds to a Yaskawa SGMAH-A3A1A unit, originally designed to be operated with a proprietary servo amplifier. The inverter is supplied by a programmable switched-mode power supply rated at 10 A with an output voltage of 100 V. The motor phases are directly connected to the inverter outputs, while the original proprietary drive is bypassed and powered by our proposed controller.

The digital control unit is implemented using an ESP32-class microcontroller, which generates the predefined six-step commutation sequence. A PCB board was designed and constructed (Figure 13) to control the gate-drive signals delivered to the inverter switches via optically isolated PC923-based driver circuits powered by independent floating auxiliary supplies. The overall experimental layout preserves complete visibility and accessibility of control signals, power connections, and test points. The photographs confirm the physical realization of the electronic architecture described in Section 3 and demonstrate the feasibility of implementing industrial-style gate-drive isolation using frugal, modular PCB designs.

4.2. Experimental Procedure

To support the qualitative validation of the proposed open-loop drive platform, some measurements of the DC-link voltage, motor terminal voltages, and oscilloscope-based verification of the gate-drive triggering signals are provided. The latter was used to confirm the correct switching sequence, phase ordering, and non-overlapping operation of complementary inverter devices. In addition, the direction of motor rotation and its stability were visually verified under different commutation frequencies.

All experiments were conducted under open-loop conditions without current, speed, or position feedback. Before energizing the motor, the digital commutation logic and gate-drive signals were verified using low-voltage tests to confirm the correct switching order and the non-overlapping behavior of the complementary devices. The experimental procedure follows a staged validation approach:

• Verification of digital commutation signals at the microcontroller outputs.
• Verification of isolated gate-drive signals at the inverter input terminals.
• Incremental energization of the DC-link voltage, starting from low-voltage levels and gradually increasing up to the target operating range.
• Application of fixed commutation timing and duty ratio to generate open-loop six-step excitation.

During all tests, conservative duty-cycle values and commutation frequencies were employed to limit current magnitude and torque production. This approach ensures safe operation of both the power electronics and the industrial servomotor during open-loop experimentation.

4.3. Experimental Observations and Validation Results

The experimental tests demonstrate that the proposed drive platform can generate stable, repeatable six-step commutation sequences when connected to the industrial Yaskawa BLDC servomotor. Upon energization, the motor exhibits smooth synchronous rotation consistent with the imposed commutation frequency, confirming correct phase ordering and inverter operation. No uncontrolled current growth, abnormal acoustic behavior, or visible switching faults were observed during the experimental trials within the tested voltage range. The absence of shoot-through events and the inverter’s stable thermal behavior indicate that the gate-drive isolation and protection measures are functioning correctly.

Across repeated experimental tests, the motor exhibited consistent rotation direction and stable synchronous behavior for a range of imposed commutation frequencies within conservative operating limits. No abnormal switching events or uncontrolled current growth were observed. The repeatability of the observed behavior confirms the robustness of the open-loop, six-step commutation strategy at the inverter and gate-drive level.

Although no quantitative measurements of torque, speed, or phase currents are reported—consistent with the platform’s open-loop, exploratory nature—the successful mechanical rotation of the industrial servomotor validates the end-to-end functionality of the proposed system. These results confirm that the platform provides a reliable basis for studying industrial BLDC drive behavior at the power-electronics level.

4.4. Oscilloscope-Based Electrical Measurements

Representative measurements were acquired using a digital oscilloscope (UNI-T UTD2202CE, 200 MHz bandwidth, 1 GS/s sampling rate; UNI-T Instruments Co., Ltd., Dongguan, China) to verify that the applied six-step commutation voltages at the motor terminals are presented in Figure 14. The measurements were acquired using a $\times 10$ voltage probe, resulting in a vertical scale of 50 V per division for all reported terminal voltage waveforms.

Across different commutation frequencies, the voltage waveforms preserved the same qualitative shape and switching sequence, with variations reflected only in the motor’s rotational speed. This behavior is likely related to the approximately constant mechanical load during the experiments, since only the corresponding robot joint was actuated and no additional external loads or multi-axis motions were involved.

The measured phase currents (Figure 15) exhibit consistent phase conduction patterns across different commutation speeds, with variations mainly reflected in the motor rotation speed due to the constant mechanical load of the driven robotic axis. The oscilloscope scale is 300 mA/div.

A representative gate-drive triggering signal was measured to confirm safe timing and non-overlapping switching behavior (Figure 16). The measured gate-drive signals confirm correct complementary switching from 2 Hz to 20 kHz, with $0.4\%$ of duty cycle for dead time per signal, ensuring safe non-overlapping operation of the inverter devices.

The measured gate-drive, voltage, and current waveforms confirm correct six-step, open-loop commutation and safe inverter operation on the proposed open-architecture platform using real industrial hardware.

4.5. Discussion of Experimental Scope and Limitations

It is important to emphasize that the experimental validation presented in this work focuses on functional verification rather than performance optimization. The absence of feedback control, current sensing, and rotor position estimation limits the achievable dynamic performance and prevents precise regulation of speed or torque.

Nevertheless, the primary contribution of the proposed platform lies in enabling transparent access to low-level switching signals and power electronics stages of a real industrial servomotor. This capability is rarely available in commercial robotic systems and is particularly valuable for educational, methodological, and exploratory research purposes.

Future work will extend the platform to include current sensing, rotor position estimation, and closed-loop control strategies, building upon the validated open-architecture hardware foundation established in this study.

The presented snubber analysis provides a first-order quantitative justification consistent with the exploratory nature of the platform, while more detailed electro-thermal and loss modeling is deferred to future work.

A supplementary video illustrating the experimental open-loop operation of the proposed platform is available online (see Supplementary Materials).

5. Discussion

This work is intentionally scoped as an accessibility-oriented mechatronic platform contribution; therefore, quantitative control-performance benchmarking is outside the goals of this study.

The results presented in this work demonstrate the feasibility of developing an open-architecture, frugal mechatronic drive platform capable of operating a real industrial BLDC servomotor under open-loop conditions. Unlike conventional studies that focus on high-performance closed-loop control, the emphasis here is placed on transparency, accessibility, and methodological reproducibility at the power-electronics and switching level.

The sequential–iterative mechatronic design methodology proves effective in structuring the development process from system requirements to experimental validation. By explicitly separating electrical power domains, gate-drive isolation, switching logic, and mechanical integration, the proposed approach enables incremental testing and early fault detection. This design philosophy is particularly well-suited for academic and research laboratories, where direct access to low-level signals and hardware modularity are essential.

From a power-electronics perspective, the use of a conventional three-phase inverter with optically isolated PC923-based gate drivers provides a practical balance between industrial relevance and implementation simplicity. The experimental observations confirm that conservative open-loop commutation, combined with appropriate isolation and protection measures, is sufficient to safely energize and rotate an industrial-grade servomotor originally intended for operation with a proprietary drive.

The mathematical formulation and simulation are intentionally limited to a simplified electrical model to validate inverter switching and open-loop commutation on real industrial hardware. Estimated motor parameters are sufficient to verify commutation correctness and to define conservative excitation levels. Mechanical dynamics, systematic parameter identification, and performance-oriented electromechanical modeling are outside the scope of this investigation, since the motor is derived from a proprietary industrial robotic axis whose complete mechanical load cannot be realistically reproduced, and whose inertial and load effects are meaningful primarily in closed-loop operation for compensation and regulation.

A contribution of this work is demonstrating that meaningful experimental interaction with industrial robotic actuators is possible without relying on closed, commercial servo amplifiers. By exposing the inverter switching states, gate-drive signals, and power stages, the platform enables educational and exploratory investigations that are otherwise inaccessible in industrial robots. This contribution aligns with recent trends toward open-architecture and frugal engineering approaches in robotics and mechatronics research.

Nevertheless, the limitations of the proposed platform must be acknowledged. The absence of current sensing, rotor position feedback, and closed-loop control limits achievable performance and precludes quantitative evaluation of torque, speed, and efficiency. As such, the platform is not intended to replace industrial servo drives, but rather to complement them as an experimental and educational tool.

Table 5. A comparison between the proposed platform and representative open-architecture BLDC drive platforms.

Platform	Voltage Class	Hardware Accessibility	Experimental Scope
ODrive open-source controller [24]	Low-voltage (12–56 V)	Limited: integrated gate drivers and abstracted power stage	Robotics, embedded motion control
VESC-based BLDC drives [25]	Low-voltage (12–60 V)	Limited: integrated power stage, focus on firmware-level access	EVs, mobile robotics
SimpleFOC platforms [26]	Low-voltage ($Vmax<48$ V)	Partial: logic-level access, integrated drivers	Educational and laboratory-scale motors
Academic open-loop BLDC test benches [21]	Low to medium voltage	Partial: limited access to the inverter switching layer	Simulation-supported experimental validation
Proposed platform in this work	Industrial (200 V class motor, tested up to 100 V)	Full access to gate-drive signals and inverter power stage	Open-loop experimental validation on real industrial BLDC servomotor

qualitatively compares the proposed platform with representative open-architecture BLDC drive solutions. The comparison emphasizes that, unlike most low-voltage open-source controllers, the proposed system provides direct access to inverter switching and power-electronics hardware on a real industrial-grade servomotor, prioritizing experimental accessibility over control-performance benchmarking.

The results validate the feasibility of the proposed methodology and architecture as a robust foundation for further research. The open-loop platform establishes a hardware baseline upon which advanced sensing, identification, and control strategies can be progressively integrated in future developments.

6. Conclusions and Future Work

This paper presents the design and experimental implementation of an open-architecture, economical mechatronic drive platform for operating an industrial BLDC servomotor in open-loop mode. The proposed system was developed using a sequential–iterative mechatronic design methodology that integrates electrical power-domain definition, gate-drive isolation, inverter switching logic, mechanical enclosure design, numerical simulation, and experimental validation.

The results demonstrate that a real industrial servomotor extracted from a Motoman robotic axis can be safely energized and driven using a fully open hardware and firmware architecture, without reliance on proprietary servo amplifiers. The experimental observations confirm correct six-step commutation, stable synchronous rotation, and reliable operation of the gate-drive and power electronics subsystems. These results validate the feasibility of transparent, low-level experimental access to industrial robotic actuators.

It is worth noting that this work contributes to the methodological and architectural framework rather than to performance optimization. By explicitly exposing inverter switching states, gate-drive signals, and power stages, the proposed platform enables educational, exploratory, and research-oriented investigations that are typically inaccessible in commercial industrial robots. The combination of frugal design principles, modular hardware organization, and open-loop operation makes the platform particularly suitable for academic laboratories and early-stage research.

This work validates an open-architecture, frugal mechatronic platform for experimental operation of an industrial-grade BLDC. The contribution is explicitly limited to platform-level validation, safe open-loop commutation, and transparent access to inverter switching and power-electronics stages, rather than drive performance or control optimization. The industrial relevance lies in enabling reproducible experimental interaction with real industrial hardware that is typically inaccessible in commercial robotic systems.

The mathematical formulation, switching vector definition, and time-domain simulation provide a rigorous theoretical foundation that supports the experimental implementation. Although the motor parameters used in the simulation are estimated, the numerical results effectively validate the commutation logic and provide guidance for conservative experimental settings. This reinforces the role of simulation as a functional verification tool in open-loop industrial drive development.

Future work will focus on extending the validated hardware platform toward more advanced functionalities. Planned developments include integrating phase-current sensing, rotor position estimation, and closed-loop control strategies, such as field-oriented control and torque regulation. Additional efforts will address motor parameter identification, efficiency analysis, and the incorporation of fault detection and protection mechanisms. These extensions will build upon the open-architecture foundation established in this study, enabling progressively higher levels of control sophistication while preserving transparency and reproducibility.